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machdep.c revision 1.5.4.1
      1 /*	$NetBSD: machdep.c,v 1.5.4.1 2011/02/17 11:59:37 bouyer Exp $	*/
      2 
      3 /*
      4  * Copyright 2001, 2002 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *      This product includes software developed for the NetBSD Project by
     20  *      Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 /*
     39  * Copyright (c) 1988 University of Utah.
     40  * Copyright (c) 1992, 1993
     41  *	The Regents of the University of California.  All rights reserved.
     42  *
     43  * This code is derived from software contributed to Berkeley by
     44  * the Systems Programming Group of the University of Utah Computer
     45  * Science Department, The Mach Operating System project at
     46  * Carnegie-Mellon University and Ralph Campbell.
     47  *
     48  * Redistribution and use in source and binary forms, with or without
     49  * modification, are permitted provided that the following conditions
     50  * are met:
     51  * 1. Redistributions of source code must retain the above copyright
     52  *    notice, this list of conditions and the following disclaimer.
     53  * 2. Redistributions in binary form must reproduce the above copyright
     54  *    notice, this list of conditions and the following disclaimer in the
     55  *    documentation and/or other materials provided with the distribution.
     56  * 3. Neither the name of the University nor the names of its contributors
     57  *    may be used to endorse or promote products derived from this software
     58  *    without specific prior written permission.
     59  *
     60  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     61  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     62  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     63  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     64  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     65  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     66  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     67  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     68  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     69  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     70  * SUCH DAMAGE.
     71  *
     72  *	@(#)machdep.c   8.3 (Berkeley) 1/12/94
     73  *	from: Utah Hdr: machdep.c 1.63 91/04/24
     74  */
     75 
     76 #include <sys/cdefs.h>
     77 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.5.4.1 2011/02/17 11:59:37 bouyer Exp $");
     78 
     79 #include "opt_ddb.h"
     80 #include "opt_com.h"
     81 #include "opt_execfmt.h"
     82 #include "opt_memsize.h"
     83 
     84 #include <sys/param.h>
     85 #include <sys/systm.h>
     86 #include <sys/kernel.h>
     87 #include <sys/buf.h>
     88 #include <sys/reboot.h>
     89 #include <sys/mount.h>
     90 #include <sys/kcore.h>
     91 #include <sys/boot_flag.h>
     92 #include <sys/termios.h>
     93 #include <sys/ksyms.h>
     94 #include <sys/bus.h>
     95 #include <sys/device.h>
     96 #include <sys/extent.h>
     97 #include <sys/malloc.h>
     98 
     99 #include <uvm/uvm_extern.h>
    100 
    101 #include <dev/cons.h>
    102 
    103 #include "ksyms.h"
    104 
    105 #if NKSYMS || defined(DDB) || defined(LKM)
    106 #include <machine/db_machdep.h>
    107 #include <ddb/db_extern.h>
    108 #endif
    109 
    110 #include <machine/cpu.h>
    111 #include <machine/psl.h>
    112 
    113 #include "com.h"
    114 #if NCOM == 0
    115 #error no serial console
    116 #endif
    117 
    118 #include <dev/ic/comreg.h>
    119 #include <dev/ic/comvar.h>
    120 
    121 #include <mips/rmi/rmixl_comvar.h>
    122 #include <mips/rmi/rmixlvar.h>
    123 #include <mips/rmi/rmixl_firmware.h>
    124 #include <mips/rmi/rmixlreg.h>
    125 
    126 #define MACHDEP_DEBUG 1
    127 #ifdef MACHDEP_DEBUG
    128 int machdep_debug=MACHDEP_DEBUG;
    129 # define DPRINTF(x)	do { if (machdep_debug) printf x ; } while(0)
    130 #else
    131 # define DPRINTF(x)
    132 #endif
    133 
    134 #ifndef CONSFREQ
    135 # define CONSFREQ -1		/* inherit from firmware */
    136 #endif
    137 #ifndef CONSPEED
    138 # define CONSPEED 38400
    139 #endif
    140 #ifndef CONMODE
    141 # define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)
    142 #endif
    143 #ifndef CONSADDR
    144 # define CONSADDR RMIXL_IO_DEV_UART_1
    145 #endif
    146 
    147 int		comcnfreq  = CONSFREQ;
    148 int		comcnspeed = CONSPEED;
    149 tcflag_t	comcnmode  = CONMODE;
    150 bus_addr_t	comcnaddr  = (bus_addr_t)CONSADDR;
    151 
    152 struct rmixl_config rmixl_configuration;
    153 
    154 
    155 /*
    156  * array of tested firmware versions
    157  * if you find new ones and they work
    158  * please add them
    159  */
    160 static uint64_t rmiclfw_psb_versions[] = {
    161 	0x4958d4fb00000056ULL,
    162 	0x49a5a8fa00000056ULL,
    163 	0x4aacdb6a00000056ULL,
    164 };
    165 #define RMICLFW_PSB_VERSIONS_LEN \
    166 	(sizeof(rmiclfw_psb_versions)/sizeof(rmiclfw_psb_versions[0]))
    167 
    168 /*
    169  * kernel copies of firmware info
    170  */
    171 static rmixlfw_info_t rmixlfw_info;
    172 static rmixlfw_mmap_t rmixlfw_phys_mmap;
    173 static rmixlfw_mmap_t rmixlfw_avail_mmap;
    174 #define RMIXLFW_INFOP_LEGAL	0x8c000000
    175 
    176 
    177 /*
    178  * storage for fixed extent used to allocate physical address regions
    179  * because extent(9) start and end values are u_long, they are only
    180  * 32 bits on a 32 bit kernel, which is insuffucuent since XLS physical
    181  * address is 40 bits wide.  So the "physaddr" map stores regions
    182  * in units of megabytes.
    183  */
    184 static u_long rmixl_physaddr_storage[
    185 	EXTENT_FIXED_STORAGE_SIZE(32)/sizeof(u_long)
    186 ];
    187 
    188 /* For sysctl_hw. */
    189 extern char cpu_model[];
    190 
    191 /* Our exported CPU info; we can have only one. */
    192 struct cpu_info cpu_info_store;
    193 
    194 /* Maps for VM objects. */
    195 struct vm_map *phys_map = NULL;
    196 
    197 int	physmem;		/* Total physical memory */
    198 
    199 int	netboot;		/* Are we netbooting? */
    200 
    201 
    202 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
    203 u_int mem_cluster_cnt;
    204 
    205 
    206 void configure(void);
    207 void mach_init(int, int32_t *, void *, int64_t);
    208 static u_long rmixlfw_init(int64_t);
    209 static u_long mem_clusters_init(rmixlfw_mmap_t *, rmixlfw_mmap_t *);
    210 static void __attribute__((__noreturn__)) rmixl_exit(int);
    211 static void rmixl_physaddr_init(void);
    212 static u_int ram_seg_resv(phys_ram_seg_t *, u_int, u_quad_t, u_quad_t);
    213 void rmixlfw_mmap_print(rmixlfw_mmap_t *);
    214 
    215 
    216 /*
    217  * safepri is a safe priority for sleep to set for a spin-wait during
    218  * autoconfiguration or after a panic.  Used as an argument to splx().
    219  */
    220 int	safepri = MIPS1_PSL_LOWIPL;
    221 
    222 /*
    223  * Do all the stuff that locore normally does before calling main().
    224  */
    225 void
    226 mach_init(int argc, int32_t *argv, void *envp, int64_t infop)
    227 {
    228 	struct rmixl_config *rcp = &rmixl_configuration;
    229 	void *kernend;
    230 	u_long memsize;
    231 	u_int vm_cluster_cnt;
    232 	uint32_t r;
    233 	phys_ram_seg_t vm_clusters[VM_PHYSSEG_MAX];
    234 	extern char edata[], end[];
    235 
    236 	rmixl_mtcr(0, 1);		/* disable all threads except #0 */
    237 
    238 	r = rmixl_mfcr(0x300);
    239 	r &= ~__BIT(14);		/* disabled Unaligned Access */
    240 	rmixl_mtcr(0x300, r);
    241 
    242 	rmixl_mtcr(0x400, 0);		/* enable MMU clock gating */
    243 					/* set single MMU Thread Mode */
    244 					/* TLB is partitioned (1 partition) */
    245 
    246 	/*
    247 	 * Clear the BSS segment.
    248 	 */
    249 	kernend = (void *)mips_round_page(end);
    250 	memset(edata, 0, (char *)kernend - edata);
    251 
    252 	/*
    253 	 * Set up the exception vectors and CPU-specific function
    254 	 * vectors early on.  We need the wbflush() vector set up
    255 	 * before comcnattach() is called (or at least before the
    256 	 * first printf() after that is called).
    257 	 * Also clears the I+D caches.
    258 	 */
    259 	mips_vector_init();
    260 
    261 	memsize = rmixlfw_init(infop);
    262 
    263 	/* set the VM page size */
    264 	uvm_setpagesize();
    265 
    266 	physmem = btoc(memsize);
    267 
    268 	rmixl_obio_bus_mem_init(&rcp->rc_obio_memt, rcp); /* need for console */
    269 
    270 #if NCOM > 0
    271 	rmixl_com_cnattach(comcnaddr, comcnspeed, comcnfreq,
    272 		COM_TYPE_NORMAL, comcnmode);
    273 #endif
    274 
    275 	printf("\nNetBSD/rmixl\n");
    276 	printf("memsize = %#lx\n", memsize);
    277 
    278 	rmixl_physaddr_init();
    279 
    280 	/*
    281 	 * Obtain the cpu frequency
    282 	 * Compute the number of ticks for hz.
    283 	 * Compute the delay divisor.
    284 	 * Double the Hz if this CPU runs at twice the
    285          *  external/cp0-count frequency
    286 	 */
    287 	curcpu()->ci_cpu_freq = rmixlfw_info.cpu_frequency;
    288 	curcpu()->ci_cycles_per_hz = (curcpu()->ci_cpu_freq + hz / 2) / hz;
    289 	curcpu()->ci_divisor_delay =
    290 		((curcpu()->ci_cpu_freq + 500000) / 1000000);
    291         if (mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
    292 		curcpu()->ci_cpu_freq *= 2;
    293 
    294 	/*
    295 	 * Look at arguments passed to us and compute boothowto.
    296 	 * - rmixl firmware gives us a 32 bit argv[i], so adapt
    297 	 *   by forcing sign extension in cast to (char *)
    298 	 */
    299 	boothowto = RB_AUTOBOOT;
    300 	for (int i = 1; i < argc; i++) {
    301 		for (char *cp = (char *)(intptr_t)argv[i]; *cp; cp++) {
    302 			int howto;
    303 			/* Ignore superfluous '-', if there is one */
    304 			if (*cp == '-')
    305 				continue;
    306 
    307 			howto = 0;
    308 			BOOT_FLAG(*cp, howto);
    309 			if (howto != 0)
    310 				boothowto |= howto;
    311 #ifdef DIAGNOSTIC
    312 			else
    313 				printf("bootflag '%c' not recognised\n", *cp);
    314 #endif
    315 		}
    316 	}
    317 #ifdef DIAGNOSTIC
    318 	printf("boothowto %#x\n", boothowto);
    319 #endif
    320 
    321 	/*
    322 	 * Reserve pages from the VM system.
    323 	 * to maintain mem_clusters[] as a map of raw ram,
    324 	 * copy into temporary table vm_clusters[]
    325 	 * work on that and use it to feed vm_physload()
    326 	 */
    327 	KASSERT(sizeof(mem_clusters) == sizeof(vm_clusters));
    328 	memcpy(&vm_clusters, &mem_clusters, sizeof(vm_clusters));
    329 	vm_cluster_cnt = mem_cluster_cnt;
    330 
    331 	/* reserve 0..start..kernend pages */
    332 	vm_cluster_cnt = ram_seg_resv(vm_clusters, vm_cluster_cnt,
    333 		0, round_page(MIPS_KSEG0_TO_PHYS(kernend)));
    334 
    335 	/* reserve reset exception vector page */
    336 	/* should never be in our clusters anyway... */
    337 	vm_cluster_cnt = ram_seg_resv(vm_clusters, vm_cluster_cnt,
    338 		MIPS_RESET_EXC_VEC, MIPS_RESET_EXC_VEC+NBPG);
    339 
    340 	/*
    341 	 * Load vm_clusters[] into the VM system.
    342 	 */
    343 	for (u_int i=0; i < vm_cluster_cnt; i++) {
    344 		u_quad_t first, last;
    345 
    346 		first = trunc_page(vm_clusters[i].start);
    347 		last = round_page(vm_clusters[i].start + vm_clusters[i].size);
    348 		DPRINTF(("%s: %d: %#"PRIx64", %#"PRIx64"\n",
    349 			__func__, i, first, last));
    350 
    351 		uvm_page_physload(atop(first), atop(last), atop(first),
    352 			atop(last), VM_FREELIST_DEFAULT);
    353 	}
    354 
    355 	/*
    356 	 * Initialize error message buffer (at end of core).
    357 	 */
    358 	mips_init_msgbuf();
    359 
    360 	pmap_bootstrap();
    361 
    362 	/*
    363 	 * Allocate uarea page for lwp0 and set it.
    364 	 */
    365 	mips_init_lwp0_uarea();
    366 
    367 #if defined(DDB)
    368 	if (boothowto & RB_KDB)
    369 		Debugger();
    370 #endif
    371 }
    372 
    373 /*
    374  * ram_seg_resv - cut reserved regions out of segs, fragmenting as needed
    375  *
    376  * we simply build a new table of segs, then copy it back over the given one
    377  * this is inefficient but simple and called only a few times
    378  *
    379  * note: 'last' here means 1st addr past the end of the segment (start+size)
    380  */
    381 static u_int
    382 ram_seg_resv(phys_ram_seg_t *segs, u_int nsegs,
    383 	u_quad_t resv_first, u_quad_t resv_last)
    384 {
    385         u_quad_t first, last;
    386 	int new_nsegs=0;
    387 	int resv_flag;
    388 	phys_ram_seg_t new_segs[VM_PHYSSEG_MAX];
    389 
    390 	for (u_int i=0; i < nsegs; i++) {
    391 		resv_flag = 0;
    392 		first = trunc_page(segs[i].start);
    393 		last = round_page(segs[i].start + segs[i].size);
    394 
    395 		KASSERT(new_nsegs < VM_PHYSSEG_MAX);
    396 		if ((resv_first <= first) && (resv_last >= last)) {
    397 			/* whole segment is resverved */
    398 			continue;
    399 		}
    400 		if ((resv_first > first) && (resv_first < last)) {
    401 			u_quad_t new_last;
    402 
    403 			/*
    404 			 * reserved start in segment
    405 			 * salvage the leading fragment
    406 			 */
    407 			resv_flag = 1;
    408 			new_last = last - (last - resv_first);
    409 			KASSERT (new_last > first);
    410 			new_segs[new_nsegs].start = first;
    411 			new_segs[new_nsegs].size = new_last - first;
    412 			new_nsegs++;
    413 		}
    414 		if ((resv_last > first) && (resv_last < last)) {
    415 			u_quad_t new_first;
    416 
    417 			/*
    418 			 * reserved end in segment
    419 			 * salvage the trailing fragment
    420 			 */
    421 			resv_flag = 1;
    422 			new_first = first + (resv_last - first);
    423 			KASSERT (last > (new_first + NBPG));
    424 			new_segs[new_nsegs].start = new_first;
    425 			new_segs[new_nsegs].size = last - new_first;
    426 			new_nsegs++;
    427 		}
    428 		if (resv_flag == 0) {
    429 			/*
    430 			 * nothing reserved here, take it all
    431 			 */
    432 			new_segs[new_nsegs].start = first;
    433 			new_segs[new_nsegs].size = last - first;
    434 			new_nsegs++;
    435 		}
    436 
    437 	}
    438 
    439 	memcpy(segs, new_segs, sizeof(new_segs));
    440 
    441 	return new_nsegs;
    442 }
    443 
    444 /*
    445  * create an extent for physical address space
    446  * these are in units of MB for sake of compression (for sake of 32 bit kernels)
    447  * allocate the regions where we have known functions (DRAM, IO, etc)
    448  * what remains can be allocated as needed for other stuff
    449  * e.g. to configure BARs that are not already initialized and enabled.
    450  */
    451 static void
    452 rmixl_physaddr_init(void)
    453 {
    454 	struct extent *ext;
    455 	unsigned long start = 0UL;
    456 	unsigned long end = (__BIT(40) / (1024 * 1024)) -1;
    457 	u_long base;
    458 	u_long size;
    459 	uint32_t r;
    460 
    461 	ext = extent_create("physaddr", start, end, M_DEVBUF,
    462 		(void *)rmixl_physaddr_storage, sizeof(rmixl_physaddr_storage),
    463 		EX_NOWAIT | EX_NOCOALESCE);
    464 
    465 	if (ext == NULL)
    466 		panic("%s: extent_create failed", __func__);
    467 
    468 	/*
    469 	 * grab regions per DRAM BARs
    470 	 */
    471 	for (u_int i=0; i < RMIXL_SBC_DRAM_NBARS; i++) {
    472 		r = RMIXL_IOREG_READ(RMIXL_SBC_DRAM_BAR(i));
    473 		if ((r & RMIXL_DRAM_BAR_STATUS) == 0)
    474 			continue;	/* not enabled */
    475 		base = (u_long)(DRAM_BAR_TO_BASE((uint64_t)r) / (1024 * 1024));
    476 		size = (u_long)(DRAM_BAR_TO_SIZE((uint64_t)r) / (1024 * 1024));
    477 
    478 		DPRINTF(("%s: %d: %d: 0x%08x -- 0x%010lx:%lu MB\n",
    479 			__func__, __LINE__, i, r, base * (1024 * 1024), size));
    480 		if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
    481 			panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
    482 				"failed", __func__, ext, base, size, EX_NOWAIT);
    483 	}
    484 
    485 	/*
    486 	 * grab regions per PCIe CFG, ECFG, IO, MEM BARs
    487 	 */
    488 	r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_CFG_BAR);
    489 	if ((r & RMIXL_PCIE_CFG_BAR_ENB) != 0) {
    490 		base = (u_long)(RMIXL_PCIE_CFG_BAR_TO_BA((uint64_t)r)
    491 			/ (1024 * 1024));
    492 		size = (u_long)RMIXL_PCIE_CFG_SIZE / (1024 * 1024);
    493 		DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
    494 			__LINE__, "CFG", r, base * 1024 * 1024, size));
    495 		if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
    496 			panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
    497 				"failed", __func__, ext, base, size, EX_NOWAIT);
    498 	}
    499 	r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_ECFG_BAR);
    500 	if ((r & RMIXL_PCIE_ECFG_BAR_ENB) != 0) {
    501 		base = (u_long)(RMIXL_PCIE_ECFG_BAR_TO_BA((uint64_t)r)
    502 			/ (1024 * 1024));
    503 		size = (u_long)RMIXL_PCIE_ECFG_SIZE / (1024 * 1024);
    504 		DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
    505 			__LINE__, "ECFG", r, base * 1024 * 1024, size));
    506 		if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
    507 			panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
    508 				"failed", __func__, ext, base, size, EX_NOWAIT);
    509 	}
    510 	r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_MEM_BAR);
    511 	if ((r & RMIXL_PCIE_MEM_BAR_ENB) != 0) {
    512 		base = (u_long)(RMIXL_PCIE_MEM_BAR_TO_BA((uint64_t)r)
    513 			/ (1024 * 1024));
    514 		size = (u_long)(RMIXL_PCIE_MEM_BAR_TO_SIZE((uint64_t)r)
    515 			/ (1024 * 1024));
    516 		DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
    517 			__LINE__, "MEM", r, base * 1024 * 1024, size));
    518 		if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
    519 			panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
    520 				"failed", __func__, ext, base, size, EX_NOWAIT);
    521 	}
    522 	r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_IO_BAR);
    523 	if ((r & RMIXL_PCIE_IO_BAR_ENB) != 0) {
    524 		base = (u_long)(RMIXL_PCIE_IO_BAR_TO_BA((uint64_t)r)
    525 			/ (1024 * 1024));
    526 		size = (u_long)(RMIXL_PCIE_IO_BAR_TO_SIZE((uint64_t)r)
    527 			/ (1024 * 1024));
    528 		DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
    529 			__LINE__, "IO", r, base * 1024 * 1024, size));
    530 		if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
    531 			panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
    532 				"failed", __func__, ext, base, size, EX_NOWAIT);
    533 	}
    534 
    535 	/*
    536 	 *  at this point all regions left in "physaddr" extent
    537 	 *  are unused holes in the physical adress space
    538 	 *  available for use as needed.
    539 	 */
    540 	rmixl_configuration.rc_phys_ex = ext;
    541 #ifdef MACHDEP_DEBUG
    542 	extent_print(ext);
    543 #endif
    544 }
    545 
    546 static u_long
    547 rmixlfw_init(int64_t infop)
    548 {
    549 	struct rmixl_config *rcp = &rmixl_configuration;
    550 
    551 	strcpy(cpu_model, "RMI XLS616ATX VIIA");	/* XXX */
    552 
    553 	infop |= MIPS_KSEG0_START;
    554 	rmixlfw_info = *(rmixlfw_info_t *)(intptr_t)infop;
    555 
    556 	for (int i=0; i < RMICLFW_PSB_VERSIONS_LEN; i++) {
    557 		if (rmiclfw_psb_versions[i] == rmixlfw_info.psb_version)
    558 			goto found;
    559 	}
    560 
    561 	rcp->rc_io_pbase = RMIXL_IO_DEV_PBASE;
    562 	rmixl_putchar_init(rcp->rc_io_pbase);
    563 
    564 #ifdef DIAGNOSTIC
    565 	rmixl_puts("\r\nWARNING: untested psb_version: ");
    566 	rmixl_puthex64(rmixlfw_info.psb_version);
    567 	rmixl_puts("\r\n");
    568 #endif
    569 
    570 	/* XXX trust and use MEMSIZE */
    571 	mem_clusters[0].start = 0;
    572 	mem_clusters[0].size = MEMSIZE;
    573 	mem_cluster_cnt = 1;
    574 	return MEMSIZE;
    575 
    576  found:
    577 	rcp->rc_io_pbase = MIPS_KSEG1_TO_PHYS(rmixlfw_info.io_base);
    578 	rmixl_putchar_init(rcp->rc_io_pbase);
    579 #ifdef MACHDEP_DEBUG
    580 	rmixl_puts("\r\ninfop: ");
    581 	rmixl_puthex64((uint64_t)(intptr_t)infop);
    582 #endif
    583 #ifdef DIAGNOSTIC
    584 	rmixl_puts("\r\nrecognized psb_version: ");
    585 	rmixl_puthex64(rmixlfw_info.psb_version);
    586 	rmixl_puts("\r\n");
    587 #endif
    588 
    589 	return mem_clusters_init(
    590 		(rmixlfw_mmap_t *)(intptr_t)rmixlfw_info.psb_physaddr_map,
    591 		(rmixlfw_mmap_t *)(intptr_t)rmixlfw_info.avail_mem_map);
    592 }
    593 
    594 void
    595 rmixlfw_mmap_print(rmixlfw_mmap_t *map)
    596 {
    597 #ifdef MACHDEP_DEBUG
    598 	for (uint32_t i=0; i < map->nmmaps; i++) {
    599 		rmixl_puthex32(i);
    600 		rmixl_puts(", ");
    601 		rmixl_puthex64(map->entry[i].start);
    602 		rmixl_puts(", ");
    603 		rmixl_puthex64(map->entry[i].size);
    604 		rmixl_puts(", ");
    605 		rmixl_puthex32(map->entry[i].type);
    606 		rmixl_puts("\r\n");
    607 	}
    608 #endif
    609 }
    610 
    611 /*
    612  * mem_clusters_init
    613  *
    614  * initialize mem_clusters[] table based on memory address mapping
    615  * provided by boot firmware.
    616  *
    617  * prefer avail_mem_map if we can, otherwise use psb_physaddr_map.
    618  * these will be limited by MEMSIZE if it is configured.
    619  * if neither are available, just use MEMSIZE.
    620  */
    621 static u_long
    622 mem_clusters_init(
    623 	rmixlfw_mmap_t *psb_physaddr_map,
    624 	rmixlfw_mmap_t *avail_mem_map)
    625 {
    626 	rmixlfw_mmap_t *map = NULL;
    627 	const char *mapname;
    628 	uint64_t tmp;
    629 	uint64_t sz;
    630 	uint64_t sum;
    631 	u_int cnt;
    632 #ifdef MEMSIZE
    633 	u_long memsize = MEMSIZE;
    634 #endif
    635 
    636 #ifdef MACHDEP_DEBUG
    637 	rmixl_puts("psb_physaddr_map: ");
    638 	rmixl_puthex64((uint64_t)(intptr_t)psb_physaddr_map);
    639 	rmixl_puts("\r\n");
    640 #endif
    641 	if (psb_physaddr_map != NULL) {
    642 		rmixlfw_phys_mmap = *psb_physaddr_map;
    643 		map = &rmixlfw_phys_mmap;
    644 		mapname = "psb_physaddr_map";
    645 		rmixlfw_mmap_print(map);
    646 	}
    647 #ifdef DIAGNOSTIC
    648 	else {
    649 		rmixl_puts("WARNING: no psb_physaddr_map\r\n");
    650 	}
    651 #endif
    652 
    653 #ifdef MACHDEP_DEBUG
    654 	rmixl_puts("avail_mem_map: ");
    655 	rmixl_puthex64((uint64_t)(intptr_t)avail_mem_map);
    656 	rmixl_puts("\r\n");
    657 #endif
    658 	if (avail_mem_map != NULL) {
    659 		rmixlfw_avail_mmap = *avail_mem_map;
    660 		map = &rmixlfw_avail_mmap;
    661 		mapname = "avail_mem_map";
    662 		rmixlfw_mmap_print(map);
    663 	}
    664 #ifdef DIAGNOSTIC
    665 	else {
    666 		rmixl_puts("WARNING: no avail_mem_map\r\n");
    667 	}
    668 #endif
    669 
    670 	if (map == NULL) {
    671 #ifndef MEMSIZE
    672 		rmixl_puts("panic: no firmware memory map, "
    673 			"must configure MEMSIZE\r\n");
    674 		for(;;);	/* XXX */
    675 #else
    676 #ifdef DIAGNOSTIC
    677 		rmixl_puts("WARNING: no avail_mem_map, "
    678 			"using MEMSIZE\r\n");
    679 #endif
    680 
    681 		mem_clusters[0].start = 0;
    682 		mem_clusters[0].size = MEMSIZE;
    683 		mem_cluster_cnt = 1;
    684 		return MEMSIZE;
    685 #endif	/* MEMSIZE */
    686 	}
    687 
    688 #ifdef DIAGNOSTIC
    689 	rmixl_puts("using ");
    690 	rmixl_puts(mapname);
    691 	rmixl_puts("\r\n");
    692 #endif
    693 #ifdef MACHDEP_DEBUG
    694 	rmixl_puts("memory clusters:\r\n");
    695 #endif
    696 	sum = 0;
    697 	cnt = 0;
    698 	for (uint32_t i=0; i < map->nmmaps; i++) {
    699 		if (map->entry[i].type != RMIXLFW_MMAP_TYPE_RAM)
    700 			continue;
    701 		mem_clusters[cnt].start = map->entry[i].start;
    702 		sz = map->entry[i].size;
    703 		sum += sz;
    704 		mem_clusters[cnt].size = sz;
    705 #ifdef MACHDEP_DEBUG
    706 		rmixl_puthex32(i);
    707 		rmixl_puts(": ");
    708 		rmixl_puthex64(mem_clusters[cnt].start);
    709 		rmixl_puts(", ");
    710 		rmixl_puthex64(sz);
    711 		rmixl_puts(": ");
    712 		rmixl_puthex64(sum);
    713 		rmixl_puts("\r\n");
    714 #endif
    715 #ifdef MEMSIZE
    716 		/*
    717 		 * configurably limit memsize
    718 		 */
    719 		if (sum == memsize)
    720 			break;
    721 		if (sum > memsize) {
    722 			tmp = sum - memsize;
    723 			sz -= tmp;
    724 			sum -= tmp;
    725 			mem_clusters[cnt].size = sz;
    726 			break;
    727 		}
    728 #endif
    729 		cnt++;
    730 	}
    731 	mem_cluster_cnt = cnt;
    732 	return sum;
    733 }
    734 
    735 void
    736 consinit(void)
    737 {
    738 
    739 	/*
    740 	 * Everything related to console initialization is done
    741 	 * in mach_init().
    742 	 */
    743 }
    744 
    745 /*
    746  * Allocate memory for variable-sized tables,
    747  */
    748 void
    749 cpu_startup()
    750 {
    751 	vaddr_t minaddr, maxaddr;
    752 	char pbuf[9];
    753 
    754 	/*
    755 	 * Good {morning,afternoon,evening,night}.
    756 	 */
    757 	printf("%s%s", copyright, version);
    758 	format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
    759 	printf("total memory = %s\n", pbuf);
    760 
    761 	/*
    762 	 * Virtual memory is bootstrapped -- notify the bus spaces
    763 	 * that memory allocation is now safe.
    764 	 */
    765 	rmixl_configuration.rc_mallocsafe = 1;
    766 
    767 	minaddr = 0;
    768 	/*
    769 	 * Allocate a submap for physio.
    770 	 */
    771 	phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
    772 				    VM_PHYS_SIZE, 0, FALSE, NULL);
    773 
    774 	/*
    775 	 * (No need to allocate an mbuf cluster submap.  Mbuf clusters
    776 	 * are allocated via the pool allocator, and we use XKSEG to
    777 	 * map those pages.)
    778 	 */
    779 
    780 	format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
    781 	printf("avail memory = %s\n", pbuf);
    782 }
    783 
    784 int	waittime = -1;
    785 
    786 void
    787 cpu_reboot(int howto, char *bootstr)
    788 {
    789 
    790 	/* Take a snapshot before clobbering any registers. */
    791 	if (curproc)
    792 		savectx(curpcb);
    793 
    794 	if (cold) {
    795 		howto |= RB_HALT;
    796 		goto haltsys;
    797 	}
    798 
    799 	/* If "always halt" was specified as a boot flag, obey. */
    800 	if (boothowto & RB_HALT)
    801 		howto |= RB_HALT;
    802 
    803 	boothowto = howto;
    804 	if ((howto & RB_NOSYNC) == 0 && (waittime < 0)) {
    805 		waittime = 0;
    806 		vfs_shutdown();
    807 
    808 		/*
    809 		 * If we've been adjusting the clock, the todr
    810 		 * will be out of synch; adjust it now.
    811 		 */
    812 		resettodr();
    813 	}
    814 
    815 	splhigh();
    816 
    817 	if (howto & RB_DUMP)
    818 		dumpsys();
    819 
    820 haltsys:
    821 	doshutdownhooks();
    822 
    823 	if (howto & RB_HALT) {
    824 		printf("\n");
    825 		printf("The operating system has halted.\n");
    826 		printf("Please press any key to reboot.\n\n");
    827 		cnpollc(1);	/* For proper keyboard command handling */
    828 		cngetc();
    829 		cnpollc(0);
    830 	}
    831 
    832 	printf("rebooting...\n\n");
    833 
    834 	rmixl_exit(0);
    835 }
    836 
    837 /*
    838  * goodbye world
    839  */
    840 #define GPIO_CPU_RST 0xa0			/* XXX TMP */
    841 void __attribute__((__noreturn__))
    842 rmixl_exit(int howto)
    843 {
    844 	/* use firmware callbak to reboot */
    845 	void (*reset)(void) = (void *)(intptr_t)rmixlfw_info.warm_reset;
    846 	if (reset != 0) {
    847 		(*reset)();
    848 		printf("warm reset callback failed, spinning...\n");
    849 	} else {
    850 		printf("warm reset callback absent, spinning...\n");
    851 	}
    852 	for (;;);
    853 }
    854