machdep.c revision 1.1 
1/* $NetBSD: machdep.c,v 1.1 2017/07/24 08:56:29 mrg Exp $ */
2
3/*
4 * Copyright 2000, 2001
5 * Broadcom Corporation. All rights reserved.
6 *
7 * This software is furnished under license and may be used and copied only
8 * in accordance with the following terms and conditions.  Subject to these
9 * conditions, you may download, copy, install, use, modify and distribute
10 * modified or unmodified copies of this software in source and/or binary
11 * form. No title or ownership is transferred hereby.
12 *
13 * 1) Any source code used, modified or distributed must reproduce and
14 *    retain this copyright notice and list of conditions as they appear in
15 *    the source file.
16 *
17 * 2) No right is granted to use any trade name, trademark, or logo of
18 *    Broadcom Corporation.  The "Broadcom Corporation" name may not be
19 *    used to endorse or promote products derived from this software
20 *    without the prior written permission of Broadcom Corporation.
21 *
22 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
23 *    WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
24 *    MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
25 *    NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
26 *    FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
27 *    LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 *    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 *    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30 *    BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 *    WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
32 *    OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/*
36 * Copyright (c) 2000 Soren S. Jorvang.  All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 *    notice, this list of conditions, and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 *    notice, this list of conditions and the following disclaimer in the
45 *    documentation and/or other materials provided with the distribution.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
50 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
51 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
57 * SUCH DAMAGE.
58 */
59
60#include <sys/cdefs.h>
61__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.1 2017/07/24 08:56:29 mrg Exp $");
62
63#include "opt_ddb.h"
64#include "opt_execfmt.h"
65#include "opt_modular.h"
66
67#include <sys/param.h>
68#include <sys/buf.h>
69#include <sys/conf.h>
70#include <sys/cpu.h>
71#include <sys/device.h>
72#include <sys/exec.h>
73#include <sys/file.h>
74#include <sys/intr.h>
75#include <sys/kcore.h>
76#include <sys/kernel.h>
77#include <sys/ksyms.h>
78#include <sys/malloc.h>
79#include <sys/mbuf.h>
80#include <sys/mount.h>
81#include <sys/msgbuf.h>
82#include <sys/proc.h>
83#include <sys/reboot.h>
84#include <sys/syscallargs.h>
85#include <sys/systm.h>
86
87#include <uvm/uvm_extern.h>
88
89#include <mips/locore.h>
90#include <mips/psl.h>
91#include <mips/pte.h>
92#include <mips/reg.h>
93
94#include <mips/cfe/cfe_api.h>
95
96#include <sbmips/autoconf.h>
97#include <sbmips/swarm.h>
98
99#if 0 /* XXXCGD */
100#include <sbmips/nvram.h>
101#endif /* XXXCGD */
102#include <sbmips/leds.h>
103
104#include <mips/sibyte/dev/sbbuswatchvar.h>
105
106#include "ksyms.h"
107
108#if NKSYMS || defined(DDB) || defined(MODULAR)
109#include <mips/db_machdep.h>
110#include <ddb/db_access.h>
111#include <ddb/db_sym.h>
112#include <ddb/db_extern.h>
113#ifndef DB_ELFSIZE
114#error Must define DB_ELFSIZE!
115#endif
116#define	ELFSIZE		DB_ELFSIZE
117#include <sys/exec_elf.h>
118#endif
119
120#include <dev/cons.h>
121
122#if NKSYMS || defined(DDB) || defined(MODULAR)
123/* start and end of kernel symbol table */
124void	*ksym_start, *ksym_end;
125#endif
126
127/* Maps for VM objects. */
128struct vm_map *phys_map = NULL;
129
130char	bootstring[512];	/* Boot command */
131int	netboot;		/* Are we netbooting? */
132int	cfe_present;
133
134struct bootinfo_v1 bootinfo;
135
136phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
137int mem_cluster_cnt;
138
139void	configure(void);
140void	mach_init(long, long, long, long);
141
142extern void *esym;
143
144/*
145 * Do all the stuff that locore normally does before calling main().
146 */
147void
148mach_init(long fwhandle, long magic, long bootdata, long reserved)
149{
150	void *kernend;
151	extern char edata[], end[];
152	uint32_t config;
153
154	/* XXX this code must run on the target CPU */
155	config = mips3_cp0_config_read();
156	config &= ~MIPS3_CONFIG_K0_MASK;
157	config |= 0x05;				/* XXX.  cacheable coherent */
158	mips3_cp0_config_write(config);
159
160	/* Zero BSS.  XXXCGD: uh, is this really necessary still?  */
161	memset(edata, 0, end - edata);
162
163	/*
164	 * Copy the bootinfo structure from the boot loader.
165	 * this has to be done before mips_vector_init is
166	 * called because we may need CFE's TLB handler
167	 */
168
169	if (magic == BOOTINFO_MAGIC)
170		memcpy(&bootinfo, (struct bootinfo_v1 *)bootdata,
171		    sizeof bootinfo);
172	else if (reserved == CFE_EPTSEAL) {
173		magic = BOOTINFO_MAGIC;
174		memset(&bootinfo, 0, sizeof bootinfo);
175		bootinfo.version = BOOTINFO_VERSION;
176		bootinfo.fwhandle = fwhandle;
177		bootinfo.fwentry = bootdata;
178		bootinfo.ssym = (vaddr_t)end;
179		bootinfo.esym = (vaddr_t)end;
180	}
181
182	kernend = (void *)mips_round_page(end);
183#if NKSYMS || defined(DDB) || defined(MODULAR)
184	if (magic == BOOTINFO_MAGIC) {
185		ksym_start = (void *)(intptr_t)bootinfo.ssym;
186		ksym_end   = (void *)(intptr_t)bootinfo.esym;
187		kernend = (void *)mips_round_page((vaddr_t)ksym_end);
188	}
189#endif
190
191	consinit();
192
193	uvm_md_init();
194
195	/*
196	 * Copy exception-dispatch code down to exception vector.
197	 * Initialize locore-function vector.
198	 * Clear out the I and D caches.
199	 */
200#ifdef MULTIPROCESSOR
201	mips_vector_init(NULL, true);
202#else
203	mips_vector_init(NULL, false);
204#endif
205
206	mips_locoresw.lsw_bus_error = sibyte_bus_watch_check;
207
208	sb1250_ipl_map_init();
209
210#ifdef DEBUG
211	printf("fwhandle=%08X magic=%08X bootdata=%08X reserved=%08X\n",
212	    (u_int)fwhandle, (u_int)magic, (u_int)bootdata, (u_int)reserved);
213#endif
214
215	cpu_setmodel("sb1250");
216
217	if (magic == BOOTINFO_MAGIC) {
218		int idx;
219		int added;
220		uint64_t start, len, type;
221
222		cfe_init(bootinfo.fwhandle, bootinfo.fwentry);
223		cfe_present = 1;
224
225		idx = 0;
226		physmem = 0;
227		mem_cluster_cnt = 0;
228		while (cfe_enummem(idx, 0, &start, &len, &type) == 0) {
229			added = 0;
230			printf("Memory Block #%d start %08"PRIx64"X len %08"PRIx64"X: %s: ",
231			    idx, start, len, (type == CFE_MI_AVAILABLE) ?
232			    "Available" : "Reserved");
233			if ((type == CFE_MI_AVAILABLE) &&
234			    (mem_cluster_cnt < VM_PHYSSEG_MAX)) {
235				/*
236				 * XXX Ignore memory above 256MB for now, it
237				 * XXX needs special handling.
238				 */
239				if (start < (256*1024*1024)) {
240				    physmem += btoc(((int) len));
241				    mem_clusters[mem_cluster_cnt].start =
242					(long) start;
243				    mem_clusters[mem_cluster_cnt].size =
244					(long) len;
245				    mem_cluster_cnt++;
246				    added = 1;
247				}
248			}
249			if (added)
250				printf("added to map\n");
251			else
252				printf("not added to map\n");
253			idx++;
254		}
255
256	} else {
257		/*
258		 * Handle the case of not being called from the firmware.
259		 */
260		/* XXX hardwire to 32MB; should be kernel config option */
261		physmem = 32 * 1024 * 1024 / 4096;
262		mem_clusters[0].start = 0;
263		mem_clusters[0].size = ctob(physmem);
264		mem_cluster_cnt = 1;
265	}
266
267
268	for (u_int i = 0; i < sizeof(bootinfo.boot_flags); i++) {
269		switch (bootinfo.boot_flags[i]) {
270		case '\0':
271			break;
272		case ' ':
273			continue;
274		case '-':
275			while (bootinfo.boot_flags[i] != ' ' &&
276			    bootinfo.boot_flags[i] != '\0') {
277				switch (bootinfo.boot_flags[i]) {
278				case 'a':
279					boothowto |= RB_ASKNAME;
280					break;
281				case 'd':
282					boothowto |= RB_KDB;
283					break;
284				case 's':
285					boothowto |= RB_SINGLE;
286					break;
287				}
288				i++;
289			}
290		}
291	}
292
293	/*
294	 * Load the rest of the available pages into the VM system.
295	 */
296	mips_page_physload(MIPS_KSEG0_START, (vaddr_t) kernend,
297	    mem_clusters, mem_cluster_cnt, NULL, 0);
298
299	/*
300	 * Initialize error message buffer (at end of core).
301	 */
302	mips_init_msgbuf();
303
304	pmap_bootstrap();
305
306	/*
307	 * Allocate uarea for lwp0 and set it.
308	 */
309	mips_init_lwp0_uarea();
310
311	/*
312	 * Initialize debuggers, and break into them, if appropriate.
313	 */
314#if NKSYMS || defined(DDB) || defined(MODULAR)
315	ksyms_addsyms_elf(((uintptr_t)ksym_end - (uintptr_t)ksym_start),
316	    ksym_start, ksym_end);
317#endif
318
319	if (boothowto & RB_KDB) {
320#if defined(DDB)
321		Debugger();
322#endif
323	}
324
325#ifdef MULTIPROCESSOR
326	mips_fixup_exceptions(mips_fixup_zero_relative);
327#endif
328}
329
330/*
331 * Allocate memory for variable-sized tables,
332 */
333void
334cpu_startup(void)
335{
336	/*
337	 * Just do the common stuff.
338	 */
339	cpu_startup_common();
340}
341
342int	waittime = -1;
343
344void
345cpu_reboot(int howto, char *bootstr)
346{
347
348	/* Take a snapshot before clobbering any registers. */
349	savectx(curpcb);
350
351	if (cold) {
352		howto |= RB_HALT;
353		goto haltsys;
354	}
355
356	/* If "always halt" was specified as a boot flag, obey. */
357	if (boothowto & RB_HALT)
358		howto |= RB_HALT;
359
360	boothowto = howto;
361	if ((howto & RB_NOSYNC) == 0 && (waittime < 0)) {
362		waittime = 0;
363		vfs_shutdown();
364
365		/*
366		 * If we've been adjusting the clock, the todr
367		 * will be out of synch; adjust it now.
368		 */
369		resettodr();
370	}
371
372	splhigh();
373
374	if (howto & RB_DUMP)
375		dumpsys();
376
377haltsys:
378	doshutdownhooks();
379
380	pmf_system_shutdown(boothowto);
381
382	if (howto & RB_HALT) {
383		printf("\n");
384		printf("The operating system has halted.\n");
385		printf("Please press any key to reboot.\n\n");
386		cnpollc(1);	/* For proper keyboard command handling */
387		cngetc();
388		cnpollc(0);
389	}
390
391	printf("rebooting...\n\n");
392
393	if (cfe_present) {
394		/*
395		 * XXX
396		 * For some reason we can't return to CFE with
397		 * and do a warm start.  Need to look into this...
398		 */
399		cfe_exit(0, (howto & RB_DUMP) ? 1 : 0);
400		printf("cfe_exit didn't!\n");
401	}
402
403	printf("WARNING: reboot failed!\n");
404
405	for (;;);
406}
407
408static void
409cswarm_setled(u_int index, char c)
410{
411	volatile u_char *led_ptr =
412	    (void *)MIPS_PHYS_TO_KSEG1(SWARM_LEDS_PHYS);
413
414	if (index < 4)
415		led_ptr[0x20 + ((3 - index) << 3)] = c;
416}
417
418void
419cswarm_setleds(const char *str)
420{
421	int i;
422
423	for (i = 0; i < 4 && str[i]; i++)
424		cswarm_setled(i, str[i]);
425	for (; i < 4; i++)
426		cswarm_setled(' ', str[i]);
427}
428
429int
430sbmips_cca_for_pa(paddr_t pa)
431{
432	int rv;
433
434	rv = 2;			/* Uncached. */
435
436	/* Check each DRAM region. */
437	if ((pa >= 0x0000000000   && pa <= 0x000fffffff) ||	/* DRAM 0 */
438	    (pa >= 0x0080000000   && pa <= 0x008fffffff) ||	/* DRAM 1 */
439	    (pa >= 0x0090000000   && pa <= 0x009fffffff) ||	/* DRAM 2 */
440	    (pa >= 0x00c0000000   && pa <= 0x00cfffffff) ||	/* DRAM 3 */
441#ifdef _MIPS_PADDR_T_64BIT
442	    (pa >= 0x0100000000LL && pa <= 0x07ffffffffLL) ||	/* DRAM exp */
443#endif
444	   0) {
445		rv = 5;		/* Cacheable coherent. */
446	}
447
448	return (rv);
449}
450