machdep.c revision 1.2 
1/* $NetBSD: machdep.c,v 1.2 2017/07/24 09:56:45 mrg Exp $ */
2
3/*
4 * Copyright 2000, 2001
5 * Broadcom Corporation. All rights reserved.
6 *
7 * This software is furnished under license and may be used and copied only
8 * in accordance with the following terms and conditions.  Subject to these
9 * conditions, you may download, copy, install, use, modify and distribute
10 * modified or unmodified copies of this software in source and/or binary
11 * form. No title or ownership is transferred hereby.
12 *
13 * 1) Any source code used, modified or distributed must reproduce and
14 *    retain this copyright notice and list of conditions as they appear in
15 *    the source file.
16 *
17 * 2) No right is granted to use any trade name, trademark, or logo of
18 *    Broadcom Corporation.  The "Broadcom Corporation" name may not be
19 *    used to endorse or promote products derived from this software
20 *    without the prior written permission of Broadcom Corporation.
21 *
22 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
23 *    WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
24 *    MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
25 *    NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
26 *    FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
27 *    LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 *    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 *    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30 *    BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 *    WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
32 *    OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/*
36 * Copyright (c) 2000 Soren S. Jorvang.  All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 *    notice, this list of conditions, and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 *    notice, this list of conditions and the following disclaimer in the
45 *    documentation and/or other materials provided with the distribution.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
50 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
51 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
57 * SUCH DAMAGE.
58 */
59
60#include <sys/cdefs.h>
61__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.2 2017/07/24 09:56:45 mrg Exp $");
62
63#include "opt_ddb.h"
64#include "opt_execfmt.h"
65#include "opt_modular.h"
66
67#include <sys/param.h>
68#include <sys/buf.h>
69#include <sys/conf.h>
70#include <sys/cpu.h>
71#include <sys/device.h>
72#include <sys/exec.h>
73#include <sys/file.h>
74#include <sys/intr.h>
75#include <sys/kcore.h>
76#include <sys/kernel.h>
77#include <sys/ksyms.h>
78#include <sys/malloc.h>
79#include <sys/mbuf.h>
80#include <sys/mount.h>
81#include <sys/msgbuf.h>
82#include <sys/proc.h>
83#include <sys/reboot.h>
84#include <sys/syscallargs.h>
85#include <sys/systm.h>
86
87#include <uvm/uvm_extern.h>
88
89#include <mips/locore.h>
90#include <mips/psl.h>
91#include <mips/pte.h>
92#include <mips/reg.h>
93
94#include <mips/cfe/cfe_api.h>
95
96#include <evbmips/sbmips/autoconf.h>
97#include <evbmips/sbmips/swarm.h>
98#include <evbmips/sbmips/systemsw.h>
99
100#if 0 /* XXXCGD */
101#include <evbmips/sbmips/nvram.h>
102#endif /* XXXCGD */
103#include <evbmips/sbmips/leds.h>
104
105#include <mips/sibyte/dev/sbbuswatchvar.h>
106
107#include "ksyms.h"
108
109#if NKSYMS || defined(DDB) || defined(MODULAR)
110#include <mips/db_machdep.h>
111#include <ddb/db_access.h>
112#include <ddb/db_sym.h>
113#include <ddb/db_extern.h>
114#ifndef DB_ELFSIZE
115#error Must define DB_ELFSIZE!
116#endif
117#define	ELFSIZE		DB_ELFSIZE
118#include <sys/exec_elf.h>
119#endif
120
121#include <dev/cons.h>
122
123#if NKSYMS || defined(DDB) || defined(MODULAR)
124/* start and end of kernel symbol table */
125void	*ksym_start, *ksym_end;
126#endif
127
128/* Maps for VM objects. */
129struct vm_map *phys_map = NULL;
130
131char	bootstring[512];	/* Boot command */
132int	netboot;		/* Are we netbooting? */
133int	cfe_present;
134
135struct bootinfo_v1 bootinfo;
136
137phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
138int mem_cluster_cnt;
139
140void	configure(void);
141void	mach_init(long, long, long, long);
142
143extern void *esym;
144
145/*
146 * Do all the stuff that locore normally does before calling main().
147 */
148void
149mach_init(long fwhandle, long magic, long bootdata, long reserved)
150{
151	void *kernend;
152	extern char edata[], end[];
153	uint32_t config;
154
155	/* XXX this code must run on the target CPU */
156	config = mips3_cp0_config_read();
157	config &= ~MIPS3_CONFIG_K0_MASK;
158	config |= 0x05;				/* XXX.  cacheable coherent */
159	mips3_cp0_config_write(config);
160
161	/* Zero BSS.  XXXCGD: uh, is this really necessary still?  */
162	memset(edata, 0, end - edata);
163
164	/*
165	 * Copy the bootinfo structure from the boot loader.
166	 * this has to be done before mips_vector_init is
167	 * called because we may need CFE's TLB handler
168	 */
169
170	if (magic == BOOTINFO_MAGIC)
171		memcpy(&bootinfo, (struct bootinfo_v1 *)bootdata,
172		    sizeof bootinfo);
173	else if (reserved == CFE_EPTSEAL) {
174		magic = BOOTINFO_MAGIC;
175		memset(&bootinfo, 0, sizeof bootinfo);
176		bootinfo.version = BOOTINFO_VERSION;
177		bootinfo.fwhandle = fwhandle;
178		bootinfo.fwentry = bootdata;
179		bootinfo.ssym = (vaddr_t)end;
180		bootinfo.esym = (vaddr_t)end;
181	}
182
183	kernend = (void *)mips_round_page(end);
184#if NKSYMS || defined(DDB) || defined(MODULAR)
185	if (magic == BOOTINFO_MAGIC) {
186		ksym_start = (void *)(intptr_t)bootinfo.ssym;
187		ksym_end   = (void *)(intptr_t)bootinfo.esym;
188		kernend = (void *)mips_round_page((vaddr_t)ksym_end);
189	}
190#endif
191
192	consinit();
193
194	uvm_md_init();
195
196	/*
197	 * Copy exception-dispatch code down to exception vector.
198	 * Initialize locore-function vector.
199	 * Clear out the I and D caches.
200	 */
201#ifdef MULTIPROCESSOR
202	mips_vector_init(NULL, true);
203#else
204	mips_vector_init(NULL, false);
205#endif
206
207	mips_locoresw.lsw_bus_error = sibyte_bus_watch_check;
208
209	sb1250_ipl_map_init();
210
211#ifdef DEBUG
212	printf("fwhandle=%08X magic=%08X bootdata=%08X reserved=%08X\n",
213	    (u_int)fwhandle, (u_int)magic, (u_int)bootdata, (u_int)reserved);
214#endif
215
216	cpu_setmodel("sb1250");
217
218	if (magic == BOOTINFO_MAGIC) {
219		int idx;
220		int added;
221		uint64_t start, len, type;
222
223		cfe_init(bootinfo.fwhandle, bootinfo.fwentry);
224		cfe_present = 1;
225
226		idx = 0;
227		physmem = 0;
228		mem_cluster_cnt = 0;
229		while (cfe_enummem(idx, 0, &start, &len, &type) == 0) {
230			added = 0;
231			printf("Memory Block #%d start %08"PRIx64"X len %08"PRIx64"X: %s: ",
232			    idx, start, len, (type == CFE_MI_AVAILABLE) ?
233			    "Available" : "Reserved");
234			if ((type == CFE_MI_AVAILABLE) &&
235			    (mem_cluster_cnt < VM_PHYSSEG_MAX)) {
236				/*
237				 * XXX Ignore memory above 256MB for now, it
238				 * XXX needs special handling.
239				 */
240				if (start < (256*1024*1024)) {
241				    physmem += btoc(((int) len));
242				    mem_clusters[mem_cluster_cnt].start =
243					(long) start;
244				    mem_clusters[mem_cluster_cnt].size =
245					(long) len;
246				    mem_cluster_cnt++;
247				    added = 1;
248				}
249			}
250			if (added)
251				printf("added to map\n");
252			else
253				printf("not added to map\n");
254			idx++;
255		}
256
257	} else {
258		/*
259		 * Handle the case of not being called from the firmware.
260		 */
261		/* XXX hardwire to 32MB; should be kernel config option */
262		physmem = 32 * 1024 * 1024 / 4096;
263		mem_clusters[0].start = 0;
264		mem_clusters[0].size = ctob(physmem);
265		mem_cluster_cnt = 1;
266	}
267
268
269	for (u_int i = 0; i < sizeof(bootinfo.boot_flags); i++) {
270		switch (bootinfo.boot_flags[i]) {
271		case '\0':
272			break;
273		case ' ':
274			continue;
275		case '-':
276			while (bootinfo.boot_flags[i] != ' ' &&
277			    bootinfo.boot_flags[i] != '\0') {
278				switch (bootinfo.boot_flags[i]) {
279				case 'a':
280					boothowto |= RB_ASKNAME;
281					break;
282				case 'd':
283					boothowto |= RB_KDB;
284					break;
285				case 's':
286					boothowto |= RB_SINGLE;
287					break;
288				}
289				i++;
290			}
291		}
292	}
293
294	/*
295	 * Load the rest of the available pages into the VM system.
296	 */
297	mips_page_physload(MIPS_KSEG0_START, (vaddr_t) kernend,
298	    mem_clusters, mem_cluster_cnt, NULL, 0);
299
300	/*
301	 * Initialize error message buffer (at end of core).
302	 */
303	mips_init_msgbuf();
304
305	pmap_bootstrap();
306
307	/*
308	 * Allocate uarea for lwp0 and set it.
309	 */
310	mips_init_lwp0_uarea();
311
312	/*
313	 * Initialize debuggers, and break into them, if appropriate.
314	 */
315#if NKSYMS || defined(DDB) || defined(MODULAR)
316	ksyms_addsyms_elf(((uintptr_t)ksym_end - (uintptr_t)ksym_start),
317	    ksym_start, ksym_end);
318#endif
319
320	if (boothowto & RB_KDB) {
321#if defined(DDB)
322		Debugger();
323#endif
324	}
325
326#ifdef MULTIPROCESSOR
327	mips_fixup_exceptions(mips_fixup_zero_relative);
328#endif
329}
330
331/*
332 * Allocate memory for variable-sized tables,
333 */
334void
335cpu_startup(void)
336{
337	/*
338	 * Just do the common stuff.
339	 */
340	cpu_startup_common();
341}
342
343int	waittime = -1;
344
345void
346cpu_reboot(int howto, char *bootstr)
347{
348
349	/* Take a snapshot before clobbering any registers. */
350	savectx(curpcb);
351
352	if (cold) {
353		howto |= RB_HALT;
354		goto haltsys;
355	}
356
357	/* If "always halt" was specified as a boot flag, obey. */
358	if (boothowto & RB_HALT)
359		howto |= RB_HALT;
360
361	boothowto = howto;
362	if ((howto & RB_NOSYNC) == 0 && (waittime < 0)) {
363		waittime = 0;
364		vfs_shutdown();
365
366		/*
367		 * If we've been adjusting the clock, the todr
368		 * will be out of synch; adjust it now.
369		 */
370		resettodr();
371	}
372
373	splhigh();
374
375	if (howto & RB_DUMP)
376		dumpsys();
377
378haltsys:
379	doshutdownhooks();
380
381	pmf_system_shutdown(boothowto);
382
383	if (howto & RB_HALT) {
384		printf("\n");
385		printf("The operating system has halted.\n");
386		printf("Please press any key to reboot.\n\n");
387		cnpollc(1);	/* For proper keyboard command handling */
388		cngetc();
389		cnpollc(0);
390	}
391
392	printf("rebooting...\n\n");
393
394	if (cfe_present) {
395		/*
396		 * XXX
397		 * For some reason we can't return to CFE with
398		 * and do a warm start.  Need to look into this...
399		 */
400		cfe_exit(0, (howto & RB_DUMP) ? 1 : 0);
401		printf("cfe_exit didn't!\n");
402	}
403
404	printf("WARNING: reboot failed!\n");
405
406	for (;;);
407}
408
409static void
410cswarm_setled(u_int index, char c)
411{
412	volatile u_char *led_ptr =
413	    (void *)MIPS_PHYS_TO_KSEG1(SWARM_LEDS_PHYS);
414
415	if (index < 4)
416		led_ptr[0x20 + ((3 - index) << 3)] = c;
417}
418
419void
420cswarm_setleds(const char *str)
421{
422	int i;
423
424	for (i = 0; i < 4 && str[i]; i++)
425		cswarm_setled(i, str[i]);
426	for (; i < 4; i++)
427		cswarm_setled(' ', str[i]);
428}
429
430int
431sbmips_cca_for_pa(paddr_t pa)
432{
433	int rv;
434
435	rv = 2;			/* Uncached. */
436
437	/* Check each DRAM region. */
438	if ((pa >= 0x0000000000   && pa <= 0x000fffffff) ||	/* DRAM 0 */
439	    (pa >= 0x0080000000   && pa <= 0x008fffffff) ||	/* DRAM 1 */
440	    (pa >= 0x0090000000   && pa <= 0x009fffffff) ||	/* DRAM 2 */
441	    (pa >= 0x00c0000000   && pa <= 0x00cfffffff) ||	/* DRAM 3 */
442#ifdef _MIPS_PADDR_T_64BIT
443	    (pa >= 0x0100000000LL && pa <= 0x07ffffffffLL) ||	/* DRAM exp */
444#endif
445	   0) {
446		rv = 5;		/* Cacheable coherent. */
447	}
448
449	return (rv);
450}
451