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ev64260_locore.S revision 1.20
      1 /*	$NetBSD: ev64260_locore.S,v 1.20 2018/07/15 05:16:42 maxv Exp $	*/
      2 /*	$OpenBSD: locore.S,v 1.4 1997/01/26 09:06:38 rahnds Exp $	*/
      3 
      4 /*
      5  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
      6  * Copyright (C) 1995, 1996 TooLs GmbH.
      7  * All rights reserved.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed by TooLs GmbH.
     20  * 4. The name of TooLs GmbH may not be used to endorse or promote products
     21  *    derived from this software without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
     24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     26  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     28  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     29  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     30  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     31  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     32  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33  */
     34 
     35 #include "opt_ddb.h"
     36 #include "opt_ppcparam.h"
     37 #include "opt_modular.h"
     38 #include "opt_multiprocessor.h"
     39 #include "opt_openpic.h"
     40 #include "assym.h"
     41 
     42 #include <sys/syscall.h>
     43 
     44 #include <machine/param.h>
     45 #include <machine/psl.h>
     46 #include <machine/trap.h>
     47 #include <machine/asm.h>
     48 
     49 #include <powerpc/spr.h>
     50 #include <powerpc/oea/spr.h>
     51 #include <powerpc/oea/bat.h>
     52 #include <powerpc/oea/hid.h>
     53 
     54 /*
     55  * Some instructions gas doesn't understand (yet?)
     56  */
     57 #define	bdneq	bdnzf 2,
     58 
     59 /*
     60  * Globals
     61  */
     62 GLOBAL(startsym)
     63 	.long	0			/* start symbol table */
     64 GLOBAL(endsym)
     65 	.long	0			/* end symbol table */
     66 GLOBAL(oeacpufeat)
     67 	.long	0			/* cpu features */
     68 /*
     69  * File-scope for locore.S
     70  */
     71 #ifdef DINK
     72 	.data
     73 dink_return:
     74 	.long	0			/* fake uarea during idle after exit */
     75 dink_stack:
     76 	.long	0			/* fake uarea during idle after exit */
     77 #endif
     78 
     79 
     80 /*
     81  * This symbol is here for the benefit of kvm_mkdb, and is supposed to
     82  * mark the start of kernel text.
     83  */
     84 	.text
     85 	.globl	_C_LABEL(kernel_text)
     86 _C_LABEL(kernel_text):
     87 
     88 /*
     89  * Startup entry.  Note, this must be the first thing in the text
     90  * segment!
     91  */
     92 	.text
     93 	.globl	__start
     94 __start:
     95 #ifdef DINK
     96 	mflr	0
     97 	lis	8, dink_stack@ha
     98 	stw	1, dink_stack@l(8)
     99 	lis	8, dink_return@ha
    100 	stw	0, dink_return@l(8)
    101 #endif
    102 
    103 #if 0
    104 	eieio; sync
    105 	lis	8, 0xf100f104@ha
    106 	lwz	7, -3836(8)
    107 	li	0, 1
    108 	andc	7,7,0
    109 	stw	7, -3836(8)
    110 	eieio; sync
    111 #endif
    112 
    113 	/*
    114 	 * Make sure that .bss is zeroed.
    115 	 */
    116 	li	0,0
    117 	lis	8,edata@ha
    118 	addi	8,8,edata@l
    119 	lis	9,end@ha
    120 	addi	9,9,end@l
    121 5:	cmpw	0,8,9			/* edata & end are >= word aligned */
    122 	bge	6f
    123 	stw	0,0(8)
    124 	addi	8,8,4
    125 	b	5b
    126 6:
    127 
    128 	li	0,0
    129 	mtmsr	0			/* Disable FPU/MMU/exceptions */
    130 	sync ; isync
    131 
    132 #if 1
    133 	mfpvr	0
    134 	srwi	0,0,16
    135 	cmplwi	0,MPC7410
    136 	bne	16f
    137 
    138 #if 0
    139 	/* flush and disable L2 */
    140 	mfspr	8,SPR_L2CR
    141 	lis	0,(L2CR_L2E|L2CR_L2WT)@h	/* disable the L2 mode */
    142 	andc	8,8,0
    143 	ori	8,8,L2CR_L2HWF		/* enable hardware flush */
    144 	sync
    145 	mtspr	SPR_L2CR,8		/* do it */
    146 	sync				/* wait for it to finish */
    147 
    148 	/* Disable data lock mode */
    149 	mfspr	8,SPR_HID0
    150 	li	0,HID0_DLOCK
    151 	andc	8,8,0
    152 	mtspr	SPR_HID0,8
    153 	sync
    154 #endif
    155 #if 0
    156 	/*
    157 	 * Flush the L1 cache
    158 	 */
    159 	mfspr	8,SPR_MSSCR0
    160 	oris	8,8,MSSCR0_DL1HWF@h
    161 	sync
    162 	mtspr	SPR_MSSCR0,8
    163 	sync
    164 #endif
    165 #if 1
    166 	/* disable data and instruction caches */
    167 	mfspr	8,SPR_HID0
    168 	li	0,HID0_DLOCK@l
    169 	andc	8,8,0
    170 	sync
    171 	mtspr	SPR_HID0,8
    172 	sync
    173 	isync
    174 #endif
    175 7:
    176 #if 0
    177 	/* disable data and instruction caches */
    178 	mfspr	8,SPR_HID0
    179 	li	0,(HID0_ICE|HID0_DCE)@l
    180 	andc	8,8,0
    181 	sync
    182 	mtspr	SPR_HID0,8
    183 	sync
    184 	isync
    185 #endif
    186 7:
    187 #if 0
    188 	/* Enable and flush data and instruction caches */
    189 	ori	8,8,(HID0_ICFI|HID0_ICE|HID0_DCFI|HID0_DCE)
    190 #	ori	8,8,(HID0_ICFI|HID0_ICE)
    191 	mtspr	SPR_HID0,8
    192 	isync
    193 8:	sync
    194 	mfspr	8,SPR_HID0
    195 	andi.	0,8,(HID0_ICFI|HID0_DCFI)
    196 	bne	8b
    197 #endif
    198 
    199 #if 0
    200 	mfspr	8,SPR_L2CR
    201 	oris	8,8,L2CR_L2E@h
    202 	sync
    203 	mtspr	SPR_L2CR,8
    204 	sync
    205 #endif
    206 16:
    207 #endif
    208 
    209 /* compute end of kernel memory */
    210 	lis	8,_C_LABEL(end)@ha
    211 	addi	8,8,_C_LABEL(end)@l
    212 #if NKSYMS || defined(DDB) || defined(MODULAR)
    213 	lis	7,_C_LABEL(startsym)@ha
    214 	addi	7,7,_C_LABEL(startsym)@l
    215 	stw	3,0(7)
    216 	lis	7,_C_LABEL(endsym)@ha
    217 	addi	7,7,_C_LABEL(endsym)@l
    218 	stw	4,0(7)
    219 /*	mr	8,4			* end of symbol table */
    220 #endif
    221 	mr	4,8			/* end of mem reserved for kernel */
    222 	INIT_CPUINFO(4,1,9,0)
    223 
    224 	lis	3,__start@ha
    225 	addi	3,3,__start@l
    226 	li	5,0
    227 	li	6,0
    228 
    229 	bl	_C_LABEL(cpu_model_init)
    230 	bl	_C_LABEL(initppc)
    231 	bl	_C_LABEL(main)
    232 
    233 loop:	b	loop			/* XXX not reached */
    234 
    235 #if 0
    236 	.globl	_C_LABEL(extintr_enable)
    237 _C_LABEL(extintr_enable):
    238 	mfmsr	3
    239 	ori	3,3,PSL_EE@l
    240 	sync
    241 	mtmsr	3
    242 	blr
    243 
    244 	.globl	_C_LABEL(extintr_restore)
    245 _C_LABEL(extintr_restore):
    246 	mfmsr	4
    247 	or	3,4,3
    248 	sync
    249 	mtmsr	3
    250 	blr
    251 
    252 	.globl	_C_LABEL(extintr_disable)
    253 _C_LABEL(extintr_disable):
    254 	mfmsr	3
    255 	andi.	4,3,~PSL_EE@l
    256 	sync
    257 	mtmsr	4
    258 	andi.	3,3,PSL_EE@l
    259 	blr
    260 
    261 	.globl	_C_LABEL(mvpppc_reboot)
    262 _C_LABEL(mvpppc_reboot):
    263 	mfmsr	3
    264 	ori	3,3,PSL_IP@l
    265 	sync
    266 	mtmsr	3
    267 	b	0xFFF00100
    268 #endif
    269 
    270 #ifdef DINK
    271 	.globl	_C_LABEL(return_to_dink)
    272 _C_LABEL(return_to_dink):
    273 	sync
    274 	lis	4, dink_stack@ha
    275 	lwz	1, dink_stack@l(4)
    276 	lis	4, dink_return@ha
    277 	lwz	5, dink_return@l(4)
    278 	mtlr	5
    279 	blr
    280 #endif
    281 
    282 /*
    283  * Include common switch / setfault code
    284  */
    285 #include <powerpc/powerpc/locore_subr.S>
    286 
    287 /*
    288  * Include common trap / exception code
    289  */
    290 #include <powerpc/powerpc/trap_subr.S>
    291 
    292 /*
    293  * Include PIO routines
    294  */
    295 #include <powerpc/powerpc/pio_subr.S>
    296