gt_mainbus.c revision 1.6 1 1.6 matt /* $NetBSD: gt_mainbus.c,v 1.6 2003/03/18 19:35:01 matt Exp $ */
2 1.1 matt
3 1.1 matt /*
4 1.1 matt * Copyright (c) 2002 Wasabi Systems, Inc.
5 1.1 matt * All rights reserved.
6 1.1 matt *
7 1.1 matt * Written by Allen Briggs for Wasabi Systems, Inc.
8 1.1 matt *
9 1.1 matt * Redistribution and use in source and binary forms, with or without
10 1.1 matt * modification, are permitted provided that the following conditions
11 1.1 matt * are met:
12 1.1 matt * 1. Redistributions of source code must retain the above copyright
13 1.1 matt * notice, this list of conditions and the following disclaimer.
14 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 matt * notice, this list of conditions and the following disclaimer in the
16 1.1 matt * documentation and/or other materials provided with the distribution.
17 1.1 matt * 3. All advertising materials mentioning features or use of this software
18 1.1 matt * must display the following acknowledgement:
19 1.1 matt * This product includes software developed for the NetBSD Project by
20 1.1 matt * Wasabi Systems, Inc.
21 1.1 matt * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 matt * or promote products derived from this software without specific prior
23 1.1 matt * written permission.
24 1.1 matt *
25 1.1 matt * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 matt * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
36 1.1 matt */
37 1.1 matt
38 1.1 matt #include <sys/types.h>
39 1.1 matt #include <sys/param.h>
40 1.1 matt #include <sys/device.h>
41 1.1 matt #include <sys/extent.h>
42 1.1 matt #include <sys/malloc.h>
43 1.1 matt
44 1.1 matt #define _POWERPC_BUS_DMA_PRIVATE
45 1.1 matt #include <machine/bus.h>
46 1.1 matt
47 1.3 matt #include "opt_pci.h"
48 1.1 matt #include <dev/pci/pcivar.h>
49 1.1 matt #include <dev/pci/pciconf.h>
50 1.1 matt
51 1.1 matt #include "opt_marvell.h"
52 1.1 matt #include <dev/marvell/gtreg.h>
53 1.1 matt #include <dev/marvell/gtvar.h>
54 1.1 matt #include <dev/marvell/gtpcireg.h>
55 1.1 matt #include <dev/marvell/gtpcivar.h>
56 1.1 matt
57 1.3 matt extern struct powerpc_bus_space gt_mem_bs_tag;
58 1.3 matt extern struct powerpc_bus_space gt_pci0_mem_bs_tag;
59 1.3 matt extern struct powerpc_bus_space gt_pci0_io_bs_tag;
60 1.3 matt extern struct powerpc_bus_space gt_pci1_mem_bs_tag;
61 1.3 matt extern struct powerpc_bus_space gt_pci1_io_bs_tag;
62 1.1 matt
63 1.1 matt struct powerpc_bus_dma_tag gt_bus_dma_tag = {
64 1.1 matt 0, /* _bounce_thresh */
65 1.1 matt _bus_dmamap_create,
66 1.1 matt _bus_dmamap_destroy,
67 1.1 matt _bus_dmamap_load,
68 1.1 matt _bus_dmamap_load_mbuf,
69 1.1 matt _bus_dmamap_load_uio,
70 1.1 matt _bus_dmamap_load_raw,
71 1.1 matt _bus_dmamap_unload,
72 1.1 matt _bus_dmamap_sync,
73 1.1 matt _bus_dmamem_alloc,
74 1.1 matt _bus_dmamem_free,
75 1.1 matt _bus_dmamem_map,
76 1.1 matt _bus_dmamem_unmap,
77 1.1 matt _bus_dmamem_mmap,
78 1.1 matt };
79 1.1 matt
80 1.1 matt static int gt_match(struct device *, struct cfdata *, void *);
81 1.1 matt static void gt_attach(struct device *, struct device *, void *);
82 1.1 matt
83 1.1 matt CFATTACH_DECL(gt, sizeof(struct gt_softc), gt_match, gt_attach, NULL, NULL);
84 1.1 matt
85 1.1 matt extern struct cfdriver gt_cd;
86 1.4 matt extern bus_space_handle_t gt_memh;
87 1.1 matt
88 1.1 matt static int gt_found;
89 1.1 matt
90 1.1 matt int
91 1.1 matt gt_match(struct device *parent, struct cfdata *cf, void *aux)
92 1.1 matt {
93 1.4 matt const char **busname = aux;
94 1.1 matt
95 1.4 matt if (strcmp(*busname, gt_cd.cd_name) != 0)
96 1.1 matt return 0;
97 1.1 matt
98 1.1 matt if (gt_found)
99 1.1 matt return 0;
100 1.1 matt
101 1.1 matt return 1;
102 1.1 matt }
103 1.1 matt
104 1.1 matt void
105 1.1 matt gt_attach(struct device *parent, struct device *self, void *aux)
106 1.1 matt {
107 1.1 matt struct gt_softc *gt = (struct gt_softc *) self;
108 1.1 matt
109 1.1 matt gt->gt_dmat = >_bus_dma_tag;
110 1.3 matt gt->gt_memt = >_mem_bs_tag;
111 1.6 matt gt->gt_pci0_memt = >_pci0_mem_bs_tag;
112 1.6 matt gt->gt_pci0_iot = >_pci0_io_bs_tag;
113 1.6 matt gt->gt_pci1_memt = >_pci1_mem_bs_tag;
114 1.6 matt gt->gt_pci1_iot = >_pci1_io_bs_tag;
115 1.1 matt
116 1.4 matt gt->gt_memh = gt_memh;
117 1.1 matt
118 1.6 matt #if 0
119 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI0_IO_Low_Decode,
120 1.3 matt gt_pci0_io_bs_tag.pbs_offset + gt_pci0_io_bs_tag.pbs_base);
121 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI0_IO_High_Decode,
122 1.3 matt gt_pci0_io_bs_tag.pbs_offset + gt_pci0_io_bs_tag.pbs_limit - 1);
123 1.3 matt
124 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI1_IO_Low_Decode,
125 1.3 matt gt_pci1_io_bs_tag.pbs_offset + gt_pci1_io_bs_tag.pbs_base);
126 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI1_IO_High_Decode,
127 1.3 matt gt_pci1_io_bs_tag.pbs_offset + gt_pci1_io_bs_tag.pbs_limit - 1);
128 1.3 matt
129 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI0_Mem0_Low_Decode,
130 1.3 matt gt_pci0_mem_bs_tag.pbs_offset + gt_pci0_mem_bs_tag.pbs_base);
131 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI0_Mem0_High_Decode,
132 1.3 matt gt_pci1_mem_bs_tag.pbs_offset + gt_pci1_mem_bs_tag.pbs_limit - 1);
133 1.3 matt
134 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI1_Mem0_Low_Decode,
135 1.3 matt gt_pci1_mem_bs_tag.pbs_offset + gt_pci1_mem_bs_tag.pbs_base);
136 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI1_Mem0_High_Decode,
137 1.3 matt gt_pci1_mem_bs_tag.pbs_offset + gt_pci1_mem_bs_tag.pbs_limit - 1);
138 1.1 matt #endif
139 1.4 matt
140 1.4 matt gt_attach_common(gt);
141 1.1 matt }
142 1.1 matt
143 1.1 matt void
144 1.6 matt gtpci_bus_configure(struct gtpci_chipset *gtpc)
145 1.1 matt {
146 1.3 matt #ifdef PCI_NETBSD_CONFIGURE
147 1.1 matt struct extent *ioext, *memext;
148 1.1 matt
149 1.6 matt switch (gtpc->gtpc_busno) {
150 1.1 matt case 0:
151 1.3 matt ioext = extent_create("pci0-io", 0x00000600, 0x0000ffff,
152 1.3 matt M_DEVBUF, NULL, 0, EX_NOWAIT);
153 1.3 matt memext = extent_create("pci0-mem",
154 1.3 matt gt_pci0_mem_bs_tag.pbs_base,
155 1.3 matt gt_pci0_mem_bs_tag.pbs_limit-1,
156 1.3 matt M_DEVBUF, NULL, 0, EX_NOWAIT);
157 1.1 matt break;
158 1.1 matt case 1:
159 1.3 matt ioext = extent_create("pci1-io", 0x00000600, 0x0000ffff,
160 1.3 matt M_DEVBUF, NULL, 0, EX_NOWAIT);
161 1.3 matt memext = extent_create("pci1-mem",
162 1.3 matt gt_pci1_mem_bs_tag.pbs_base,
163 1.3 matt gt_pci1_mem_bs_tag.pbs_limit-1,
164 1.3 matt M_DEVBUF, NULL, 0, EX_NOWAIT);
165 1.1 matt break;
166 1.1 matt }
167 1.1 matt
168 1.6 matt pci_configure_bus(>pc->gtpc_pc, ioext, memext, NULL, 0, 32);
169 1.1 matt
170 1.1 matt extent_destroy(ioext);
171 1.1 matt extent_destroy(memext);
172 1.3 matt #endif /* PCI_NETBSD_CONFIGURE */
173 1.3 matt }
174 1.3 matt
175 1.3 matt void
176 1.3 matt gtpci_md_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int pin,
177 1.3 matt int swiz, int *iline)
178 1.3 matt {
179 1.3 matt #ifdef PCI_NETBSD_CONFIGURE
180 1.4 matt struct gtpci_chipset *gtpc = (struct gtpci_chipset *)pc;
181 1.4 matt if (gtpc->gtpc_busno == 0)
182 1.4 matt *iline = IRQ_GPP_BASE + 27;
183 1.4 matt else
184 1.4 matt *iline = IRQ_GPP_BASE + 29;
185 1.3 matt #endif /* PCI_NETBSD_CONFIGURE */
186 1.1 matt }
187 1.1 matt
188 1.1 matt void
189 1.1 matt gtpci_md_bus_devorder(pci_chipset_tag_t pc, int busno, char devs[])
190 1.1 matt {
191 1.1 matt int i;
192 1.1 matt
193 1.6 matt /*
194 1.6 matt * Don't bother probing the GT itself.
195 1.6 matt */
196 1.6 matt for (i = (busno == 0); i < 32; i++)
197 1.1 matt *devs++ = i;
198 1.1 matt *devs = -1;
199 1.1 matt }
200 1.1 matt
201 1.1 matt int
202 1.1 matt gtpci_md_conf_hook(pci_chipset_tag_t pc, int bus, int dev, int func,
203 1.1 matt pcireg_t id)
204 1.1 matt {
205 1.6 matt if (bus == 0 && dev == 0) /* don't configure GT */
206 1.1 matt return 0;
207 1.1 matt
208 1.6 matt return PCI_CONF_ALL /* PCI_CONF_MAP_MEM|PCI_CONF_ENABLE_MEM */;
209 1.1 matt }
210 1.1 matt
211 1.1 matt int
212 1.1 matt gtpci_md_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
213 1.1 matt {
214 1.1 matt int pin = pa->pa_intrpin;
215 1.1 matt int line = pa->pa_intrline;
216 1.1 matt
217 1.1 matt if (pin > 4) {
218 1.1 matt printf("pci_intr_map: bad interrupt pin %d\n", pin);
219 1.1 matt *ihp = -1;
220 1.1 matt return 1;
221 1.1 matt }
222 1.1 matt
223 1.1 matt *ihp = line;
224 1.1 matt return 0;
225 1.1 matt }
226