gt_mainbus.c revision 1.9 1 1.9 lukem /* $NetBSD: gt_mainbus.c,v 1.9 2003/07/15 01:37:35 lukem Exp $ */
2 1.1 matt
3 1.1 matt /*
4 1.1 matt * Copyright (c) 2002 Wasabi Systems, Inc.
5 1.1 matt * All rights reserved.
6 1.1 matt *
7 1.1 matt * Written by Allen Briggs for Wasabi Systems, Inc.
8 1.1 matt *
9 1.1 matt * Redistribution and use in source and binary forms, with or without
10 1.1 matt * modification, are permitted provided that the following conditions
11 1.1 matt * are met:
12 1.1 matt * 1. Redistributions of source code must retain the above copyright
13 1.1 matt * notice, this list of conditions and the following disclaimer.
14 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 matt * notice, this list of conditions and the following disclaimer in the
16 1.1 matt * documentation and/or other materials provided with the distribution.
17 1.1 matt * 3. All advertising materials mentioning features or use of this software
18 1.1 matt * must display the following acknowledgement:
19 1.1 matt * This product includes software developed for the NetBSD Project by
20 1.1 matt * Wasabi Systems, Inc.
21 1.1 matt * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 matt * or promote products derived from this software without specific prior
23 1.1 matt * written permission.
24 1.1 matt *
25 1.1 matt * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 matt * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
36 1.1 matt */
37 1.1 matt
38 1.9 lukem #include <sys/cdefs.h>
39 1.9 lukem __KERNEL_RCSID(0, "$NetBSD: gt_mainbus.c,v 1.9 2003/07/15 01:37:35 lukem Exp $");
40 1.9 lukem
41 1.7 matt #include "opt_ev64260.h"
42 1.9 lukem
43 1.1 matt #include <sys/types.h>
44 1.1 matt #include <sys/param.h>
45 1.1 matt #include <sys/device.h>
46 1.1 matt #include <sys/extent.h>
47 1.1 matt #include <sys/malloc.h>
48 1.1 matt
49 1.1 matt #define _POWERPC_BUS_DMA_PRIVATE
50 1.1 matt #include <machine/bus.h>
51 1.1 matt
52 1.3 matt #include "opt_pci.h"
53 1.1 matt #include <dev/pci/pcivar.h>
54 1.1 matt #include <dev/pci/pciconf.h>
55 1.1 matt
56 1.1 matt #include "opt_marvell.h"
57 1.1 matt #include <dev/marvell/gtreg.h>
58 1.1 matt #include <dev/marvell/gtvar.h>
59 1.1 matt #include <dev/marvell/gtpcireg.h>
60 1.1 matt #include <dev/marvell/gtpcivar.h>
61 1.1 matt
62 1.3 matt extern struct powerpc_bus_space gt_mem_bs_tag;
63 1.3 matt extern struct powerpc_bus_space gt_pci0_mem_bs_tag;
64 1.3 matt extern struct powerpc_bus_space gt_pci0_io_bs_tag;
65 1.3 matt extern struct powerpc_bus_space gt_pci1_mem_bs_tag;
66 1.3 matt extern struct powerpc_bus_space gt_pci1_io_bs_tag;
67 1.1 matt
68 1.1 matt struct powerpc_bus_dma_tag gt_bus_dma_tag = {
69 1.1 matt 0, /* _bounce_thresh */
70 1.1 matt _bus_dmamap_create,
71 1.1 matt _bus_dmamap_destroy,
72 1.1 matt _bus_dmamap_load,
73 1.1 matt _bus_dmamap_load_mbuf,
74 1.1 matt _bus_dmamap_load_uio,
75 1.1 matt _bus_dmamap_load_raw,
76 1.1 matt _bus_dmamap_unload,
77 1.1 matt _bus_dmamap_sync,
78 1.1 matt _bus_dmamem_alloc,
79 1.1 matt _bus_dmamem_free,
80 1.1 matt _bus_dmamem_map,
81 1.1 matt _bus_dmamem_unmap,
82 1.1 matt _bus_dmamem_mmap,
83 1.1 matt };
84 1.1 matt
85 1.7 matt const int gtpci_skipmask[2] = {
86 1.7 matt #ifdef PCI0_SKIPMASK
87 1.7 matt PCI0_SKIPMASK,
88 1.7 matt #else
89 1.7 matt 0,
90 1.7 matt #endif
91 1.7 matt #ifdef PCI1_SKIPMASK
92 1.7 matt PCI1_SKIPMASK,
93 1.7 matt #else
94 1.7 matt 0,
95 1.7 matt #endif
96 1.7 matt };
97 1.7 matt
98 1.1 matt static int gt_match(struct device *, struct cfdata *, void *);
99 1.1 matt static void gt_attach(struct device *, struct device *, void *);
100 1.1 matt
101 1.1 matt CFATTACH_DECL(gt, sizeof(struct gt_softc), gt_match, gt_attach, NULL, NULL);
102 1.1 matt
103 1.1 matt extern struct cfdriver gt_cd;
104 1.4 matt extern bus_space_handle_t gt_memh;
105 1.1 matt
106 1.1 matt static int gt_found;
107 1.1 matt
108 1.1 matt int
109 1.1 matt gt_match(struct device *parent, struct cfdata *cf, void *aux)
110 1.1 matt {
111 1.4 matt const char **busname = aux;
112 1.1 matt
113 1.4 matt if (strcmp(*busname, gt_cd.cd_name) != 0)
114 1.1 matt return 0;
115 1.1 matt
116 1.1 matt if (gt_found)
117 1.1 matt return 0;
118 1.1 matt
119 1.1 matt return 1;
120 1.1 matt }
121 1.1 matt
122 1.1 matt void
123 1.1 matt gt_attach(struct device *parent, struct device *self, void *aux)
124 1.1 matt {
125 1.1 matt struct gt_softc *gt = (struct gt_softc *) self;
126 1.1 matt
127 1.1 matt gt->gt_dmat = >_bus_dma_tag;
128 1.3 matt gt->gt_memt = >_mem_bs_tag;
129 1.6 matt gt->gt_pci0_memt = >_pci0_mem_bs_tag;
130 1.6 matt gt->gt_pci0_iot = >_pci0_io_bs_tag;
131 1.8 scw gt->gt_pci0_host = TRUE;
132 1.6 matt gt->gt_pci1_memt = >_pci1_mem_bs_tag;
133 1.6 matt gt->gt_pci1_iot = >_pci1_io_bs_tag;
134 1.8 scw gt->gt_pci1_host = TRUE;
135 1.1 matt
136 1.4 matt gt->gt_memh = gt_memh;
137 1.1 matt
138 1.6 matt #if 0
139 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI0_IO_Low_Decode,
140 1.3 matt gt_pci0_io_bs_tag.pbs_offset + gt_pci0_io_bs_tag.pbs_base);
141 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI0_IO_High_Decode,
142 1.3 matt gt_pci0_io_bs_tag.pbs_offset + gt_pci0_io_bs_tag.pbs_limit - 1);
143 1.3 matt
144 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI1_IO_Low_Decode,
145 1.3 matt gt_pci1_io_bs_tag.pbs_offset + gt_pci1_io_bs_tag.pbs_base);
146 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI1_IO_High_Decode,
147 1.3 matt gt_pci1_io_bs_tag.pbs_offset + gt_pci1_io_bs_tag.pbs_limit - 1);
148 1.3 matt
149 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI0_Mem0_Low_Decode,
150 1.3 matt gt_pci0_mem_bs_tag.pbs_offset + gt_pci0_mem_bs_tag.pbs_base);
151 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI0_Mem0_High_Decode,
152 1.3 matt gt_pci1_mem_bs_tag.pbs_offset + gt_pci1_mem_bs_tag.pbs_limit - 1);
153 1.3 matt
154 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI1_Mem0_Low_Decode,
155 1.3 matt gt_pci1_mem_bs_tag.pbs_offset + gt_pci1_mem_bs_tag.pbs_base);
156 1.3 matt GT_DecodeAddr_SET(gt, GT_PCI1_Mem0_High_Decode,
157 1.3 matt gt_pci1_mem_bs_tag.pbs_offset + gt_pci1_mem_bs_tag.pbs_limit - 1);
158 1.1 matt #endif
159 1.4 matt
160 1.4 matt gt_attach_common(gt);
161 1.1 matt }
162 1.1 matt
163 1.1 matt void
164 1.6 matt gtpci_bus_configure(struct gtpci_chipset *gtpc)
165 1.1 matt {
166 1.3 matt #ifdef PCI_NETBSD_CONFIGURE
167 1.1 matt struct extent *ioext, *memext;
168 1.7 matt #if 0
169 1.7 matt extern int pci_conf_debug;
170 1.7 matt pci_conf_debug = 1;
171 1.7 matt #endif
172 1.1 matt
173 1.6 matt switch (gtpc->gtpc_busno) {
174 1.1 matt case 0:
175 1.3 matt ioext = extent_create("pci0-io", 0x00000600, 0x0000ffff,
176 1.3 matt M_DEVBUF, NULL, 0, EX_NOWAIT);
177 1.3 matt memext = extent_create("pci0-mem",
178 1.3 matt gt_pci0_mem_bs_tag.pbs_base,
179 1.3 matt gt_pci0_mem_bs_tag.pbs_limit-1,
180 1.3 matt M_DEVBUF, NULL, 0, EX_NOWAIT);
181 1.1 matt break;
182 1.1 matt case 1:
183 1.3 matt ioext = extent_create("pci1-io", 0x00000600, 0x0000ffff,
184 1.3 matt M_DEVBUF, NULL, 0, EX_NOWAIT);
185 1.3 matt memext = extent_create("pci1-mem",
186 1.3 matt gt_pci1_mem_bs_tag.pbs_base,
187 1.3 matt gt_pci1_mem_bs_tag.pbs_limit-1,
188 1.3 matt M_DEVBUF, NULL, 0, EX_NOWAIT);
189 1.1 matt break;
190 1.1 matt }
191 1.1 matt
192 1.6 matt pci_configure_bus(>pc->gtpc_pc, ioext, memext, NULL, 0, 32);
193 1.1 matt
194 1.1 matt extent_destroy(ioext);
195 1.1 matt extent_destroy(memext);
196 1.3 matt #endif /* PCI_NETBSD_CONFIGURE */
197 1.3 matt }
198 1.3 matt
199 1.3 matt void
200 1.3 matt gtpci_md_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int pin,
201 1.3 matt int swiz, int *iline)
202 1.3 matt {
203 1.3 matt #ifdef PCI_NETBSD_CONFIGURE
204 1.4 matt struct gtpci_chipset *gtpc = (struct gtpci_chipset *)pc;
205 1.7 matt int line = (gtpc->gtpc_busno == 0 ? PCI0_GPPINTS : PCI1_GPPINTS);
206 1.7 matt *iline = (line >> (8 * ((pin + swiz - 1) & 3))) & 0xff;
207 1.7 matt if (*iline != 0xff)
208 1.7 matt *iline += IRQ_GPP_BASE;
209 1.3 matt #endif /* PCI_NETBSD_CONFIGURE */
210 1.1 matt }
211 1.1 matt
212 1.1 matt void
213 1.1 matt gtpci_md_bus_devorder(pci_chipset_tag_t pc, int busno, char devs[])
214 1.1 matt {
215 1.7 matt struct gtpci_chipset *gtpc = (struct gtpci_chipset *)pc;
216 1.7 matt int dev;
217 1.1 matt
218 1.6 matt /*
219 1.6 matt * Don't bother probing the GT itself.
220 1.6 matt */
221 1.7 matt for (dev = 0; dev < 32; dev++) {
222 1.7 matt if (PCI_CFG_GET_BUSNO(gtpc->gtpc_self) == busno &&
223 1.7 matt (PCI_CFG_GET_DEVNO(gtpc->gtpc_self) == dev ||
224 1.7 matt (gtpci_skipmask[gtpc->gtpc_busno] & (1 << dev))))
225 1.7 matt continue;
226 1.7 matt
227 1.7 matt *devs++ = dev;
228 1.7 matt }
229 1.1 matt *devs = -1;
230 1.1 matt }
231 1.1 matt
232 1.1 matt int
233 1.1 matt gtpci_md_conf_hook(pci_chipset_tag_t pc, int bus, int dev, int func,
234 1.1 matt pcireg_t id)
235 1.1 matt {
236 1.6 matt if (bus == 0 && dev == 0) /* don't configure GT */
237 1.1 matt return 0;
238 1.1 matt
239 1.7 matt return PCI_CONF_ALL;
240 1.1 matt }
241 1.1 matt
242 1.1 matt int
243 1.1 matt gtpci_md_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
244 1.1 matt {
245 1.1 matt int pin = pa->pa_intrpin;
246 1.1 matt int line = pa->pa_intrline;
247 1.1 matt
248 1.7 matt if (pin > 4 || line >= NIRQ) {
249 1.1 matt printf("pci_intr_map: bad interrupt pin %d\n", pin);
250 1.1 matt *ihp = -1;
251 1.1 matt return 1;
252 1.1 matt }
253 1.1 matt
254 1.1 matt *ihp = line;
255 1.1 matt return 0;
256 1.1 matt }
257