gt_mainbus.c revision 1.6
1 /* $NetBSD: gt_mainbus.c,v 1.6 2003/03/18 19:35:01 matt Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Allen Briggs for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/types.h> 39 #include <sys/param.h> 40 #include <sys/device.h> 41 #include <sys/extent.h> 42 #include <sys/malloc.h> 43 44 #define _POWERPC_BUS_DMA_PRIVATE 45 #include <machine/bus.h> 46 47 #include "opt_pci.h" 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pciconf.h> 50 51 #include "opt_marvell.h" 52 #include <dev/marvell/gtreg.h> 53 #include <dev/marvell/gtvar.h> 54 #include <dev/marvell/gtpcireg.h> 55 #include <dev/marvell/gtpcivar.h> 56 57 extern struct powerpc_bus_space gt_mem_bs_tag; 58 extern struct powerpc_bus_space gt_pci0_mem_bs_tag; 59 extern struct powerpc_bus_space gt_pci0_io_bs_tag; 60 extern struct powerpc_bus_space gt_pci1_mem_bs_tag; 61 extern struct powerpc_bus_space gt_pci1_io_bs_tag; 62 63 struct powerpc_bus_dma_tag gt_bus_dma_tag = { 64 0, /* _bounce_thresh */ 65 _bus_dmamap_create, 66 _bus_dmamap_destroy, 67 _bus_dmamap_load, 68 _bus_dmamap_load_mbuf, 69 _bus_dmamap_load_uio, 70 _bus_dmamap_load_raw, 71 _bus_dmamap_unload, 72 _bus_dmamap_sync, 73 _bus_dmamem_alloc, 74 _bus_dmamem_free, 75 _bus_dmamem_map, 76 _bus_dmamem_unmap, 77 _bus_dmamem_mmap, 78 }; 79 80 static int gt_match(struct device *, struct cfdata *, void *); 81 static void gt_attach(struct device *, struct device *, void *); 82 83 CFATTACH_DECL(gt, sizeof(struct gt_softc), gt_match, gt_attach, NULL, NULL); 84 85 extern struct cfdriver gt_cd; 86 extern bus_space_handle_t gt_memh; 87 88 static int gt_found; 89 90 int 91 gt_match(struct device *parent, struct cfdata *cf, void *aux) 92 { 93 const char **busname = aux; 94 95 if (strcmp(*busname, gt_cd.cd_name) != 0) 96 return 0; 97 98 if (gt_found) 99 return 0; 100 101 return 1; 102 } 103 104 void 105 gt_attach(struct device *parent, struct device *self, void *aux) 106 { 107 struct gt_softc *gt = (struct gt_softc *) self; 108 109 gt->gt_dmat = >_bus_dma_tag; 110 gt->gt_memt = >_mem_bs_tag; 111 gt->gt_pci0_memt = >_pci0_mem_bs_tag; 112 gt->gt_pci0_iot = >_pci0_io_bs_tag; 113 gt->gt_pci1_memt = >_pci1_mem_bs_tag; 114 gt->gt_pci1_iot = >_pci1_io_bs_tag; 115 116 gt->gt_memh = gt_memh; 117 118 #if 0 119 GT_DecodeAddr_SET(gt, GT_PCI0_IO_Low_Decode, 120 gt_pci0_io_bs_tag.pbs_offset + gt_pci0_io_bs_tag.pbs_base); 121 GT_DecodeAddr_SET(gt, GT_PCI0_IO_High_Decode, 122 gt_pci0_io_bs_tag.pbs_offset + gt_pci0_io_bs_tag.pbs_limit - 1); 123 124 GT_DecodeAddr_SET(gt, GT_PCI1_IO_Low_Decode, 125 gt_pci1_io_bs_tag.pbs_offset + gt_pci1_io_bs_tag.pbs_base); 126 GT_DecodeAddr_SET(gt, GT_PCI1_IO_High_Decode, 127 gt_pci1_io_bs_tag.pbs_offset + gt_pci1_io_bs_tag.pbs_limit - 1); 128 129 GT_DecodeAddr_SET(gt, GT_PCI0_Mem0_Low_Decode, 130 gt_pci0_mem_bs_tag.pbs_offset + gt_pci0_mem_bs_tag.pbs_base); 131 GT_DecodeAddr_SET(gt, GT_PCI0_Mem0_High_Decode, 132 gt_pci1_mem_bs_tag.pbs_offset + gt_pci1_mem_bs_tag.pbs_limit - 1); 133 134 GT_DecodeAddr_SET(gt, GT_PCI1_Mem0_Low_Decode, 135 gt_pci1_mem_bs_tag.pbs_offset + gt_pci1_mem_bs_tag.pbs_base); 136 GT_DecodeAddr_SET(gt, GT_PCI1_Mem0_High_Decode, 137 gt_pci1_mem_bs_tag.pbs_offset + gt_pci1_mem_bs_tag.pbs_limit - 1); 138 #endif 139 140 gt_attach_common(gt); 141 } 142 143 void 144 gtpci_bus_configure(struct gtpci_chipset *gtpc) 145 { 146 #ifdef PCI_NETBSD_CONFIGURE 147 struct extent *ioext, *memext; 148 149 switch (gtpc->gtpc_busno) { 150 case 0: 151 ioext = extent_create("pci0-io", 0x00000600, 0x0000ffff, 152 M_DEVBUF, NULL, 0, EX_NOWAIT); 153 memext = extent_create("pci0-mem", 154 gt_pci0_mem_bs_tag.pbs_base, 155 gt_pci0_mem_bs_tag.pbs_limit-1, 156 M_DEVBUF, NULL, 0, EX_NOWAIT); 157 break; 158 case 1: 159 ioext = extent_create("pci1-io", 0x00000600, 0x0000ffff, 160 M_DEVBUF, NULL, 0, EX_NOWAIT); 161 memext = extent_create("pci1-mem", 162 gt_pci1_mem_bs_tag.pbs_base, 163 gt_pci1_mem_bs_tag.pbs_limit-1, 164 M_DEVBUF, NULL, 0, EX_NOWAIT); 165 break; 166 } 167 168 pci_configure_bus(>pc->gtpc_pc, ioext, memext, NULL, 0, 32); 169 170 extent_destroy(ioext); 171 extent_destroy(memext); 172 #endif /* PCI_NETBSD_CONFIGURE */ 173 } 174 175 void 176 gtpci_md_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int pin, 177 int swiz, int *iline) 178 { 179 #ifdef PCI_NETBSD_CONFIGURE 180 struct gtpci_chipset *gtpc = (struct gtpci_chipset *)pc; 181 if (gtpc->gtpc_busno == 0) 182 *iline = IRQ_GPP_BASE + 27; 183 else 184 *iline = IRQ_GPP_BASE + 29; 185 #endif /* PCI_NETBSD_CONFIGURE */ 186 } 187 188 void 189 gtpci_md_bus_devorder(pci_chipset_tag_t pc, int busno, char devs[]) 190 { 191 int i; 192 193 /* 194 * Don't bother probing the GT itself. 195 */ 196 for (i = (busno == 0); i < 32; i++) 197 *devs++ = i; 198 *devs = -1; 199 } 200 201 int 202 gtpci_md_conf_hook(pci_chipset_tag_t pc, int bus, int dev, int func, 203 pcireg_t id) 204 { 205 if (bus == 0 && dev == 0) /* don't configure GT */ 206 return 0; 207 208 return PCI_CONF_ALL /* PCI_CONF_MAP_MEM|PCI_CONF_ENABLE_MEM */; 209 } 210 211 int 212 gtpci_md_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 213 { 214 int pin = pa->pa_intrpin; 215 int line = pa->pa_intrline; 216 217 if (pin > 4) { 218 printf("pci_intr_map: bad interrupt pin %d\n", pin); 219 *ihp = -1; 220 return 1; 221 } 222 223 *ihp = line; 224 return 0; 225 } 226
Indexes created Mon Sep 29 21:09:56 GMT 2025