gt_mainbus.c revision 1.9
1 /* $NetBSD: gt_mainbus.c,v 1.9 2003/07/15 01:37:35 lukem Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Allen Briggs for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: gt_mainbus.c,v 1.9 2003/07/15 01:37:35 lukem Exp $"); 40 41 #include "opt_ev64260.h" 42 43 #include <sys/types.h> 44 #include <sys/param.h> 45 #include <sys/device.h> 46 #include <sys/extent.h> 47 #include <sys/malloc.h> 48 49 #define _POWERPC_BUS_DMA_PRIVATE 50 #include <machine/bus.h> 51 52 #include "opt_pci.h" 53 #include <dev/pci/pcivar.h> 54 #include <dev/pci/pciconf.h> 55 56 #include "opt_marvell.h" 57 #include <dev/marvell/gtreg.h> 58 #include <dev/marvell/gtvar.h> 59 #include <dev/marvell/gtpcireg.h> 60 #include <dev/marvell/gtpcivar.h> 61 62 extern struct powerpc_bus_space gt_mem_bs_tag; 63 extern struct powerpc_bus_space gt_pci0_mem_bs_tag; 64 extern struct powerpc_bus_space gt_pci0_io_bs_tag; 65 extern struct powerpc_bus_space gt_pci1_mem_bs_tag; 66 extern struct powerpc_bus_space gt_pci1_io_bs_tag; 67 68 struct powerpc_bus_dma_tag gt_bus_dma_tag = { 69 0, /* _bounce_thresh */ 70 _bus_dmamap_create, 71 _bus_dmamap_destroy, 72 _bus_dmamap_load, 73 _bus_dmamap_load_mbuf, 74 _bus_dmamap_load_uio, 75 _bus_dmamap_load_raw, 76 _bus_dmamap_unload, 77 _bus_dmamap_sync, 78 _bus_dmamem_alloc, 79 _bus_dmamem_free, 80 _bus_dmamem_map, 81 _bus_dmamem_unmap, 82 _bus_dmamem_mmap, 83 }; 84 85 const int gtpci_skipmask[2] = { 86 #ifdef PCI0_SKIPMASK 87 PCI0_SKIPMASK, 88 #else 89 0, 90 #endif 91 #ifdef PCI1_SKIPMASK 92 PCI1_SKIPMASK, 93 #else 94 0, 95 #endif 96 }; 97 98 static int gt_match(struct device *, struct cfdata *, void *); 99 static void gt_attach(struct device *, struct device *, void *); 100 101 CFATTACH_DECL(gt, sizeof(struct gt_softc), gt_match, gt_attach, NULL, NULL); 102 103 extern struct cfdriver gt_cd; 104 extern bus_space_handle_t gt_memh; 105 106 static int gt_found; 107 108 int 109 gt_match(struct device *parent, struct cfdata *cf, void *aux) 110 { 111 const char **busname = aux; 112 113 if (strcmp(*busname, gt_cd.cd_name) != 0) 114 return 0; 115 116 if (gt_found) 117 return 0; 118 119 return 1; 120 } 121 122 void 123 gt_attach(struct device *parent, struct device *self, void *aux) 124 { 125 struct gt_softc *gt = (struct gt_softc *) self; 126 127 gt->gt_dmat = >_bus_dma_tag; 128 gt->gt_memt = >_mem_bs_tag; 129 gt->gt_pci0_memt = >_pci0_mem_bs_tag; 130 gt->gt_pci0_iot = >_pci0_io_bs_tag; 131 gt->gt_pci0_host = TRUE; 132 gt->gt_pci1_memt = >_pci1_mem_bs_tag; 133 gt->gt_pci1_iot = >_pci1_io_bs_tag; 134 gt->gt_pci1_host = TRUE; 135 136 gt->gt_memh = gt_memh; 137 138 #if 0 139 GT_DecodeAddr_SET(gt, GT_PCI0_IO_Low_Decode, 140 gt_pci0_io_bs_tag.pbs_offset + gt_pci0_io_bs_tag.pbs_base); 141 GT_DecodeAddr_SET(gt, GT_PCI0_IO_High_Decode, 142 gt_pci0_io_bs_tag.pbs_offset + gt_pci0_io_bs_tag.pbs_limit - 1); 143 144 GT_DecodeAddr_SET(gt, GT_PCI1_IO_Low_Decode, 145 gt_pci1_io_bs_tag.pbs_offset + gt_pci1_io_bs_tag.pbs_base); 146 GT_DecodeAddr_SET(gt, GT_PCI1_IO_High_Decode, 147 gt_pci1_io_bs_tag.pbs_offset + gt_pci1_io_bs_tag.pbs_limit - 1); 148 149 GT_DecodeAddr_SET(gt, GT_PCI0_Mem0_Low_Decode, 150 gt_pci0_mem_bs_tag.pbs_offset + gt_pci0_mem_bs_tag.pbs_base); 151 GT_DecodeAddr_SET(gt, GT_PCI0_Mem0_High_Decode, 152 gt_pci1_mem_bs_tag.pbs_offset + gt_pci1_mem_bs_tag.pbs_limit - 1); 153 154 GT_DecodeAddr_SET(gt, GT_PCI1_Mem0_Low_Decode, 155 gt_pci1_mem_bs_tag.pbs_offset + gt_pci1_mem_bs_tag.pbs_base); 156 GT_DecodeAddr_SET(gt, GT_PCI1_Mem0_High_Decode, 157 gt_pci1_mem_bs_tag.pbs_offset + gt_pci1_mem_bs_tag.pbs_limit - 1); 158 #endif 159 160 gt_attach_common(gt); 161 } 162 163 void 164 gtpci_bus_configure(struct gtpci_chipset *gtpc) 165 { 166 #ifdef PCI_NETBSD_CONFIGURE 167 struct extent *ioext, *memext; 168 #if 0 169 extern int pci_conf_debug; 170 pci_conf_debug = 1; 171 #endif 172 173 switch (gtpc->gtpc_busno) { 174 case 0: 175 ioext = extent_create("pci0-io", 0x00000600, 0x0000ffff, 176 M_DEVBUF, NULL, 0, EX_NOWAIT); 177 memext = extent_create("pci0-mem", 178 gt_pci0_mem_bs_tag.pbs_base, 179 gt_pci0_mem_bs_tag.pbs_limit-1, 180 M_DEVBUF, NULL, 0, EX_NOWAIT); 181 break; 182 case 1: 183 ioext = extent_create("pci1-io", 0x00000600, 0x0000ffff, 184 M_DEVBUF, NULL, 0, EX_NOWAIT); 185 memext = extent_create("pci1-mem", 186 gt_pci1_mem_bs_tag.pbs_base, 187 gt_pci1_mem_bs_tag.pbs_limit-1, 188 M_DEVBUF, NULL, 0, EX_NOWAIT); 189 break; 190 } 191 192 pci_configure_bus(>pc->gtpc_pc, ioext, memext, NULL, 0, 32); 193 194 extent_destroy(ioext); 195 extent_destroy(memext); 196 #endif /* PCI_NETBSD_CONFIGURE */ 197 } 198 199 void 200 gtpci_md_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int pin, 201 int swiz, int *iline) 202 { 203 #ifdef PCI_NETBSD_CONFIGURE 204 struct gtpci_chipset *gtpc = (struct gtpci_chipset *)pc; 205 int line = (gtpc->gtpc_busno == 0 ? PCI0_GPPINTS : PCI1_GPPINTS); 206 *iline = (line >> (8 * ((pin + swiz - 1) & 3))) & 0xff; 207 if (*iline != 0xff) 208 *iline += IRQ_GPP_BASE; 209 #endif /* PCI_NETBSD_CONFIGURE */ 210 } 211 212 void 213 gtpci_md_bus_devorder(pci_chipset_tag_t pc, int busno, char devs[]) 214 { 215 struct gtpci_chipset *gtpc = (struct gtpci_chipset *)pc; 216 int dev; 217 218 /* 219 * Don't bother probing the GT itself. 220 */ 221 for (dev = 0; dev < 32; dev++) { 222 if (PCI_CFG_GET_BUSNO(gtpc->gtpc_self) == busno && 223 (PCI_CFG_GET_DEVNO(gtpc->gtpc_self) == dev || 224 (gtpci_skipmask[gtpc->gtpc_busno] & (1 << dev)))) 225 continue; 226 227 *devs++ = dev; 228 } 229 *devs = -1; 230 } 231 232 int 233 gtpci_md_conf_hook(pci_chipset_tag_t pc, int bus, int dev, int func, 234 pcireg_t id) 235 { 236 if (bus == 0 && dev == 0) /* don't configure GT */ 237 return 0; 238 239 return PCI_CONF_ALL; 240 } 241 242 int 243 gtpci_md_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 244 { 245 int pin = pa->pa_intrpin; 246 int line = pa->pa_intrline; 247 248 if (pin > 4 || line >= NIRQ) { 249 printf("pci_intr_map: bad interrupt pin %d\n", pin); 250 *ihp = -1; 251 return 1; 252 } 253 254 *ihp = line; 255 return 0; 256 } 257
Indexes created Mon Sep 29 21:09:56 GMT 2025