machdep.c revision 1.5 1 1.5 matt /* $NetBSD: machdep.c,v 1.5 2003/03/17 23:28:09 matt Exp $ */
2 1.1 matt
3 1.1 matt /*
4 1.1 matt * Copyright (C) 1995, 1996 Wolfgang Solfrank.
5 1.1 matt * Copyright (C) 1995, 1996 TooLs GmbH.
6 1.1 matt * All rights reserved.
7 1.1 matt *
8 1.1 matt * Redistribution and use in source and binary forms, with or without
9 1.1 matt * modification, are permitted provided that the following conditions
10 1.1 matt * are met:
11 1.1 matt * 1. Redistributions of source code must retain the above copyright
12 1.1 matt * notice, this list of conditions and the following disclaimer.
13 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 matt * notice, this list of conditions and the following disclaimer in the
15 1.1 matt * documentation and/or other materials provided with the distribution.
16 1.1 matt * 3. All advertising materials mentioning features or use of this software
17 1.1 matt * must display the following acknowledgement:
18 1.1 matt * This product includes software developed by TooLs GmbH.
19 1.1 matt * 4. The name of TooLs GmbH may not be used to endorse or promote products
20 1.1 matt * derived from this software without specific prior written permission.
21 1.1 matt *
22 1.1 matt * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23 1.1 matt * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.1 matt * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.1 matt * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 1.1 matt * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27 1.1 matt * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28 1.1 matt * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 1.1 matt * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30 1.1 matt * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31 1.1 matt * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.1 matt */
33 1.1 matt
34 1.1 matt #include "opt_marvell.h"
35 1.1 matt #include "opt_compat_netbsd.h"
36 1.1 matt #include "opt_ddb.h"
37 1.1 matt #include "opt_inet.h"
38 1.1 matt #include "opt_ccitt.h"
39 1.1 matt #include "opt_iso.h"
40 1.1 matt #include "opt_ns.h"
41 1.1 matt #include "opt_ipkdb.h"
42 1.1 matt
43 1.1 matt #include <sys/param.h>
44 1.1 matt #include <sys/conf.h>
45 1.1 matt #include <sys/device.h>
46 1.1 matt #include <sys/kernel.h>
47 1.1 matt #include <sys/malloc.h>
48 1.1 matt #include <sys/mount.h>
49 1.1 matt #include <sys/msgbuf.h>
50 1.1 matt #include <sys/proc.h>
51 1.1 matt #include <sys/reboot.h>
52 1.4 matt #include <sys/extent.h>
53 1.1 matt #include <sys/syslog.h>
54 1.1 matt #include <sys/systm.h>
55 1.1 matt
56 1.1 matt #include <uvm/uvm.h>
57 1.1 matt #include <uvm/uvm_extern.h>
58 1.1 matt
59 1.1 matt #include <net/netisr.h>
60 1.1 matt
61 1.1 matt #include <machine/bus.h>
62 1.1 matt #include <machine/db_machdep.h>
63 1.1 matt #include <machine/intr.h>
64 1.1 matt #include <machine/pmap.h>
65 1.1 matt #include <machine/powerpc.h>
66 1.1 matt #include <machine/trap.h>
67 1.1 matt
68 1.1 matt #include <powerpc/oea/bat.h>
69 1.1 matt #include <powerpc/marvell/watchdog.h>
70 1.1 matt
71 1.1 matt #include <ddb/db_extern.h>
72 1.1 matt
73 1.1 matt #include <dev/cons.h>
74 1.1 matt
75 1.1 matt #include "vga.h"
76 1.1 matt #if (NVGA > 0)
77 1.1 matt #include <dev/ic/mc6845reg.h>
78 1.1 matt #include <dev/ic/pcdisplayvar.h>
79 1.1 matt #include <dev/ic/vgareg.h>
80 1.1 matt #include <dev/ic/vgavar.h>
81 1.1 matt #endif
82 1.1 matt
83 1.1 matt #include "isa.h"
84 1.1 matt #if (NISA > 0)
85 1.1 matt void isa_intr_init(void);
86 1.1 matt #endif
87 1.1 matt
88 1.1 matt #include "pckbc.h"
89 1.1 matt #if (NPCKBC > 0)
90 1.1 matt #include <dev/isa/isareg.h>
91 1.1 matt #include <dev/ic/i8042reg.h>
92 1.1 matt #include <dev/ic/pckbcvar.h>
93 1.1 matt #endif
94 1.1 matt
95 1.1 matt #include "com.h"
96 1.1 matt #if (NCOM > 0)
97 1.1 matt #include <sys/termios.h>
98 1.1 matt #include <dev/ic/comreg.h>
99 1.1 matt #include <dev/ic/comvar.h>
100 1.1 matt #endif
101 1.1 matt
102 1.2 matt #include <dev/marvell/gtreg.h>
103 1.1 matt #include <dev/marvell/gtvar.h>
104 1.1 matt
105 1.1 matt /*
106 1.1 matt * Global variables used here and there
107 1.1 matt */
108 1.1 matt extern struct user *proc0paddr;
109 1.1 matt
110 1.1 matt #define PMONMEMREGIONS 32
111 1.1 matt struct mem_region physmemr[PMONMEMREGIONS], availmemr[PMONMEMREGIONS];
112 1.1 matt
113 1.1 matt char *bootpath;
114 1.1 matt
115 1.1 matt paddr_t avail_end; /* XXX temporary */
116 1.1 matt
117 1.1 matt void initppc(u_int, u_int, u_int, void *); /* Called from locore */
118 1.1 matt void strayintr(int);
119 1.1 matt int lcsplx(int);
120 1.4 matt void gt_bus_space_init(void);
121 1.5 matt void return_to_dink(int);
122 1.5 matt void calc_delayconst(void);
123 1.4 matt
124 1.4 matt struct powerpc_bus_space gt_pci0_mem_bs_tag = {
125 1.4 matt _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE,
126 1.4 matt 0x00000000, 0x00000000, 0x00000000,
127 1.4 matt };
128 1.4 matt struct powerpc_bus_space gt_pci0_io_bs_tag = {
129 1.4 matt _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_IO_TYPE,
130 1.4 matt 0x00000000, 0x00000000, 0x00000000,
131 1.4 matt };
132 1.4 matt struct powerpc_bus_space gt_pci1_mem_bs_tag = {
133 1.4 matt _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE,
134 1.4 matt 0x00000000, 0x00000000, 0x00000000,
135 1.4 matt };
136 1.4 matt struct powerpc_bus_space gt_pci1_io_bs_tag = {
137 1.4 matt _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_IO_TYPE,
138 1.4 matt 0x00000000, 0x00000000, 0x00000000,
139 1.4 matt };
140 1.4 matt struct powerpc_bus_space gt_obio2_bs_tag = {
141 1.4 matt _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE|2,
142 1.4 matt 0x00000000, 0x00000000, 0x00000000,
143 1.4 matt };
144 1.4 matt struct powerpc_bus_space gt_mem_bs_tag = {
145 1.4 matt _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE,
146 1.4 matt GT_BASE, 0x00000000, 0x00010000,
147 1.4 matt };
148 1.4 matt
149 1.4 matt bus_space_handle_t gt_memh;
150 1.4 matt
151 1.4 matt bus_space_tag_t obio_bs_tags[5] = {
152 1.4 matt NULL, NULL, >_obio2_bs_tag, NULL, NULL
153 1.4 matt };
154 1.1 matt
155 1.4 matt static char ex_storage[6][EXTENT_FIXED_STORAGE_SIZE(8)]
156 1.4 matt __attribute__((aligned(8)));
157 1.4 matt
158 1.4 matt #if 0
159 1.1 matt cons_decl(gtmpsc);
160 1.1 matt
161 1.1 matt struct consdev constab[] = {
162 1.1 matt cons_init_halt(gtmpsc),
163 1.1 matt { 0 }
164 1.1 matt };
165 1.4 matt #endif
166 1.1 matt
167 1.1 matt void
168 1.1 matt initppc(startkernel, endkernel, args, btinfo)
169 1.1 matt u_int startkernel, endkernel, args;
170 1.1 matt void *btinfo;
171 1.1 matt {
172 1.1 matt #ifdef DDB
173 1.1 matt extern void *startsym, *endsym;
174 1.1 matt #endif
175 1.1 matt
176 1.1 matt /*
177 1.1 matt * Hardcode 32MB for now--we should probe for this or get it
178 1.1 matt * from a boot loader, but for now, we are booting via an
179 1.1 matt * S-record loader.
180 1.1 matt */
181 1.1 matt { /* XXX AKB */
182 1.1 matt u_int32_t physmemsize;
183 1.1 matt
184 1.4 matt physmemsize = 92 * 1024 * 1024;
185 1.1 matt physmemr[0].start = 0;
186 1.1 matt physmemr[0].size = physmemsize;
187 1.1 matt physmemr[1].size = 0;
188 1.1 matt availmemr[0].start = (endkernel + PGOFSET) & ~PGOFSET;
189 1.1 matt availmemr[0].size = physmemsize - availmemr[0].start;
190 1.1 matt availmemr[1].size = 0;
191 1.1 matt }
192 1.1 matt avail_end = physmemr[0].start + physmemr[0].size; /* XXX temporary */
193 1.1 matt
194 1.4 matt oea_batinit(0xf0000000, BAT_BL_256M);
195 1.4 matt oea_init((void (*)(void))ext_intr);
196 1.1 matt
197 1.4 matt gt_bus_space_init();
198 1.1 matt
199 1.5 matt calc_delayconst(); /* Set CPU clock */
200 1.5 matt
201 1.4 matt consinit();
202 1.1 matt
203 1.1 matt #if (NISA > 0)
204 1.1 matt isa_intr_init();
205 1.1 matt #endif
206 1.1 matt
207 1.1 matt /*
208 1.1 matt * Set the page size.
209 1.1 matt */
210 1.1 matt uvm_setpagesize();
211 1.1 matt
212 1.1 matt /*
213 1.1 matt * Initialize pmap module.
214 1.1 matt */
215 1.1 matt pmap_bootstrap(startkernel, endkernel);
216 1.1 matt
217 1.1 matt #ifdef DDB
218 1.1 matt ddb_init((int)((u_int)endsym - (u_int)startsym), startsym, endsym);
219 1.1 matt #endif
220 1.1 matt #ifdef IPKDB
221 1.1 matt /*
222 1.1 matt * Now trap to IPKDB
223 1.1 matt */
224 1.1 matt ipkdb_init();
225 1.1 matt if (boothowto & RB_KDB)
226 1.1 matt ipkdb_connect(0);
227 1.1 matt #endif
228 1.1 matt }
229 1.1 matt
230 1.1 matt void
231 1.1 matt mem_regions(mem, avail)
232 1.1 matt struct mem_region **mem, **avail;
233 1.1 matt {
234 1.1 matt *mem = physmemr;
235 1.1 matt *avail = availmemr;
236 1.1 matt }
237 1.1 matt
238 1.1 matt /*
239 1.1 matt * Machine dependent startup code.
240 1.1 matt */
241 1.1 matt void
242 1.1 matt cpu_startup()
243 1.1 matt {
244 1.1 matt register_t msr;
245 1.1 matt
246 1.1 matt oea_startup(NULL);
247 1.1 matt
248 1.1 matt /*
249 1.1 matt * Now that we have VM, malloc()s are OK in bus_space.
250 1.1 matt */
251 1.3 matt bus_space_mallocok();
252 1.1 matt
253 1.1 matt /*
254 1.1 matt * Now allow hardware interrupts.
255 1.1 matt */
256 1.1 matt splhigh();
257 1.1 matt __asm __volatile ("mfmsr %0; ori %0,%0,%1; mtmsr %0"
258 1.1 matt : "=r"(msr)
259 1.1 matt : "K"(PSL_EE));
260 1.1 matt }
261 1.1 matt
262 1.1 matt /*
263 1.1 matt * consinit
264 1.1 matt * Initialize system console.
265 1.1 matt */
266 1.1 matt void
267 1.1 matt consinit()
268 1.1 matt {
269 1.4 matt #if 1
270 1.4 matt /* PPCBOOT using COM1 @ 57600 */
271 1.4 matt comcnattach(>_obio2_bs_tag, 0, 57600, COM_FREQ*2,
272 1.4 matt (TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8);
273 1.4 matt #else
274 1.1 matt cninit();
275 1.4 matt #endif
276 1.1 matt }
277 1.1 matt
278 1.1 matt #if (NPCKBC > 0) && (NPCKBD == 0)
279 1.1 matt /*
280 1.1 matt * glue code to support old console code with the
281 1.1 matt * mi keyboard controller driver
282 1.1 matt */
283 1.1 matt int
284 1.1 matt pckbc_machdep_cnattach(kbctag, kbcslot)
285 1.1 matt pckbc_tag_t kbctag;
286 1.1 matt pckbc_slot_t kbcslot;
287 1.1 matt {
288 1.1 matt #if (NPC > 0)
289 1.1 matt return (pcconskbd_cnattach(kbctag, kbcslot));
290 1.1 matt #else
291 1.1 matt return (ENXIO);
292 1.1 matt #endif
293 1.1 matt }
294 1.1 matt #endif
295 1.1 matt
296 1.1 matt /*
297 1.1 matt * Stray interrupts.
298 1.1 matt */
299 1.1 matt void
300 1.1 matt strayintr(int irq)
301 1.1 matt {
302 1.1 matt log(LOG_ERR, "stray interrupt %d\n", irq);
303 1.1 matt }
304 1.1 matt
305 1.1 matt /*
306 1.1 matt * Halt or reboot the machine after syncing/dumping according to howto.
307 1.1 matt */
308 1.1 matt void
309 1.1 matt cpu_reboot(howto, what)
310 1.1 matt int howto;
311 1.1 matt char *what;
312 1.1 matt {
313 1.1 matt static int syncing;
314 1.1 matt static char str[256];
315 1.1 matt char *ap = str, *ap1 = ap;
316 1.1 matt
317 1.1 matt boothowto = howto;
318 1.1 matt if (!cold && !(howto & RB_NOSYNC) && !syncing) {
319 1.1 matt syncing = 1;
320 1.1 matt vfs_shutdown(); /* sync */
321 1.1 matt resettodr(); /* set wall clock */
322 1.1 matt }
323 1.1 matt splhigh();
324 1.1 matt if (howto & RB_HALT) {
325 1.1 matt doshutdownhooks();
326 1.1 matt printf("halted\n\n");
327 1.1 matt cnhalt();
328 1.1 matt while(1);
329 1.1 matt }
330 1.1 matt if (!cold && (howto & RB_DUMP))
331 1.1 matt oea_dumpsys();
332 1.1 matt doshutdownhooks();
333 1.1 matt printf("rebooting\n\n");
334 1.1 matt if (what && *what) {
335 1.1 matt if (strlen(what) > sizeof str - 5)
336 1.1 matt printf("boot string too large, ignored\n");
337 1.1 matt else {
338 1.1 matt strcpy(str, what);
339 1.1 matt ap1 = ap = str + strlen(str);
340 1.1 matt *ap++ = ' ';
341 1.1 matt }
342 1.1 matt }
343 1.1 matt *ap++ = '-';
344 1.1 matt if (howto & RB_SINGLE)
345 1.1 matt *ap++ = 's';
346 1.1 matt if (howto & RB_KDB)
347 1.1 matt *ap++ = 'd';
348 1.1 matt *ap++ = 0;
349 1.1 matt if (ap[-2] == '-')
350 1.1 matt *ap1 = 0;
351 1.1 matt #if 0
352 1.1 matt {
353 1.1 matt void mvpppc_reboot(void);
354 1.1 matt mvpppc_reboot();
355 1.1 matt }
356 1.1 matt #endif
357 1.1 matt gt_watchdog_reset();
358 1.1 matt /* NOTREACHED */
359 1.1 matt while (1);
360 1.1 matt }
361 1.1 matt
362 1.1 matt int
363 1.1 matt lcsplx(ipl)
364 1.1 matt int ipl;
365 1.1 matt {
366 1.1 matt return spllower(ipl);
367 1.1 matt }
368 1.1 matt
369 1.1 matt int
370 1.1 matt gtget_macaddr(struct gt_softc *gt, int macno, char *enaddr)
371 1.1 matt {
372 1.1 matt enaddr[0] = 0x02;
373 1.1 matt enaddr[1] = 0x00;
374 1.1 matt enaddr[2] = 0x04;
375 1.1 matt enaddr[3] = 0x00;
376 1.1 matt enaddr[4] = 0x00;
377 1.1 matt enaddr[5] = 0x04 + macno;
378 1.1 matt
379 1.1 matt return 0;
380 1.1 matt }
381 1.4 matt
382 1.4 matt void
383 1.4 matt gt_bus_space_init(void)
384 1.4 matt {
385 1.4 matt bus_space_tag_t gt_memt = >_mem_bs_tag;
386 1.4 matt uint32_t datal, datah;
387 1.4 matt int error;
388 1.4 matt
389 1.4 matt error = bus_space_init(>_mem_bs_tag, "gtmem",
390 1.4 matt ex_storage[1], sizeof(ex_storage[0]));
391 1.4 matt
392 1.4 matt
393 1.4 matt error = bus_space_map(gt_memt, 0, 4096, 0, >_memh);
394 1.4 matt
395 1.4 matt datal = bus_space_read_4(gt_memt, gt_memh, GT_CS2_Low_Decode);
396 1.4 matt datah = bus_space_read_4(gt_memt, gt_memh, GT_CS2_High_Decode);
397 1.4 matt gt_obio2_bs_tag.pbs_offset = GT_LowAddr_GET(datal);
398 1.4 matt gt_obio2_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1 -
399 1.4 matt gt_obio2_bs_tag.pbs_offset;
400 1.4 matt
401 1.4 matt error = bus_space_init(>_obio2_bs_tag, "obio2",
402 1.4 matt ex_storage[1], sizeof(ex_storage[1]));
403 1.4 matt
404 1.4 matt datal = bus_space_read_4(gt_memt, gt_memh, GT_PCI0_Mem0_Low_Decode);
405 1.4 matt datah = bus_space_read_4(gt_memt, gt_memh, GT_PCI0_Mem0_High_Decode);
406 1.4 matt gt_pci0_mem_bs_tag.pbs_base = GT_LowAddr_GET(datal);
407 1.4 matt gt_pci0_mem_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1;
408 1.4 matt
409 1.4 matt error = bus_space_init(>_pci0_mem_bs_tag, "pci0-mem",
410 1.4 matt ex_storage[2], sizeof(ex_storage[2]));
411 1.4 matt
412 1.4 matt datal = bus_space_read_4(gt_memt, gt_memh, GT_PCI0_IO_Low_Decode);
413 1.4 matt datah = bus_space_read_4(gt_memt, gt_memh, GT_PCI0_IO_High_Decode);
414 1.4 matt gt_pci0_io_bs_tag.pbs_base = GT_LowAddr_GET(datal);
415 1.4 matt gt_pci0_io_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1 -
416 1.4 matt gt_pci0_io_bs_tag.pbs_offset;
417 1.4 matt
418 1.4 matt error = bus_space_init(>_pci0_io_bs_tag, "pci0-ioport",
419 1.4 matt ex_storage[3], sizeof(ex_storage[3]));
420 1.4 matt
421 1.4 matt #if 0
422 1.4 matt error = extent_alloc_region(gt_pci0_io_bs_tag.pbs_extent,
423 1.4 matt 0x10000, 0x7F0000, EX_NOWAIT);
424 1.4 matt if (error)
425 1.4 matt panic("gt_bus_space_init: can't block out reserved "
426 1.4 matt "I/O space 0x10000-0x7fffff: error=%d\n", error);
427 1.4 matt #endif
428 1.4 matt
429 1.4 matt datal = bus_space_read_4(gt_memt, gt_memh, GT_PCI1_Mem0_Low_Decode);
430 1.4 matt datah = bus_space_read_4(gt_memt, gt_memh, GT_PCI1_Mem0_High_Decode);
431 1.4 matt gt_pci1_mem_bs_tag.pbs_base = GT_LowAddr_GET(datal);
432 1.4 matt gt_pci1_mem_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1;
433 1.4 matt
434 1.4 matt error = bus_space_init(>_pci1_mem_bs_tag, "pci1-mem",
435 1.4 matt ex_storage[4], sizeof(ex_storage[4]));
436 1.4 matt
437 1.4 matt datal = bus_space_read_4(gt_memt, gt_memh, GT_PCI1_IO_Low_Decode);
438 1.4 matt datah = bus_space_read_4(gt_memt, gt_memh, GT_PCI1_IO_High_Decode);
439 1.4 matt gt_pci1_io_bs_tag.pbs_base = GT_LowAddr_GET(datal);
440 1.4 matt gt_pci1_io_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1;
441 1.4 matt
442 1.4 matt error = bus_space_init(>_pci1_io_bs_tag, "pci1-ioport",
443 1.4 matt ex_storage[5], sizeof(ex_storage[5]));
444 1.4 matt
445 1.4 matt #if 0
446 1.4 matt error = extent_alloc_region(gt_pci1_io_bs_tag.pbs_extent,
447 1.4 matt 0x10000, 0x7F0000, EX_NOWAIT);
448 1.4 matt if (error)
449 1.4 matt panic("gt_bus_space_init: can't block out reserved "
450 1.4 matt "I/O space 0x10000-0x7fffff: error=%d\n", error);
451 1.4 matt #endif
452 1.4 matt }
453