machdep.c revision 1.20.20.2
1 /* $NetBSD: machdep.c,v 1.20.20.2 2010/03/11 15:02:20 yamt Exp $ */ 2 3 /* 4 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 5 * Copyright (C) 1995, 1996 TooLs GmbH. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by TooLs GmbH. 19 * 4. The name of TooLs GmbH may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.20.20.2 2010/03/11 15:02:20 yamt Exp $"); 36 37 #include "opt_marvell.h" 38 #include "opt_modular.h" 39 #include "opt_ev64260.h" 40 #include "opt_compat_netbsd.h" 41 #include "opt_ddb.h" 42 #include "opt_inet.h" 43 #include "opt_ccitt.h" 44 #include "opt_iso.h" 45 #include "opt_ns.h" 46 #include "opt_ipkdb.h" 47 48 #include <sys/param.h> 49 #include <sys/conf.h> 50 #include <sys/device.h> 51 #include <sys/kernel.h> 52 #include <sys/malloc.h> 53 #include <sys/mount.h> 54 #include <sys/msgbuf.h> 55 #include <sys/proc.h> 56 #include <sys/reboot.h> 57 #include <sys/extent.h> 58 #include <sys/syslog.h> 59 #include <sys/systm.h> 60 #include <sys/termios.h> 61 #include <sys/ksyms.h> 62 63 #include <uvm/uvm.h> 64 #include <uvm/uvm_extern.h> 65 66 #include <net/netisr.h> 67 68 #include <machine/bus.h> 69 #include <machine/db_machdep.h> 70 #include <machine/intr.h> 71 #include <machine/pmap.h> 72 #include <machine/powerpc.h> 73 #include <machine/trap.h> 74 75 #include <powerpc/oea/bat.h> 76 #include <powerpc/marvell/watchdog.h> 77 78 #include <ddb/db_extern.h> 79 80 #include <dev/cons.h> 81 82 #include "vga.h" 83 #if (NVGA > 0) 84 #include <dev/ic/mc6845reg.h> 85 #include <dev/ic/pcdisplayvar.h> 86 #include <dev/ic/vgareg.h> 87 #include <dev/ic/vgavar.h> 88 #endif 89 90 #include "isa.h" 91 #if (NISA > 0) 92 void isa_intr_init(void); 93 #endif 94 95 #include "com.h" 96 #if (NCOM > 0) 97 #include <dev/ic/comreg.h> 98 #include <dev/ic/comvar.h> 99 #endif 100 101 #include <dev/marvell/gtreg.h> 102 #include <dev/marvell/gtvar.h> 103 #include <dev/marvell/gtethreg.h> 104 105 #include "gtmpsc.h" 106 #if (NGTMPSC > 0) 107 #include <dev/marvell/gtsdmareg.h> 108 #include <dev/marvell/gtmpscreg.h> 109 #include <dev/marvell/gtmpscvar.h> 110 #endif 111 112 #include "ksyms.h" 113 114 /* 115 * Global variables used here and there 116 */ 117 #define PMONMEMREGIONS 32 118 struct mem_region physmemr[PMONMEMREGIONS], availmemr[PMONMEMREGIONS]; 119 120 char *bootpath; 121 122 void initppc(u_int, u_int, u_int, void *); /* Called from locore */ 123 void strayintr(int); 124 int lcsplx(int); 125 void gt_bus_space_init(void); 126 void gt_find_memory(bus_space_tag_t, bus_space_handle_t, paddr_t); 127 void gt_halt(bus_space_tag_t, bus_space_handle_t); 128 void return_to_dink(int); 129 130 void kcomcnputs(dev_t, const char *); 131 132 struct powerpc_bus_space gt_pci0_mem_bs_tag = { 133 _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE, 134 0x00000000, 0x00000000, 0x00000000, 135 }; 136 struct powerpc_bus_space gt_pci0_io_bs_tag = { 137 _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_IO_TYPE, 138 0x00000000, 0x00000000, 0x00000000, 139 }; 140 struct powerpc_bus_space gt_pci1_mem_bs_tag = { 141 _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE, 142 0x00000000, 0x00000000, 0x00000000, 143 }; 144 struct powerpc_bus_space gt_pci1_io_bs_tag = { 145 _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_IO_TYPE, 146 0x00000000, 0x00000000, 0x00000000, 147 }; 148 struct powerpc_bus_space gt_obio0_bs_tag = { 149 _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE|OBIO0_STRIDE, 150 0x00000000, 0x00000000, 0x00000000, 151 }; 152 struct powerpc_bus_space gt_obio1_bs_tag = { 153 _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE|OBIO1_STRIDE, 154 0x00000000, 0x00000000, 0x00000000, 155 }; 156 struct powerpc_bus_space gt_obio2_bs_tag = { 157 _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE|OBIO2_STRIDE, 158 0x00000000, 0x00000000, 0x00000000, 159 }; 160 struct powerpc_bus_space gt_obio3_bs_tag = { 161 _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE|OBIO3_STRIDE, 162 0x00000000, 0x00000000, 0x00000000, 163 }; 164 struct powerpc_bus_space gt_bootcs_bs_tag = { 165 _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE, 166 0x00000000, 0x00000000, 0x00000000, 167 }; 168 struct powerpc_bus_space gt_mem_bs_tag = { 169 _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE, 170 GT_BASE, 0x00000000, 0x00010000, 171 }; 172 173 bus_space_handle_t gt_memh; 174 175 struct powerpc_bus_space *obio_bs_tags[5] = { 176 >_obio0_bs_tag, >_obio1_bs_tag, >_obio2_bs_tag, 177 >_obio3_bs_tag, >_bootcs_bs_tag 178 }; 179 180 static char ex_storage[10][EXTENT_FIXED_STORAGE_SIZE(8)] 181 __attribute__((aligned(8))); 182 183 const struct gt_decode_info { 184 bus_addr_t low_decode; 185 bus_addr_t high_decode; 186 } decode_regs[] = { 187 { GT_SCS0_Low_Decode, GT_SCS0_High_Decode }, 188 { GT_SCS1_Low_Decode, GT_SCS1_High_Decode }, 189 { GT_SCS2_Low_Decode, GT_SCS2_High_Decode }, 190 { GT_SCS3_Low_Decode, GT_SCS3_High_Decode }, 191 { GT_CS0_Low_Decode, GT_CS0_High_Decode }, 192 { GT_CS1_Low_Decode, GT_CS1_High_Decode }, 193 { GT_CS2_Low_Decode, GT_CS2_High_Decode }, 194 { GT_CS3_Low_Decode, GT_CS3_High_Decode }, 195 { GT_BootCS_Low_Decode, GT_BootCS_High_Decode }, 196 }; 197 198 void 199 initppc(u_int startkernel, u_int endkernel, u_int args, void *btinfo) 200 { 201 oea_batinit(0xf0000000, BAT_BL_256M); 202 oea_init((void (*)(void))ext_intr); 203 204 DELAY(100000); 205 206 gt_bus_space_init(); 207 gt_find_memory(>_mem_bs_tag, gt_memh, roundup(endkernel, PAGE_SIZE)); 208 gt_halt(>_mem_bs_tag, gt_memh); 209 210 /* 211 * Now that we known how much memory, reinit the bats. 212 */ 213 oea_batinit(0xf0000000, BAT_BL_256M); 214 215 consinit(); 216 217 #if (NISA > 0) 218 isa_intr_init(); 219 #endif 220 221 /* 222 * Set the page size. 223 */ 224 uvm_setpagesize(); 225 226 /* 227 * Initialize pmap module. 228 */ 229 pmap_bootstrap(startkernel, endkernel); 230 231 #if NKSYMS || defined(DDB) || defined(MODULAR) 232 { 233 extern void *startsym, *endsym; 234 ksyms_addsyms_elf((int)((u_int)endsym - (u_int)startsym), 235 startsym, endsym); 236 } 237 #endif 238 #ifdef IPKDB 239 /* 240 * Now trap to IPKDB 241 */ 242 ipkdb_init(); 243 if (boothowto & RB_KDB) 244 ipkdb_connect(0); 245 #endif 246 } 247 248 void 249 mem_regions(struct mem_region **mem, struct mem_region **avail) 250 { 251 *mem = physmemr; 252 *avail = availmemr; 253 } 254 255 static inline void 256 gt_record_memory(int j, paddr_t start, paddr_t end, paddr_t endkernel) 257 { 258 physmemr[j].start = start; 259 physmemr[j].size = end - start; 260 if (start < endkernel) 261 start = endkernel; 262 availmemr[j].start = start; 263 availmemr[j].size = end - start; 264 } 265 266 void 267 gt_find_memory(bus_space_tag_t memt, bus_space_handle_t memh, 268 paddr_t endkernel) 269 { 270 paddr_t start = ~0, end = 0; 271 int i, j = 0, first = 1; 272 273 /* 274 * Round kernel end to a page boundary. 275 */ 276 for (i = 0; i < 4; i++) { 277 paddr_t nstart, nend; 278 nstart = GT_LowAddr_GET(bus_space_read_4(>_mem_bs_tag, 279 gt_memh, decode_regs[i].low_decode)); 280 nend = GT_HighAddr_GET(bus_space_read_4(>_mem_bs_tag, 281 gt_memh, decode_regs[i].high_decode)) + 1; 282 if (nstart >= nend) 283 continue; 284 if (first) { 285 /* 286 * First entry? Just remember it. 287 */ 288 start = nstart; 289 end = nend; 290 first = 0; 291 } else if (nstart == end) { 292 /* 293 * Contiguous? Just update the end. 294 */ 295 end = nend; 296 } else { 297 /* 298 * Disjoint? record it. 299 */ 300 gt_record_memory(j, start, end, endkernel); 301 start = nstart; 302 end = nend; 303 j++; 304 } 305 } 306 gt_record_memory(j, start, end, endkernel); 307 } 308 309 /* 310 * Machine dependent startup code. 311 */ 312 void 313 cpu_startup(void) 314 { 315 register_t msr; 316 317 oea_startup(NULL); 318 319 /* 320 * Now that we have VM, malloc()s are OK in bus_space. 321 */ 322 bus_space_mallocok(); 323 324 /* 325 * Now allow hardware interrupts. 326 */ 327 splhigh(); 328 __asm volatile ("mfmsr %0; ori %0,%0,%1; mtmsr %0" 329 : "=r"(msr) 330 : "K"(PSL_EE)); 331 } 332 333 /* 334 * consinit 335 * Initialize system console. 336 */ 337 void 338 consinit(void) 339 { 340 #ifdef MPSC_CONSOLE 341 /* PMON using MPSC0 @ 9600 */ 342 gtmpsccnattach(>_mem_bs_tag, gt_memh, MPSC_CONSOLE, 9600, 343 (TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8); 344 #else 345 /* PPCBOOT using COM1 @ 57600 */ 346 comcnattach(>_obio2_bs_tag, 0, 57600, 347 COM_FREQ*2, COM_TYPE_NORMAL, 348 (TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8); 349 #endif 350 } 351 352 /* 353 * Stray interrupts. 354 */ 355 void 356 strayintr(int irq) 357 { 358 log(LOG_ERR, "stray interrupt %d\n", irq); 359 } 360 361 /* 362 * Halt or reboot the machine after syncing/dumping according to howto. 363 */ 364 void 365 cpu_reboot(int howto, char *what) 366 { 367 static int syncing; 368 static char str[256]; 369 char *ap = str, *ap1 = ap; 370 371 boothowto = howto; 372 if (!cold && !(howto & RB_NOSYNC) && !syncing) { 373 syncing = 1; 374 vfs_shutdown(); /* sync */ 375 resettodr(); /* set wall clock */ 376 } 377 splhigh(); 378 if (howto & RB_HALT) { 379 doshutdownhooks(); 380 pmf_system_shutdown(boothowto); 381 printf("halted\n\n"); 382 cnhalt(); 383 while(1); 384 } 385 if (!cold && (howto & RB_DUMP)) 386 oea_dumpsys(); 387 doshutdownhooks(); 388 389 pmf_system_shutdown(boothowto); 390 printf("rebooting\n\n"); 391 if (what && *what) { 392 if (strlen(what) > sizeof str - 5) 393 printf("boot string too large, ignored\n"); 394 else { 395 strcpy(str, what); 396 ap1 = ap = str + strlen(str); 397 *ap++ = ' '; 398 } 399 } 400 *ap++ = '-'; 401 if (howto & RB_SINGLE) 402 *ap++ = 's'; 403 if (howto & RB_KDB) 404 *ap++ = 'd'; 405 *ap++ = 0; 406 if (ap[-2] == '-') 407 *ap1 = 0; 408 #if 0 409 { 410 void mvpppc_reboot(void); 411 mvpppc_reboot(); 412 } 413 #endif 414 gt_watchdog_reset(); 415 /* NOTREACHED */ 416 while (1); 417 } 418 419 int 420 lcsplx(int ipl) 421 { 422 return spllower(ipl); 423 } 424 425 void 426 gt_halt(bus_space_tag_t memt, bus_space_handle_t memh) 427 { 428 int i; 429 u_int32_t data; 430 431 /* 432 * Shut down the MPSC ports 433 */ 434 for (i = 0; i < 2; i++) { 435 bus_space_write_4(memt, memh, 436 SDMA_U_SDCM(i), SDMA_SDCM_AR|SDMA_SDCM_AT); 437 for (;;) { 438 data = bus_space_read_4(memt, memh, 439 SDMA_U_SDCM(i)); 440 if (((SDMA_SDCM_AR|SDMA_SDCM_AT) & data) == 0) 441 break; 442 } 443 } 444 445 /* 446 * Shut down the Ethernets 447 */ 448 for (i = 0; i < 3; i++) { 449 bus_space_write_4(memt, memh, 450 ETH_ESDCMR(2), ETH_ESDCMR_AR|ETH_ESDCMR_AT); 451 for (;;) { 452 data = bus_space_read_4(memt, memh, 453 ETH_ESDCMR(i)); 454 if (((ETH_ESDCMR_AR|ETH_ESDCMR_AT) & data) == 0) 455 break; 456 } 457 data = bus_space_read_4(memt, memh, ETH_EPCR(i)); 458 data &= ~ETH_EPCR_EN; 459 bus_space_write_4(memt, memh, ETH_EPCR(i), data); 460 } 461 } 462 463 int 464 gtget_macaddr(struct gt_softc *gt, int macno, char *enaddr) 465 { 466 enaddr[0] = 0x02; 467 enaddr[1] = 0x00; 468 enaddr[2] = 0x04; 469 enaddr[3] = 0x00; 470 enaddr[4] = 0x00; 471 enaddr[5] = 0x04 + macno; 472 473 return 0; 474 } 475 476 void 477 gt_bus_space_init(void) 478 { 479 bus_space_tag_t gt_memt = >_mem_bs_tag; 480 const struct gt_decode_info *di; 481 uint32_t datal, datah; 482 int error; 483 int bs = 0; 484 int j; 485 486 error = bus_space_init(>_mem_bs_tag, "gtmem", 487 ex_storage[bs], sizeof(ex_storage[bs])); 488 489 error = bus_space_map(gt_memt, 0, 0x10000, 0, >_memh); 490 491 for (j = 0, di = &decode_regs[4]; j < 5; j++, di++) { 492 struct powerpc_bus_space *memt = obio_bs_tags[j]; 493 datal = bus_space_read_4(gt_memt, gt_memh, di->low_decode); 494 datah = bus_space_read_4(gt_memt, gt_memh, di->high_decode); 495 496 if (GT_LowAddr_GET(datal) >= GT_HighAddr_GET(datal)) { 497 obio_bs_tags[j] = NULL; 498 continue; 499 } 500 memt->pbs_offset = GT_LowAddr_GET(datal); 501 memt->pbs_limit = GT_HighAddr_GET(datah) + 1 - 502 memt->pbs_offset; 503 504 error = bus_space_init(memt, "obio2", 505 ex_storage[bs], sizeof(ex_storage[bs])); 506 bs++; 507 } 508 509 datal = bus_space_read_4(gt_memt, gt_memh, GT_PCI0_Mem0_Low_Decode); 510 datah = bus_space_read_4(gt_memt, gt_memh, GT_PCI0_Mem0_High_Decode); 511 #if defined(GT_PCI0_MEMBASE) 512 datal &= ~0xfff; 513 datal |= (GT_PCI0_MEMBASE >> 20); 514 bus_space_write_4(gt_memt, gt_memh, GT_PCI0_Mem0_Low_Decode, datal); 515 #endif 516 #if defined(GT_PCI0_MEMSIZE) 517 datah &= ~0xfff; 518 datah |= (GT_PCI0_MEMSIZE + GT_LowAddr_GET(datal) - 1) >> 20; 519 bus_space_write_4(gt_memt, gt_memh, GT_PCI0_Mem0_High_Decode, datal); 520 #endif 521 gt_pci0_mem_bs_tag.pbs_base = GT_LowAddr_GET(datal); 522 gt_pci0_mem_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1; 523 524 error = bus_space_init(>_pci0_mem_bs_tag, "pci0-mem", 525 ex_storage[bs], sizeof(ex_storage[bs])); 526 bs++; 527 528 /* 529 * Make sure PCI0 Memory is BAT mapped. 530 */ 531 if (GT_LowAddr_GET(datal) < GT_HighAddr_GET(datal)) 532 oea_iobat_add(gt_pci0_mem_bs_tag.pbs_base & SEGMENT_MASK, BAT_BL_256M); 533 534 /* 535 * Make sure that I/O space start at 0. 536 */ 537 bus_space_write_4(gt_memt, gt_memh, GT_PCI1_IO_Remap, 0); 538 539 datal = bus_space_read_4(gt_memt, gt_memh, GT_PCI0_IO_Low_Decode); 540 datah = bus_space_read_4(gt_memt, gt_memh, GT_PCI0_IO_High_Decode); 541 #if defined(GT_PCI0_IOBASE) 542 datal &= ~0xfff; 543 datal |= (GT_PCI0_IOBASE >> 20); 544 bus_space_write_4(gt_memt, gt_memh, GT_PCI0_IO_Low_Decode, datal); 545 #endif 546 #if defined(GT_PCI0_IOSIZE) 547 datah &= ~0xfff; 548 datah |= (GT_PCI0_IOSIZE + GT_LowAddr_GET(datal) - 1) >> 20; 549 bus_space_write_4(gt_memt, gt_memh, GT_PCI0_IO_High_Decode, datal); 550 #endif 551 gt_pci0_io_bs_tag.pbs_offset = GT_LowAddr_GET(datal); 552 gt_pci0_io_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1 - 553 gt_pci0_io_bs_tag.pbs_offset; 554 555 error = bus_space_init(>_pci0_io_bs_tag, "pci0-ioport", 556 ex_storage[bs], sizeof(ex_storage[bs])); 557 bs++; 558 559 #if 0 560 error = extent_alloc_region(gt_pci0_io_bs_tag.pbs_extent, 561 0x10000, 0x7F0000, EX_NOWAIT); 562 if (error) 563 panic("gt_bus_space_init: can't block out reserved " 564 "I/O space 0x10000-0x7fffff: error=%d\n", error); 565 #endif 566 567 datal = bus_space_read_4(gt_memt, gt_memh, GT_PCI1_Mem0_Low_Decode); 568 datah = bus_space_read_4(gt_memt, gt_memh, GT_PCI1_Mem0_High_Decode); 569 #if defined(GT_PCI1_MEMBASE) 570 datal &= ~0xfff; 571 datal |= (GT_PCI1_MEMBASE >> 20); 572 bus_space_write_4(gt_memt, gt_memh, GT_PCI1_Mem0_Low_Decode, datal); 573 #endif 574 #if defined(GT_PCI1_MEMSIZE) 575 datah &= ~0xfff; 576 datah |= (GT_PCI1_MEMSIZE + GT_LowAddr_GET(datal) - 1) >> 20; 577 bus_space_write_4(gt_memt, gt_memh, GT_PCI1_Mem0_High_Decode, datal); 578 #endif 579 gt_pci1_mem_bs_tag.pbs_base = GT_LowAddr_GET(datal); 580 gt_pci1_mem_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1; 581 582 error = bus_space_init(>_pci1_mem_bs_tag, "pci1-mem", 583 ex_storage[bs], sizeof(ex_storage[bs])); 584 bs++; 585 586 /* 587 * Make sure PCI1 Memory is BAT mapped. 588 */ 589 if (GT_LowAddr_GET(datal) < GT_HighAddr_GET(datal)) 590 oea_iobat_add(gt_pci1_mem_bs_tag.pbs_base & SEGMENT_MASK, BAT_BL_256M); 591 592 /* 593 * Make sure that I/O space start at 0. 594 */ 595 bus_space_write_4(gt_memt, gt_memh, GT_PCI1_IO_Remap, 0); 596 597 datal = bus_space_read_4(gt_memt, gt_memh, GT_PCI1_IO_Low_Decode); 598 datah = bus_space_read_4(gt_memt, gt_memh, GT_PCI1_IO_High_Decode); 599 #if defined(GT_PCI1_IOBASE) 600 datal &= ~0xfff; 601 datal |= (GT_PCI1_IOBASE >> 20); 602 bus_space_write_4(gt_memt, gt_memh, GT_PCI1_IO_Low_Decode, datal); 603 #endif 604 #if defined(GT_PCI1_IOSIZE) 605 datah &= ~0xfff; 606 datah |= (GT_PCI1_IOSIZE + GT_LowAddr_GET(datal) - 1) >> 20; 607 bus_space_write_4(gt_memt, gt_memh, GT_PCI1_IO_High_Decode, datal); 608 #endif 609 gt_pci1_io_bs_tag.pbs_offset = GT_LowAddr_GET(datal); 610 gt_pci1_io_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1 - 611 gt_pci1_io_bs_tag.pbs_offset; 612 613 error = bus_space_init(>_pci1_io_bs_tag, "pci1-ioport", 614 ex_storage[bs], sizeof(ex_storage[bs])); 615 bs++; 616 617 #if 0 618 error = extent_alloc_region(gt_pci1_io_bs_tag.pbs_extent, 619 0x10000, 0x7F0000, EX_NOWAIT); 620 if (error) 621 panic("gt_bus_space_init: can't block out reserved " 622 "I/O space 0x10000-0x7fffff: error=%d\n", error); 623 #endif 624 } 625
Indexes created Thu Oct 30 23:09:54 GMT 2025