machdep.c revision 1.31
1 /* $NetBSD: machdep.c,v 1.31 2014/02/25 14:33:32 martin Exp $ */ 2 3 /* 4 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 5 * Copyright (C) 1995, 1996 TooLs GmbH. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by TooLs GmbH. 19 * 4. The name of TooLs GmbH may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.31 2014/02/25 14:33:32 martin Exp $"); 36 37 #include "opt_marvell.h" 38 #include "opt_modular.h" 39 #include "opt_ev64260.h" 40 #include "opt_compat_netbsd.h" 41 #include "opt_ddb.h" 42 #include "opt_inet.h" 43 #include "opt_ccitt.h" 44 #include "opt_ns.h" 45 #include "opt_ipkdb.h" 46 47 #define _POWERPC_BUS_DMA_PRIVATE 48 49 #include <sys/param.h> 50 #include <sys/bus.h> 51 #include <sys/conf.h> 52 #include <sys/device.h> 53 #include <sys/extent.h> 54 #include <sys/kernel.h> 55 #include <sys/ksyms.h> 56 #include <sys/mount.h> 57 #include <sys/reboot.h> 58 #include <sys/systm.h> 59 #include <sys/termios.h> 60 #include <sys/vnode.h> 61 62 #include <uvm/uvm_extern.h> 63 64 #include <machine/powerpc.h> 65 66 #include <powerpc/db_machdep.h> 67 #include <powerpc/pmap.h> 68 69 #include <powerpc/oea/bat.h> 70 #include <powerpc/pic/picvar.h> 71 #include <powerpc/pio.h> 72 73 #include <ddb/db_extern.h> 74 75 #include <dev/cons.h> 76 77 #include "com.h" 78 #if (NCOM > 0) 79 #include <dev/ic/comreg.h> 80 #include <dev/ic/comvar.h> 81 #endif 82 83 #include <dev/marvell/gtreg.h> 84 #include <dev/marvell/gtvar.h> 85 86 #include "gtmpsc.h" 87 #if (NGTMPSC > 0) 88 #include <dev/marvell/gtbrgreg.h> 89 #include <dev/marvell/gtsdmareg.h> 90 #include <dev/marvell/gtmpscreg.h> 91 #include <dev/marvell/gtmpscvar.h> 92 #endif 93 94 #include "ksyms.h" 95 #include "locators.h" 96 97 98 /* 99 * Global variables used here and there 100 */ 101 #define PMONMEMREGIONS 32 102 struct mem_region physmemr[PMONMEMREGIONS], availmemr[PMONMEMREGIONS]; 103 104 void initppc(u_int, u_int, u_int, void *); /* Called from locore */ 105 static void gt_bus_space_init(void); 106 static inline void gt_record_memory(int, paddr_t, paddr_t, paddr_t); 107 static void gt_find_memory(paddr_t); 108 109 bus_addr_t gt_base = 0; 110 111 extern int primary_pic; 112 struct pic_ops *discovery_pic; 113 struct pic_ops *discovery_gpp_pic[4]; 114 115 116 struct powerpc_bus_space ev64260_pci0_mem_bs_tag = { 117 _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE, 118 0x00000000, 0x00000000, 0x00000000, 119 }; 120 struct powerpc_bus_space ev64260_pci0_io_bs_tag = { 121 _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_IO_TYPE, 122 0x00000000, 0x00000000, 0x00000000, 123 }; 124 struct powerpc_bus_space ev64260_pci1_mem_bs_tag = { 125 _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE, 126 0x00000000, 0x00000000, 0x00000000, 127 }; 128 struct powerpc_bus_space ev64260_pci1_io_bs_tag = { 129 _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_IO_TYPE, 130 0x00000000, 0x00000000, 0x00000000, 131 }; 132 struct powerpc_bus_space ev64260_obio0_bs_tag = { 133 _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE|OBIO0_STRIDE, 134 0x00000000, 0x00000000, 0x00000000, 135 }; 136 struct powerpc_bus_space ev64260_obio1_bs_tag = { 137 _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE|OBIO1_STRIDE, 138 0x00000000, 0x00000000, 0x00000000, 139 }; 140 struct powerpc_bus_space ev64260_obio2_bs_tag = { 141 _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE|OBIO2_STRIDE, 142 0x00000000, 0x00000000, 0x00000000, 143 }; 144 struct powerpc_bus_space ev64260_obio3_bs_tag = { 145 _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE|OBIO3_STRIDE, 146 0x00000000, 0x00000000, 0x00000000, 147 }; 148 struct powerpc_bus_space ev64260_bootcs_bs_tag = { 149 _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE, 150 0x00000000, 0x00000000, 0x00000000, 151 }; 152 struct powerpc_bus_space ev64260_gt_bs_tag = { 153 _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE, 154 0x00000000, 0x00000000, GT_SIZE, 155 }; 156 157 struct powerpc_bus_space *ev64260_obio_bs_tags[5] = { 158 &ev64260_obio0_bs_tag, &ev64260_obio1_bs_tag, &ev64260_obio2_bs_tag, 159 &ev64260_obio3_bs_tag, &ev64260_bootcs_bs_tag 160 }; 161 162 static char ex_storage[10][EXTENT_FIXED_STORAGE_SIZE(8)] 163 __attribute__((aligned(8))); 164 165 const struct gt_decode_info { 166 bus_addr_t low_decode; 167 bus_addr_t high_decode; 168 } decode_regs[] = { 169 { GT_SCS0_Low_Decode, GT_SCS0_High_Decode }, 170 { GT_SCS1_Low_Decode, GT_SCS1_High_Decode }, 171 { GT_SCS2_Low_Decode, GT_SCS2_High_Decode }, 172 { GT_SCS3_Low_Decode, GT_SCS3_High_Decode }, 173 { GT_CS0_Low_Decode, GT_CS0_High_Decode }, 174 { GT_CS1_Low_Decode, GT_CS1_High_Decode }, 175 { GT_CS2_Low_Decode, GT_CS2_High_Decode }, 176 { GT_CS3_Low_Decode, GT_CS3_High_Decode }, 177 { GT_BootCS_Low_Decode, GT_BootCS_High_Decode }, 178 }; 179 180 struct powerpc_bus_dma_tag ev64260_bus_dma_tag = { 181 0, /* _bounce_thresh */ 182 _bus_dmamap_create, 183 _bus_dmamap_destroy, 184 _bus_dmamap_load, 185 _bus_dmamap_load_mbuf, 186 _bus_dmamap_load_uio, 187 _bus_dmamap_load_raw, 188 _bus_dmamap_unload, 189 _bus_dmamap_sync, 190 _bus_dmamem_alloc, 191 _bus_dmamem_free, 192 _bus_dmamem_map, 193 _bus_dmamem_unmap, 194 _bus_dmamem_mmap, 195 }; 196 197 198 void 199 initppc(u_int startkernel, u_int endkernel, u_int args, void *btinfo) 200 { 201 extern struct cfdata cfdata[]; 202 cfdata_t cf = &cfdata[0]; 203 204 /* Get mapped address of gt(System Controller) */ 205 while (cf->cf_name != NULL) { 206 if (strcmp(cf->cf_name, "gt") == 0 && 207 *cf->cf_loc != MAINBUSCF_ADDR_DEFAULT) 208 break; 209 cf++; 210 } 211 if (cf->cf_name == NULL) 212 panic("where is gt?"); 213 gt_base = *cf->cf_loc; 214 215 ev64260_gt_bs_tag.pbs_offset = gt_base; 216 ev64260_gt_bs_tag.pbs_base = gt_base; 217 ev64260_gt_bs_tag.pbs_limit += gt_base; 218 oea_batinit(gt_base, BAT_BL_256M); 219 220 oea_init(NULL); 221 222 gt_bus_space_init(); 223 gt_find_memory(roundup(endkernel, PAGE_SIZE)); 224 225 consinit(); 226 227 /* 228 * Set the page size. 229 */ 230 uvm_setpagesize(); 231 232 /* 233 * Initialize pmap module. 234 */ 235 pmap_bootstrap(startkernel, endkernel); 236 237 #if NKSYMS || defined(DDB) || defined(MODULAR) 238 { 239 extern void *startsym, *endsym; 240 ksyms_addsyms_elf((int)((u_int)endsym - (u_int)startsym), 241 startsym, endsym); 242 } 243 #endif 244 #ifdef IPKDB 245 /* 246 * Now trap to IPKDB 247 */ 248 ipkdb_init(); 249 if (boothowto & RB_KDB) 250 ipkdb_connect(0); 251 #endif 252 } 253 254 /* 255 * Machine dependent startup code. 256 */ 257 void 258 cpu_startup(void) 259 { 260 register_t msr; 261 262 oea_startup(NULL); 263 264 pic_init(); 265 discovery_pic = setup_discovery_pic(); 266 primary_pic = 0; 267 discovery_gpp_pic[0] = setup_discovery_gpp_pic(discovery_pic, 0); 268 discovery_gpp_pic[1] = setup_discovery_gpp_pic(discovery_pic, 8); 269 discovery_gpp_pic[2] = setup_discovery_gpp_pic(discovery_pic, 16); 270 discovery_gpp_pic[3] = setup_discovery_gpp_pic(discovery_pic, 24); 271 /* 272 * GPP interrupts establishes later. 273 */ 274 275 oea_install_extint(pic_ext_intr); 276 277 /* 278 * Now that we have VM, malloc()s are OK in bus_space. 279 */ 280 bus_space_mallocok(); 281 282 /* 283 * Now allow hardware interrupts. 284 */ 285 splraise(-1); 286 __asm volatile ("mfmsr %0; ori %0,%0,%1; mtmsr %0" 287 : "=r"(msr) 288 : "K"(PSL_EE)); 289 } 290 291 /* 292 * consinit 293 * Initialize system console. 294 */ 295 void 296 consinit(void) 297 { 298 299 #ifdef MPSC_CONSOLE 300 /* PMON using MPSC0 @ 9600 */ 301 const int brg = GTMPSC_CRR_BRG0; 302 const int baud = 9600; 303 uint32_t cr; 304 305 #if 1 306 /* 307 * XXX HACK FIXME 308 * PMON output has not been flushed. give him a chance 309 */ 310 DELAY(100000); /* XXX */ 311 #endif 312 /* Setup MPSC Routing Registers */ 313 out32rb(gt_base + GTMPSC_MRR, GTMPSC_MRR_RES); 314 cr = in32rb(gt_base + GTMPSC_RCRR); 315 cr &= ~GTMPSC_CRR(MPSC_CONSOLE, GTMPSC_CRR_MASK); 316 cr |= GTMPSC_CRR(MPSC_CONSOLE, brg); 317 out32rb(gt_base + GTMPSC_RCRR, cr); 318 out32rb(gt_base + GTMPSC_TCRR, cr); 319 320 /* Setup Baud Rate Configuration Register of Baud Rate Generator */ 321 out32rb(gt_base + BRG_BCR(brg), 322 BRG_BCR_EN | GT_MPSC_CLOCK_SOURCE | compute_cdv(baud)); 323 324 gtmpsccnattach(&ev64260_gt_bs_tag, &ev64260_bus_dma_tag, gt_base, 325 MPSC_CONSOLE, brg, baud, 326 (TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8); 327 #else 328 /* PPCBOOT using COM1 @ 57600 */ 329 comcnattach(>_obio2_bs_tag, 0, 57600, 330 COM_FREQ*2, COM_TYPE_NORMAL, 331 (TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8); 332 #endif 333 } 334 335 /* 336 * Halt or reboot the machine after syncing/dumping according to howto. 337 */ 338 void 339 cpu_reboot(int howto, char *what) 340 { 341 static int syncing; 342 static char str[256]; 343 char *ap = str, *ap1 = ap; 344 345 boothowto = howto; 346 if (!cold && !(howto & RB_NOSYNC) && !syncing) { 347 syncing = 1; 348 vfs_shutdown(); /* sync */ 349 resettodr(); /* set wall clock */ 350 } 351 splhigh(); 352 if (howto & RB_HALT) { 353 doshutdownhooks(); 354 pmf_system_shutdown(boothowto); 355 printf("halted\n\n"); 356 cnhalt(); 357 while(1); 358 } 359 if (!cold && (howto & RB_DUMP)) 360 oea_dumpsys(); 361 doshutdownhooks(); 362 363 pmf_system_shutdown(boothowto); 364 printf("rebooting\n\n"); 365 if (what && *what) { 366 if (strlen(what) > sizeof str - 5) 367 printf("boot string too large, ignored\n"); 368 else { 369 strcpy(str, what); 370 ap1 = ap = str + strlen(str); 371 *ap++ = ' '; 372 } 373 } 374 *ap++ = '-'; 375 if (howto & RB_SINGLE) 376 *ap++ = 's'; 377 if (howto & RB_KDB) 378 *ap++ = 'd'; 379 *ap++ = 0; 380 if (ap[-2] == '-') 381 *ap1 = 0; 382 gt_watchdog_reset(); 383 /* NOTREACHED */ 384 while (1); 385 } 386 387 void 388 mem_regions(struct mem_region **mem, struct mem_region **avail) 389 { 390 391 *mem = physmemr; 392 *avail = availmemr; 393 } 394 395 static void 396 gt_bus_space_init(void) 397 { 398 const struct gt_decode_info *di; 399 uint32_t datal, datah; 400 int bs, i; 401 402 bs = 0; 403 bus_space_init(&ev64260_gt_bs_tag, "gt", 404 ex_storage[bs], sizeof(ex_storage[bs])); 405 bs++; 406 407 for (i = 0, di = &decode_regs[4]; i < 5; i++, di++) { 408 struct powerpc_bus_space *memt = ev64260_obio_bs_tags[i]; 409 410 datal = in32rb(gt_base + di->low_decode); 411 datah = in32rb(gt_base + di->high_decode); 412 413 if (GT_LowAddr_GET(datal) >= GT_HighAddr_GET(datal)) { 414 ev64260_obio_bs_tags[i] = NULL; 415 continue; 416 } 417 memt->pbs_offset = GT_LowAddr_GET(datal); 418 memt->pbs_limit = GT_HighAddr_GET(datah) + 1 - 419 memt->pbs_offset; 420 421 bus_space_init(memt, "obio2", 422 ex_storage[bs], sizeof(ex_storage[bs])); 423 bs++; 424 } 425 426 datal = in32rb(gt_base + GT_PCI0_Mem0_Low_Decode); 427 datah = in32rb(gt_base + GT_PCI0_Mem0_High_Decode); 428 #if defined(GT_PCI0_MEMBASE) 429 datal &= ~0xfff; 430 datal |= (GT_PCI0_MEMBASE >> 20); 431 out32rb(gt_base + GT_PCI0_Mem0_Low_Decode, datal); 432 #endif 433 #if defined(GT_PCI0_MEMSIZE) 434 datah &= ~0xfff; 435 datah |= (GT_PCI0_MEMSIZE + GT_LowAddr_GET(datal) - 1) >> 20; 436 out32rb(gt_base + GT_PCI0_Mem0_High_Decode, datal); 437 #endif 438 ev64260_pci0_mem_bs_tag.pbs_base = GT_LowAddr_GET(datal); 439 ev64260_pci0_mem_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1; 440 441 bus_space_init(&ev64260_pci0_mem_bs_tag, "pci0-mem", 442 ex_storage[bs], sizeof(ex_storage[bs])); 443 bs++; 444 445 #if 1 /* XXXXXX */ 446 /* 447 * Make sure PCI0 Memory is BAT mapped. 448 */ 449 if (GT_LowAddr_GET(datal) < GT_HighAddr_GET(datal)) 450 oea_iobat_add(ev64260_pci0_mem_bs_tag.pbs_base & SEGMENT_MASK, 451 BAT_BL_256M); 452 #endif 453 454 /* 455 * Make sure that I/O space start at 0. 456 */ 457 out32rb(gt_base + GT_PCI1_IO_Remap, 0); 458 459 datal = in32rb(gt_base + GT_PCI0_IO_Low_Decode); 460 datah = in32rb(gt_base + GT_PCI0_IO_High_Decode); 461 #if defined(GT_PCI0_IOBASE) 462 datal &= ~0xfff; 463 datal |= (GT_PCI0_IOBASE >> 20); 464 out32rb(gt_base + GT_PCI0_IO_Low_Decode, datal); 465 #endif 466 #if defined(GT_PCI0_IOSIZE) 467 datah &= ~0xfff; 468 datah |= (GT_PCI0_IOSIZE + GT_LowAddr_GET(datal) - 1) >> 20; 469 out32rb(gt_base + GT_PCI0_IO_High_Decode, datal); 470 #endif 471 ev64260_pci0_io_bs_tag.pbs_offset = GT_LowAddr_GET(datal); 472 ev64260_pci0_io_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1 - 473 ev64260_pci0_io_bs_tag.pbs_offset; 474 475 bus_space_init(&ev64260_pci0_io_bs_tag, "pci0-ioport", 476 ex_storage[bs], sizeof(ex_storage[bs])); 477 bs++; 478 479 datal = in32rb(gt_base + GT_PCI1_Mem0_Low_Decode); 480 datah = in32rb(gt_base + GT_PCI1_Mem0_High_Decode); 481 #if defined(GT_PCI1_MEMBASE) 482 datal &= ~0xfff; 483 datal |= (GT_PCI1_MEMBASE >> 20); 484 out32rb(gt_base + GT_PCI1_Mem0_Low_Decode, datal); 485 #endif 486 #if defined(GT_PCI1_MEMSIZE) 487 datah &= ~0xfff; 488 datah |= (GT_PCI1_MEMSIZE + GT_LowAddr_GET(datal) - 1) >> 20; 489 out32rb(gt_base + GT_PCI1_Mem0_High_Decode, datal); 490 #endif 491 ev64260_pci1_mem_bs_tag.pbs_base = GT_LowAddr_GET(datal); 492 ev64260_pci1_mem_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1; 493 494 bus_space_init(&ev64260_pci1_mem_bs_tag, "pci1-mem", 495 ex_storage[bs], sizeof(ex_storage[bs])); 496 bs++; 497 498 #if 1 /* XXXXXX */ 499 /* 500 * Make sure PCI1 Memory is BAT mapped. 501 */ 502 if (GT_LowAddr_GET(datal) < GT_HighAddr_GET(datal)) 503 oea_iobat_add(ev64260_pci1_mem_bs_tag.pbs_base & SEGMENT_MASK, 504 BAT_BL_256M); 505 #endif 506 507 /* 508 * Make sure that I/O space start at 0. 509 */ 510 out32rb(gt_base + GT_PCI1_IO_Remap, 0); 511 512 datal = in32rb(gt_base + GT_PCI1_IO_Low_Decode); 513 datah = in32rb(gt_base + GT_PCI1_IO_High_Decode); 514 #if defined(GT_PCI1_IOBASE) 515 datal &= ~0xfff; 516 datal |= (GT_PCI1_IOBASE >> 20); 517 out32rb(gt_base + GT_PCI1_IO_Low_Decode, datal); 518 #endif 519 #if defined(GT_PCI1_IOSIZE) 520 datah &= ~0xfff; 521 datah |= (GT_PCI1_IOSIZE + GT_LowAddr_GET(datal) - 1) >> 20; 522 out32rb(gt_base + GT_PCI1_IO_High_Decode, datal); 523 #endif 524 ev64260_pci1_io_bs_tag.pbs_offset = GT_LowAddr_GET(datal); 525 ev64260_pci1_io_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1 - 526 ev64260_pci1_io_bs_tag.pbs_offset; 527 528 bus_space_init(&ev64260_pci1_io_bs_tag, "pci1-ioport", 529 ex_storage[bs], sizeof(ex_storage[bs])); 530 bs++; 531 } 532 533 static inline void 534 gt_record_memory(int j, paddr_t start, paddr_t end, paddr_t endkernel) 535 { 536 physmemr[j].start = start; 537 physmemr[j].size = end - start; 538 if (start < endkernel) 539 start = endkernel; 540 availmemr[j].start = start; 541 availmemr[j].size = end - start; 542 } 543 544 static void 545 gt_find_memory(paddr_t endkernel) 546 { 547 paddr_t start = ~0, end = 0; 548 const struct gt_decode_info *di; 549 int i, j = 0, first = 1; 550 551 /* 552 * Round kernel end to a page boundary. 553 */ 554 for (i = 0; i < 4; i++) { 555 paddr_t nstart, nend; 556 557 di = &decode_regs[i]; 558 nstart = GT_LowAddr_GET(in32rb(gt_base + di->low_decode)); 559 nend = GT_HighAddr_GET(in32rb(gt_base + di->high_decode)) + 1; 560 if (nstart >= nend) 561 continue; 562 if (first) { 563 /* 564 * First entry? Just remember it. 565 */ 566 start = nstart; 567 end = nend; 568 first = 0; 569 } else if (nstart == end) { 570 /* 571 * Contiguous? Just update the end. 572 */ 573 end = nend; 574 } else { 575 /* 576 * Disjoint? record it. 577 */ 578 gt_record_memory(j, start, end, endkernel); 579 start = nstart; 580 end = nend; 581 j++; 582 } 583 } 584 gt_record_memory(j, start, end, endkernel); 585 } 586
Indexes created Wed Oct 01 19:09:53 GMT 2025