machdep.c revision 1.32
1 /* $NetBSD: machdep.c,v 1.32 2016/12/22 14:47:57 cherry Exp $ */ 2 3 /* 4 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 5 * Copyright (C) 1995, 1996 TooLs GmbH. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by TooLs GmbH. 19 * 4. The name of TooLs GmbH may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.32 2016/12/22 14:47:57 cherry Exp $"); 36 37 #include "opt_marvell.h" 38 #include "opt_modular.h" 39 #include "opt_ev64260.h" 40 #include "opt_compat_netbsd.h" 41 #include "opt_ddb.h" 42 #include "opt_inet.h" 43 #include "opt_ccitt.h" 44 #include "opt_ns.h" 45 #include "opt_ipkdb.h" 46 47 #define _POWERPC_BUS_DMA_PRIVATE 48 49 #include <sys/param.h> 50 #include <sys/bus.h> 51 #include <sys/conf.h> 52 #include <sys/device.h> 53 #include <sys/extent.h> 54 #include <sys/kernel.h> 55 #include <sys/ksyms.h> 56 #include <sys/mount.h> 57 #include <sys/reboot.h> 58 #include <sys/systm.h> 59 #include <sys/termios.h> 60 #include <sys/vnode.h> 61 62 #include <uvm/uvm_extern.h> 63 64 #include <machine/powerpc.h> 65 66 #include <powerpc/db_machdep.h> 67 #include <powerpc/pmap.h> 68 69 #include <powerpc/oea/bat.h> 70 #include <powerpc/pic/picvar.h> 71 #include <powerpc/pio.h> 72 73 #include <ddb/db_extern.h> 74 75 #include <dev/cons.h> 76 77 #include "com.h" 78 #if (NCOM > 0) 79 #include <dev/ic/comreg.h> 80 #include <dev/ic/comvar.h> 81 #endif 82 83 #include <dev/marvell/gtreg.h> 84 #include <dev/marvell/gtvar.h> 85 86 #include "gtmpsc.h" 87 #if (NGTMPSC > 0) 88 #include <dev/marvell/gtbrgreg.h> 89 #include <dev/marvell/gtsdmareg.h> 90 #include <dev/marvell/gtmpscreg.h> 91 #include <dev/marvell/gtmpscvar.h> 92 #endif 93 94 #include "ksyms.h" 95 #include "locators.h" 96 97 98 /* 99 * Global variables used here and there 100 */ 101 #define PMONMEMREGIONS 32 102 struct mem_region physmemr[PMONMEMREGIONS], availmemr[PMONMEMREGIONS]; 103 104 void initppc(u_int, u_int, u_int, void *); /* Called from locore */ 105 static void gt_bus_space_init(void); 106 static inline void gt_record_memory(int, paddr_t, paddr_t, paddr_t); 107 static void gt_find_memory(paddr_t); 108 109 bus_addr_t gt_base = 0; 110 111 extern int primary_pic; 112 struct pic_ops *discovery_pic; 113 struct pic_ops *discovery_gpp_pic[4]; 114 115 116 struct powerpc_bus_space ev64260_pci0_mem_bs_tag = { 117 _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE, 118 0x00000000, 0x00000000, 0x00000000, 119 }; 120 struct powerpc_bus_space ev64260_pci0_io_bs_tag = { 121 _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_IO_TYPE, 122 0x00000000, 0x00000000, 0x00000000, 123 }; 124 struct powerpc_bus_space ev64260_pci1_mem_bs_tag = { 125 _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE, 126 0x00000000, 0x00000000, 0x00000000, 127 }; 128 struct powerpc_bus_space ev64260_pci1_io_bs_tag = { 129 _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_IO_TYPE, 130 0x00000000, 0x00000000, 0x00000000, 131 }; 132 struct powerpc_bus_space ev64260_obio0_bs_tag = { 133 _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE|OBIO0_STRIDE, 134 0x00000000, 0x00000000, 0x00000000, 135 }; 136 struct powerpc_bus_space ev64260_obio1_bs_tag = { 137 _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE|OBIO1_STRIDE, 138 0x00000000, 0x00000000, 0x00000000, 139 }; 140 struct powerpc_bus_space ev64260_obio2_bs_tag = { 141 _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE|OBIO2_STRIDE, 142 0x00000000, 0x00000000, 0x00000000, 143 }; 144 struct powerpc_bus_space ev64260_obio3_bs_tag = { 145 _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE|OBIO3_STRIDE, 146 0x00000000, 0x00000000, 0x00000000, 147 }; 148 struct powerpc_bus_space ev64260_bootcs_bs_tag = { 149 _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE, 150 0x00000000, 0x00000000, 0x00000000, 151 }; 152 struct powerpc_bus_space ev64260_gt_bs_tag = { 153 _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE, 154 0x00000000, 0x00000000, GT_SIZE, 155 }; 156 157 struct powerpc_bus_space *ev64260_obio_bs_tags[5] = { 158 &ev64260_obio0_bs_tag, &ev64260_obio1_bs_tag, &ev64260_obio2_bs_tag, 159 &ev64260_obio3_bs_tag, &ev64260_bootcs_bs_tag 160 }; 161 162 static char ex_storage[10][EXTENT_FIXED_STORAGE_SIZE(8)] 163 __attribute__((aligned(8))); 164 165 const struct gt_decode_info { 166 bus_addr_t low_decode; 167 bus_addr_t high_decode; 168 } decode_regs[] = { 169 { GT_SCS0_Low_Decode, GT_SCS0_High_Decode }, 170 { GT_SCS1_Low_Decode, GT_SCS1_High_Decode }, 171 { GT_SCS2_Low_Decode, GT_SCS2_High_Decode }, 172 { GT_SCS3_Low_Decode, GT_SCS3_High_Decode }, 173 { GT_CS0_Low_Decode, GT_CS0_High_Decode }, 174 { GT_CS1_Low_Decode, GT_CS1_High_Decode }, 175 { GT_CS2_Low_Decode, GT_CS2_High_Decode }, 176 { GT_CS3_Low_Decode, GT_CS3_High_Decode }, 177 { GT_BootCS_Low_Decode, GT_BootCS_High_Decode }, 178 }; 179 180 struct powerpc_bus_dma_tag ev64260_bus_dma_tag = { 181 0, /* _bounce_thresh */ 182 _bus_dmamap_create, 183 _bus_dmamap_destroy, 184 _bus_dmamap_load, 185 _bus_dmamap_load_mbuf, 186 _bus_dmamap_load_uio, 187 _bus_dmamap_load_raw, 188 _bus_dmamap_unload, 189 _bus_dmamap_sync, 190 _bus_dmamem_alloc, 191 _bus_dmamem_free, 192 _bus_dmamem_map, 193 _bus_dmamem_unmap, 194 _bus_dmamem_mmap, 195 }; 196 197 198 void 199 initppc(u_int startkernel, u_int endkernel, u_int args, void *btinfo) 200 { 201 extern struct cfdata cfdata[]; 202 cfdata_t cf = &cfdata[0]; 203 204 /* Get mapped address of gt(System Controller) */ 205 while (cf->cf_name != NULL) { 206 if (strcmp(cf->cf_name, "gt") == 0 && 207 *cf->cf_loc != MAINBUSCF_ADDR_DEFAULT) 208 break; 209 cf++; 210 } 211 if (cf->cf_name == NULL) 212 panic("where is gt?"); 213 gt_base = *cf->cf_loc; 214 215 ev64260_gt_bs_tag.pbs_offset = gt_base; 216 ev64260_gt_bs_tag.pbs_base = gt_base; 217 ev64260_gt_bs_tag.pbs_limit += gt_base; 218 oea_batinit(gt_base, BAT_BL_256M); 219 220 oea_init(NULL); 221 222 gt_bus_space_init(); 223 gt_find_memory(roundup(endkernel, PAGE_SIZE)); 224 225 consinit(); 226 227 uvm_md_init(); 228 229 /* 230 * Initialize pmap module. 231 */ 232 pmap_bootstrap(startkernel, endkernel); 233 234 #if NKSYMS || defined(DDB) || defined(MODULAR) 235 { 236 extern void *startsym, *endsym; 237 ksyms_addsyms_elf((int)((u_int)endsym - (u_int)startsym), 238 startsym, endsym); 239 } 240 #endif 241 #ifdef IPKDB 242 /* 243 * Now trap to IPKDB 244 */ 245 ipkdb_init(); 246 if (boothowto & RB_KDB) 247 ipkdb_connect(0); 248 #endif 249 } 250 251 /* 252 * Machine dependent startup code. 253 */ 254 void 255 cpu_startup(void) 256 { 257 register_t msr; 258 259 oea_startup(NULL); 260 261 pic_init(); 262 discovery_pic = setup_discovery_pic(); 263 primary_pic = 0; 264 discovery_gpp_pic[0] = setup_discovery_gpp_pic(discovery_pic, 0); 265 discovery_gpp_pic[1] = setup_discovery_gpp_pic(discovery_pic, 8); 266 discovery_gpp_pic[2] = setup_discovery_gpp_pic(discovery_pic, 16); 267 discovery_gpp_pic[3] = setup_discovery_gpp_pic(discovery_pic, 24); 268 /* 269 * GPP interrupts establishes later. 270 */ 271 272 oea_install_extint(pic_ext_intr); 273 274 /* 275 * Now that we have VM, malloc()s are OK in bus_space. 276 */ 277 bus_space_mallocok(); 278 279 /* 280 * Now allow hardware interrupts. 281 */ 282 splraise(-1); 283 __asm volatile ("mfmsr %0; ori %0,%0,%1; mtmsr %0" 284 : "=r"(msr) 285 : "K"(PSL_EE)); 286 } 287 288 /* 289 * consinit 290 * Initialize system console. 291 */ 292 void 293 consinit(void) 294 { 295 296 #ifdef MPSC_CONSOLE 297 /* PMON using MPSC0 @ 9600 */ 298 const int brg = GTMPSC_CRR_BRG0; 299 const int baud = 9600; 300 uint32_t cr; 301 302 #if 1 303 /* 304 * XXX HACK FIXME 305 * PMON output has not been flushed. give him a chance 306 */ 307 DELAY(100000); /* XXX */ 308 #endif 309 /* Setup MPSC Routing Registers */ 310 out32rb(gt_base + GTMPSC_MRR, GTMPSC_MRR_RES); 311 cr = in32rb(gt_base + GTMPSC_RCRR); 312 cr &= ~GTMPSC_CRR(MPSC_CONSOLE, GTMPSC_CRR_MASK); 313 cr |= GTMPSC_CRR(MPSC_CONSOLE, brg); 314 out32rb(gt_base + GTMPSC_RCRR, cr); 315 out32rb(gt_base + GTMPSC_TCRR, cr); 316 317 /* Setup Baud Rate Configuration Register of Baud Rate Generator */ 318 out32rb(gt_base + BRG_BCR(brg), 319 BRG_BCR_EN | GT_MPSC_CLOCK_SOURCE | compute_cdv(baud)); 320 321 gtmpsccnattach(&ev64260_gt_bs_tag, &ev64260_bus_dma_tag, gt_base, 322 MPSC_CONSOLE, brg, baud, 323 (TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8); 324 #else 325 /* PPCBOOT using COM1 @ 57600 */ 326 comcnattach(>_obio2_bs_tag, 0, 57600, 327 COM_FREQ*2, COM_TYPE_NORMAL, 328 (TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8); 329 #endif 330 } 331 332 /* 333 * Halt or reboot the machine after syncing/dumping according to howto. 334 */ 335 void 336 cpu_reboot(int howto, char *what) 337 { 338 static int syncing; 339 static char str[256]; 340 char *ap = str, *ap1 = ap; 341 342 boothowto = howto; 343 if (!cold && !(howto & RB_NOSYNC) && !syncing) { 344 syncing = 1; 345 vfs_shutdown(); /* sync */ 346 resettodr(); /* set wall clock */ 347 } 348 splhigh(); 349 if (howto & RB_HALT) { 350 doshutdownhooks(); 351 pmf_system_shutdown(boothowto); 352 printf("halted\n\n"); 353 cnhalt(); 354 while(1); 355 } 356 if (!cold && (howto & RB_DUMP)) 357 oea_dumpsys(); 358 doshutdownhooks(); 359 360 pmf_system_shutdown(boothowto); 361 printf("rebooting\n\n"); 362 if (what && *what) { 363 if (strlen(what) > sizeof str - 5) 364 printf("boot string too large, ignored\n"); 365 else { 366 strcpy(str, what); 367 ap1 = ap = str + strlen(str); 368 *ap++ = ' '; 369 } 370 } 371 *ap++ = '-'; 372 if (howto & RB_SINGLE) 373 *ap++ = 's'; 374 if (howto & RB_KDB) 375 *ap++ = 'd'; 376 *ap++ = 0; 377 if (ap[-2] == '-') 378 *ap1 = 0; 379 gt_watchdog_reset(); 380 /* NOTREACHED */ 381 while (1); 382 } 383 384 void 385 mem_regions(struct mem_region **mem, struct mem_region **avail) 386 { 387 388 *mem = physmemr; 389 *avail = availmemr; 390 } 391 392 static void 393 gt_bus_space_init(void) 394 { 395 const struct gt_decode_info *di; 396 uint32_t datal, datah; 397 int bs, i; 398 399 bs = 0; 400 bus_space_init(&ev64260_gt_bs_tag, "gt", 401 ex_storage[bs], sizeof(ex_storage[bs])); 402 bs++; 403 404 for (i = 0, di = &decode_regs[4]; i < 5; i++, di++) { 405 struct powerpc_bus_space *memt = ev64260_obio_bs_tags[i]; 406 407 datal = in32rb(gt_base + di->low_decode); 408 datah = in32rb(gt_base + di->high_decode); 409 410 if (GT_LowAddr_GET(datal) >= GT_HighAddr_GET(datal)) { 411 ev64260_obio_bs_tags[i] = NULL; 412 continue; 413 } 414 memt->pbs_offset = GT_LowAddr_GET(datal); 415 memt->pbs_limit = GT_HighAddr_GET(datah) + 1 - 416 memt->pbs_offset; 417 418 bus_space_init(memt, "obio2", 419 ex_storage[bs], sizeof(ex_storage[bs])); 420 bs++; 421 } 422 423 datal = in32rb(gt_base + GT_PCI0_Mem0_Low_Decode); 424 datah = in32rb(gt_base + GT_PCI0_Mem0_High_Decode); 425 #if defined(GT_PCI0_MEMBASE) 426 datal &= ~0xfff; 427 datal |= (GT_PCI0_MEMBASE >> 20); 428 out32rb(gt_base + GT_PCI0_Mem0_Low_Decode, datal); 429 #endif 430 #if defined(GT_PCI0_MEMSIZE) 431 datah &= ~0xfff; 432 datah |= (GT_PCI0_MEMSIZE + GT_LowAddr_GET(datal) - 1) >> 20; 433 out32rb(gt_base + GT_PCI0_Mem0_High_Decode, datal); 434 #endif 435 ev64260_pci0_mem_bs_tag.pbs_base = GT_LowAddr_GET(datal); 436 ev64260_pci0_mem_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1; 437 438 bus_space_init(&ev64260_pci0_mem_bs_tag, "pci0-mem", 439 ex_storage[bs], sizeof(ex_storage[bs])); 440 bs++; 441 442 #if 1 /* XXXXXX */ 443 /* 444 * Make sure PCI0 Memory is BAT mapped. 445 */ 446 if (GT_LowAddr_GET(datal) < GT_HighAddr_GET(datal)) 447 oea_iobat_add(ev64260_pci0_mem_bs_tag.pbs_base & SEGMENT_MASK, 448 BAT_BL_256M); 449 #endif 450 451 /* 452 * Make sure that I/O space start at 0. 453 */ 454 out32rb(gt_base + GT_PCI1_IO_Remap, 0); 455 456 datal = in32rb(gt_base + GT_PCI0_IO_Low_Decode); 457 datah = in32rb(gt_base + GT_PCI0_IO_High_Decode); 458 #if defined(GT_PCI0_IOBASE) 459 datal &= ~0xfff; 460 datal |= (GT_PCI0_IOBASE >> 20); 461 out32rb(gt_base + GT_PCI0_IO_Low_Decode, datal); 462 #endif 463 #if defined(GT_PCI0_IOSIZE) 464 datah &= ~0xfff; 465 datah |= (GT_PCI0_IOSIZE + GT_LowAddr_GET(datal) - 1) >> 20; 466 out32rb(gt_base + GT_PCI0_IO_High_Decode, datal); 467 #endif 468 ev64260_pci0_io_bs_tag.pbs_offset = GT_LowAddr_GET(datal); 469 ev64260_pci0_io_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1 - 470 ev64260_pci0_io_bs_tag.pbs_offset; 471 472 bus_space_init(&ev64260_pci0_io_bs_tag, "pci0-ioport", 473 ex_storage[bs], sizeof(ex_storage[bs])); 474 bs++; 475 476 datal = in32rb(gt_base + GT_PCI1_Mem0_Low_Decode); 477 datah = in32rb(gt_base + GT_PCI1_Mem0_High_Decode); 478 #if defined(GT_PCI1_MEMBASE) 479 datal &= ~0xfff; 480 datal |= (GT_PCI1_MEMBASE >> 20); 481 out32rb(gt_base + GT_PCI1_Mem0_Low_Decode, datal); 482 #endif 483 #if defined(GT_PCI1_MEMSIZE) 484 datah &= ~0xfff; 485 datah |= (GT_PCI1_MEMSIZE + GT_LowAddr_GET(datal) - 1) >> 20; 486 out32rb(gt_base + GT_PCI1_Mem0_High_Decode, datal); 487 #endif 488 ev64260_pci1_mem_bs_tag.pbs_base = GT_LowAddr_GET(datal); 489 ev64260_pci1_mem_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1; 490 491 bus_space_init(&ev64260_pci1_mem_bs_tag, "pci1-mem", 492 ex_storage[bs], sizeof(ex_storage[bs])); 493 bs++; 494 495 #if 1 /* XXXXXX */ 496 /* 497 * Make sure PCI1 Memory is BAT mapped. 498 */ 499 if (GT_LowAddr_GET(datal) < GT_HighAddr_GET(datal)) 500 oea_iobat_add(ev64260_pci1_mem_bs_tag.pbs_base & SEGMENT_MASK, 501 BAT_BL_256M); 502 #endif 503 504 /* 505 * Make sure that I/O space start at 0. 506 */ 507 out32rb(gt_base + GT_PCI1_IO_Remap, 0); 508 509 datal = in32rb(gt_base + GT_PCI1_IO_Low_Decode); 510 datah = in32rb(gt_base + GT_PCI1_IO_High_Decode); 511 #if defined(GT_PCI1_IOBASE) 512 datal &= ~0xfff; 513 datal |= (GT_PCI1_IOBASE >> 20); 514 out32rb(gt_base + GT_PCI1_IO_Low_Decode, datal); 515 #endif 516 #if defined(GT_PCI1_IOSIZE) 517 datah &= ~0xfff; 518 datah |= (GT_PCI1_IOSIZE + GT_LowAddr_GET(datal) - 1) >> 20; 519 out32rb(gt_base + GT_PCI1_IO_High_Decode, datal); 520 #endif 521 ev64260_pci1_io_bs_tag.pbs_offset = GT_LowAddr_GET(datal); 522 ev64260_pci1_io_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1 - 523 ev64260_pci1_io_bs_tag.pbs_offset; 524 525 bus_space_init(&ev64260_pci1_io_bs_tag, "pci1-ioport", 526 ex_storage[bs], sizeof(ex_storage[bs])); 527 bs++; 528 } 529 530 static inline void 531 gt_record_memory(int j, paddr_t start, paddr_t end, paddr_t endkernel) 532 { 533 physmemr[j].start = start; 534 physmemr[j].size = end - start; 535 if (start < endkernel) 536 start = endkernel; 537 availmemr[j].start = start; 538 availmemr[j].size = end - start; 539 } 540 541 static void 542 gt_find_memory(paddr_t endkernel) 543 { 544 paddr_t start = ~0, end = 0; 545 const struct gt_decode_info *di; 546 int i, j = 0, first = 1; 547 548 /* 549 * Round kernel end to a page boundary. 550 */ 551 for (i = 0; i < 4; i++) { 552 paddr_t nstart, nend; 553 554 di = &decode_regs[i]; 555 nstart = GT_LowAddr_GET(in32rb(gt_base + di->low_decode)); 556 nend = GT_HighAddr_GET(in32rb(gt_base + di->high_decode)) + 1; 557 if (nstart >= nend) 558 continue; 559 if (first) { 560 /* 561 * First entry? Just remember it. 562 */ 563 start = nstart; 564 end = nend; 565 first = 0; 566 } else if (nstart == end) { 567 /* 568 * Contiguous? Just update the end. 569 */ 570 end = nend; 571 } else { 572 /* 573 * Disjoint? record it. 574 */ 575 gt_record_memory(j, start, end, endkernel); 576 start = nstart; 577 end = nend; 578 j++; 579 } 580 } 581 gt_record_memory(j, start, end, endkernel); 582 } 583
Indexes created Thu Oct 02 01:09:59 GMT 2025