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machdep.c revision 1.4
      1 /*	$NetBSD: machdep.c,v 1.4 2003/03/16 07:07:19 matt Exp $	*/
      2 
      3 /*
      4  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
      5  * Copyright (C) 1995, 1996 TooLs GmbH.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by TooLs GmbH.
     19  * 4. The name of TooLs GmbH may not be used to endorse or promote products
     20  *    derived from this software without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
     23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     27  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     28  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     29  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     30  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     31  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 #include "opt_marvell.h"
     35 #include "opt_compat_netbsd.h"
     36 #include "opt_ddb.h"
     37 #include "opt_inet.h"
     38 #include "opt_ccitt.h"
     39 #include "opt_iso.h"
     40 #include "opt_ns.h"
     41 #include "opt_ipkdb.h"
     42 
     43 #include <sys/param.h>
     44 #include <sys/conf.h>
     45 #include <sys/device.h>
     46 #include <sys/kernel.h>
     47 #include <sys/malloc.h>
     48 #include <sys/mount.h>
     49 #include <sys/msgbuf.h>
     50 #include <sys/proc.h>
     51 #include <sys/reboot.h>
     52 #include <sys/extent.h>
     53 #include <sys/syslog.h>
     54 #include <sys/systm.h>
     55 
     56 #include <uvm/uvm.h>
     57 #include <uvm/uvm_extern.h>
     58 
     59 #include <net/netisr.h>
     60 
     61 #include <machine/bus.h>
     62 #include <machine/db_machdep.h>
     63 #include <machine/intr.h>
     64 #include <machine/pmap.h>
     65 #include <machine/powerpc.h>
     66 #include <machine/trap.h>
     67 
     68 #include <powerpc/oea/bat.h>
     69 #include <powerpc/marvell/watchdog.h>
     70 
     71 #include <ddb/db_extern.h>
     72 
     73 #include <dev/cons.h>
     74 
     75 #include "vga.h"
     76 #if (NVGA > 0)
     77 #include <dev/ic/mc6845reg.h>
     78 #include <dev/ic/pcdisplayvar.h>
     79 #include <dev/ic/vgareg.h>
     80 #include <dev/ic/vgavar.h>
     81 #endif
     82 
     83 #include "isa.h"
     84 #if (NISA > 0)
     85 void isa_intr_init(void);
     86 #endif
     87 
     88 #include "pckbc.h"
     89 #if (NPCKBC > 0)
     90 #include <dev/isa/isareg.h>
     91 #include <dev/ic/i8042reg.h>
     92 #include <dev/ic/pckbcvar.h>
     93 #endif
     94 
     95 #include "com.h"
     96 #if (NCOM > 0)
     97 #include <sys/termios.h>
     98 #include <dev/ic/comreg.h>
     99 #include <dev/ic/comvar.h>
    100 #endif
    101 
    102 #include <dev/marvell/gtreg.h>
    103 #include <dev/marvell/gtvar.h>
    104 
    105 /*
    106  * Global variables used here and there
    107  */
    108 extern struct user *proc0paddr;
    109 
    110 #define	PMONMEMREGIONS	32
    111 struct mem_region physmemr[PMONMEMREGIONS], availmemr[PMONMEMREGIONS];
    112 
    113 char *bootpath;
    114 
    115 paddr_t avail_end;			/* XXX temporary */
    116 
    117 void initppc(u_int, u_int, u_int, void *); /* Called from locore */
    118 void strayintr(int);
    119 int lcsplx(int);
    120 void gt_bus_space_init(void);
    121 extern void return_to_dink(int);
    122 
    123 struct powerpc_bus_space gt_pci0_mem_bs_tag = {
    124 	_BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE,
    125 	0x00000000, 0x00000000, 0x00000000,
    126 };
    127 struct powerpc_bus_space gt_pci0_io_bs_tag = {
    128 	_BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_IO_TYPE,
    129 	0x00000000, 0x00000000, 0x00000000,
    130 };
    131 struct powerpc_bus_space gt_pci1_mem_bs_tag = {
    132 	_BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE,
    133 	0x00000000, 0x00000000, 0x00000000,
    134 };
    135 struct powerpc_bus_space gt_pci1_io_bs_tag = {
    136 	_BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_IO_TYPE,
    137 	0x00000000, 0x00000000, 0x00000000,
    138 };
    139 struct powerpc_bus_space gt_obio2_bs_tag = {
    140 	_BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE|2,
    141 	0x00000000, 0x00000000, 0x00000000,
    142 };
    143 struct powerpc_bus_space gt_mem_bs_tag = {
    144 	_BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE,
    145 	GT_BASE, 0x00000000, 0x00010000,
    146 };
    147 
    148 bus_space_handle_t gt_memh;
    149 
    150 bus_space_tag_t obio_bs_tags[5] = {
    151 	NULL, NULL, &gt_obio2_bs_tag, NULL, NULL
    152 };
    153 
    154 static char ex_storage[6][EXTENT_FIXED_STORAGE_SIZE(8)]
    155     __attribute__((aligned(8)));
    156 
    157 #if 0
    158 cons_decl(gtmpsc);
    159 
    160 struct consdev constab[] = {
    161 	cons_init_halt(gtmpsc),
    162 	{ 0 }
    163 };
    164 #endif
    165 
    166 void
    167 initppc(startkernel, endkernel, args, btinfo)
    168 	u_int startkernel, endkernel, args;
    169 	void *btinfo;
    170 {
    171 #ifdef DDB
    172 	extern void *startsym, *endsym;
    173 #endif
    174 
    175 	/*
    176 	 * Hardcode 32MB for now--we should probe for this or get it
    177 	 * from a boot loader, but for now, we are booting via an
    178 	 * S-record loader.
    179 	 */
    180 	{	/* XXX AKB */
    181 		u_int32_t	physmemsize;
    182 
    183 		physmemsize = 92 * 1024 * 1024;
    184 		physmemr[0].start = 0;
    185 		physmemr[0].size = physmemsize;
    186 		physmemr[1].size = 0;
    187 		availmemr[0].start = (endkernel + PGOFSET) & ~PGOFSET;
    188 		availmemr[0].size = physmemsize - availmemr[0].start;
    189 		availmemr[1].size = 0;
    190 	}
    191 	avail_end = physmemr[0].start + physmemr[0].size;    /* XXX temporary */
    192 
    193 	/*
    194 	 * Get CPU clock
    195 	 */
    196 	{	/* XXX AKB */
    197 		extern u_long ticks_per_sec, ns_per_tick;
    198 		extern void calc_delayconst(void);
    199 
    200 		ticks_per_sec = 100000000;	/* 100 MHz */
    201 		/* ticks_per_sec = 66000000;	* 66 MHz */
    202 		ticks_per_sec /= 4;	/* 4 cycles per DEC tick */
    203 		cpu_timebase = ticks_per_sec;
    204 		ns_per_tick = 1000000000 / ticks_per_sec;
    205 		calc_delayconst();
    206 	}
    207 
    208 	oea_batinit(0xf0000000, BAT_BL_256M);
    209 	oea_init((void (*)(void))ext_intr);
    210 
    211 	gt_bus_space_init();
    212 
    213 	consinit();
    214 
    215 #if (NISA > 0)
    216 	isa_intr_init();
    217 #endif
    218 
    219         /*
    220 	 * Set the page size.
    221 	 */
    222 	uvm_setpagesize();
    223 
    224 	/*
    225 	 * Initialize pmap module.
    226 	 */
    227 	pmap_bootstrap(startkernel, endkernel);
    228 
    229 #ifdef DDB
    230 	ddb_init((int)((u_int)endsym - (u_int)startsym), startsym, endsym);
    231 #endif
    232 #ifdef IPKDB
    233 	/*
    234 	 * Now trap to IPKDB
    235 	 */
    236 	ipkdb_init();
    237 	if (boothowto & RB_KDB)
    238 		ipkdb_connect(0);
    239 #endif
    240 }
    241 
    242 void
    243 mem_regions(mem, avail)
    244 	struct mem_region **mem, **avail;
    245 {
    246 	*mem = physmemr;
    247 	*avail = availmemr;
    248 }
    249 
    250 /*
    251  * Machine dependent startup code.
    252  */
    253 void
    254 cpu_startup()
    255 {
    256 	register_t msr;
    257 
    258 	oea_startup(NULL);
    259 
    260 	/*
    261 	 * Now that we have VM, malloc()s are OK in bus_space.
    262 	 */
    263 	bus_space_mallocok();
    264 
    265 	/*
    266 	 * Now allow hardware interrupts.
    267 	 */
    268 	splhigh();
    269 	__asm __volatile ("mfmsr %0; ori %0,%0,%1; mtmsr %0"
    270 	    :	"=r"(msr)
    271 	    :	"K"(PSL_EE));
    272 }
    273 
    274 /*
    275  * consinit
    276  * Initialize system console.
    277  */
    278 void
    279 consinit()
    280 {
    281 #if 1
    282 	/* PPCBOOT using COM1 @ 57600 */
    283 	comcnattach(&gt_obio2_bs_tag, 0, 57600, COM_FREQ*2,
    284 	    (TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8);
    285 #else
    286 	cninit();
    287 #endif
    288 }
    289 
    290 #if (NPCKBC > 0) && (NPCKBD == 0)
    291 /*
    292  * glue code to support old console code with the
    293  * mi keyboard controller driver
    294  */
    295 int
    296 pckbc_machdep_cnattach(kbctag, kbcslot)
    297 	pckbc_tag_t kbctag;
    298 	pckbc_slot_t kbcslot;
    299 {
    300 #if (NPC > 0)
    301 	return (pcconskbd_cnattach(kbctag, kbcslot));
    302 #else
    303 	return (ENXIO);
    304 #endif
    305 }
    306 #endif
    307 
    308 /*
    309  * Stray interrupts.
    310  */
    311 void
    312 strayintr(int irq)
    313 {
    314 	log(LOG_ERR, "stray interrupt %d\n", irq);
    315 }
    316 
    317 /*
    318  * Halt or reboot the machine after syncing/dumping according to howto.
    319  */
    320 void
    321 cpu_reboot(howto, what)
    322 	int howto;
    323 	char *what;
    324 {
    325 	static int syncing;
    326 	static char str[256];
    327 	char *ap = str, *ap1 = ap;
    328 
    329 	boothowto = howto;
    330 	if (!cold && !(howto & RB_NOSYNC) && !syncing) {
    331 		syncing = 1;
    332 		vfs_shutdown();		/* sync */
    333 		resettodr();		/* set wall clock */
    334 	}
    335 	splhigh();
    336 	if (howto & RB_HALT) {
    337 		doshutdownhooks();
    338 		printf("halted\n\n");
    339 		cnhalt();
    340 		while(1);
    341 	}
    342 	if (!cold && (howto & RB_DUMP))
    343 		oea_dumpsys();
    344 	doshutdownhooks();
    345 	printf("rebooting\n\n");
    346 	if (what && *what) {
    347 		if (strlen(what) > sizeof str - 5)
    348 			printf("boot string too large, ignored\n");
    349 		else {
    350 			strcpy(str, what);
    351 			ap1 = ap = str + strlen(str);
    352 			*ap++ = ' ';
    353 		}
    354 	}
    355 	*ap++ = '-';
    356 	if (howto & RB_SINGLE)
    357 		*ap++ = 's';
    358 	if (howto & RB_KDB)
    359 		*ap++ = 'd';
    360 	*ap++ = 0;
    361 	if (ap[-2] == '-')
    362 		*ap1 = 0;
    363 #if 0
    364 	{
    365 		void mvpppc_reboot(void);
    366 		mvpppc_reboot();
    367 	}
    368 #endif
    369 	gt_watchdog_reset();
    370 	/* NOTREACHED */
    371 	while (1);
    372 }
    373 
    374 int
    375 lcsplx(ipl)
    376 	int ipl;
    377 {
    378 	return spllower(ipl);
    379 }
    380 
    381 int
    382 gtget_macaddr(struct gt_softc *gt, int macno, char *enaddr)
    383 {
    384 	enaddr[0] = 0x02;
    385 	enaddr[1] = 0x00;
    386 	enaddr[2] = 0x04;
    387 	enaddr[3] = 0x00;
    388 	enaddr[4] = 0x00;
    389 	enaddr[5] = 0x04 + macno;
    390 
    391 	return 0;
    392 }
    393 
    394 void
    395 gt_bus_space_init(void)
    396 {
    397 	bus_space_tag_t gt_memt = &gt_mem_bs_tag;
    398 	uint32_t datal, datah;
    399 	int error;
    400 
    401 	error = bus_space_init(&gt_mem_bs_tag, "gtmem",
    402 	    ex_storage[1], sizeof(ex_storage[0]));
    403 
    404 
    405 	error = bus_space_map(gt_memt, 0, 4096, 0, &gt_memh);
    406 
    407 	datal = bus_space_read_4(gt_memt, gt_memh, GT_CS2_Low_Decode);
    408 	datah = bus_space_read_4(gt_memt, gt_memh, GT_CS2_High_Decode);
    409 	gt_obio2_bs_tag.pbs_offset = GT_LowAddr_GET(datal);
    410 	gt_obio2_bs_tag.pbs_limit  = GT_HighAddr_GET(datah) + 1 -
    411 	    gt_obio2_bs_tag.pbs_offset;
    412 
    413 	error = bus_space_init(&gt_obio2_bs_tag, "obio2",
    414 	    ex_storage[1], sizeof(ex_storage[1]));
    415 
    416 	datal = bus_space_read_4(gt_memt, gt_memh, GT_PCI0_Mem0_Low_Decode);
    417 	datah = bus_space_read_4(gt_memt, gt_memh, GT_PCI0_Mem0_High_Decode);
    418 	gt_pci0_mem_bs_tag.pbs_base  = GT_LowAddr_GET(datal);
    419 	gt_pci0_mem_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1;
    420 
    421 	error = bus_space_init(&gt_pci0_mem_bs_tag, "pci0-mem",
    422 	    ex_storage[2], sizeof(ex_storage[2]));
    423 
    424 	datal = bus_space_read_4(gt_memt, gt_memh, GT_PCI0_IO_Low_Decode);
    425 	datah = bus_space_read_4(gt_memt, gt_memh, GT_PCI0_IO_High_Decode);
    426 	gt_pci0_io_bs_tag.pbs_base  = GT_LowAddr_GET(datal);
    427 	gt_pci0_io_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1 -
    428 	    gt_pci0_io_bs_tag.pbs_offset;
    429 
    430 	error = bus_space_init(&gt_pci0_io_bs_tag, "pci0-ioport",
    431 	    ex_storage[3], sizeof(ex_storage[3]));
    432 
    433 #if 0
    434 	error = extent_alloc_region(gt_pci0_io_bs_tag.pbs_extent,
    435 	    0x10000, 0x7F0000, EX_NOWAIT);
    436 	if (error)
    437 		panic("gt_bus_space_init: can't block out reserved "
    438 		    "I/O space 0x10000-0x7fffff: error=%d\n", error);
    439 #endif
    440 
    441 	datal = bus_space_read_4(gt_memt, gt_memh, GT_PCI1_Mem0_Low_Decode);
    442 	datah = bus_space_read_4(gt_memt, gt_memh, GT_PCI1_Mem0_High_Decode);
    443 	gt_pci1_mem_bs_tag.pbs_base  = GT_LowAddr_GET(datal);
    444 	gt_pci1_mem_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1;
    445 
    446 	error = bus_space_init(&gt_pci1_mem_bs_tag, "pci1-mem",
    447 	    ex_storage[4], sizeof(ex_storage[4]));
    448 
    449 	datal = bus_space_read_4(gt_memt, gt_memh, GT_PCI1_IO_Low_Decode);
    450 	datah = bus_space_read_4(gt_memt, gt_memh, GT_PCI1_IO_High_Decode);
    451 	gt_pci1_io_bs_tag.pbs_base  = GT_LowAddr_GET(datal);
    452 	gt_pci1_io_bs_tag.pbs_limit = GT_HighAddr_GET(datah) + 1;
    453 
    454 	error = bus_space_init(&gt_pci1_io_bs_tag, "pci1-ioport",
    455 	    ex_storage[5], sizeof(ex_storage[5]));
    456 
    457 #if 0
    458 	error = extent_alloc_region(gt_pci1_io_bs_tag.pbs_extent,
    459 	     0x10000, 0x7F0000, EX_NOWAIT);
    460 	if (error)
    461 		panic("gt_bus_space_init: can't block out reserved "
    462 		    "I/O space 0x10000-0x7fffff: error=%d\n", error);
    463 #endif
    464 }
    465 #if 1
    466 #define ISSET(t, f)    ((t) & (f))
    467 
    468 #define KCOM_BASE	0xfd000000	/* XXX COM1 */
    469 #define KCOM_REGSIZE	0x00001000	/* XXX */
    470 
    471 unsigned char *kcombase = (unsigned char *)KCOM_BASE;
    472 
    473 void kcomcninit(struct consdev *);
    474 int kcomcngetc(dev_t);
    475 void kcomcnpollc(dev_t, int);
    476 void kcomcnputc(dev_t, int);
    477 
    478 static unsigned char kcom_reg_read(int);
    479 static void kcom_reg_write(int, unsigned char);
    480 
    481 /*
    482  * The following functions are polled getc and putc routines,
    483  * the core of the "kludge" in the Kludge Com driver :-)
    484  */
    485 
    486 static inline unsigned char
    487 kcom_reg_read(int off)
    488 {
    489 	unsigned char rv;
    490 
    491 	__asm __volatile ("eieio; lbzx %0,%1,%2; eieio;"
    492 		: "=r"(rv) : "b"(off << 2), "r"(kcombase));
    493 	return rv;
    494 }
    495 
    496 static __inline void
    497 kcom_reg_write(int off, unsigned char val)
    498 {
    499 	__asm __volatile ("eieio; stbx %0,%1,%2; eieio;"
    500 		:: "r"(val), "b"(off << 2), "r"(kcombase));
    501 
    502 }
    503 
    504 void
    505 kcomcninit(struct consdev *cd)
    506 {
    507 	kcom_reg_write(com_ier, 0);
    508 	kcom_reg_write(com_mcr, MCR_RTS|MCR_DTR);
    509 }
    510 
    511 int
    512 kcomcngetc(dev_t dev)
    513 {
    514 	u_char stat, c;
    515 
    516 	/* block until a character becomes available */
    517 	while (!ISSET(stat = kcom_reg_read(com_lsr), LSR_RXRDY))
    518 		;
    519 
    520 	c = kcom_reg_read(com_data);
    521 	stat = kcom_reg_read(com_iir);
    522 	return (int)c;
    523 }
    524 
    525 void
    526 kcomcnputc(dev_t dev, int c)
    527 {
    528 	int timo;
    529 
    530 	/* wait for any pending transmission to finish */
    531 	timo = 150000;
    532 	while ((!ISSET(kcom_reg_read(com_lsr), LSR_TXRDY)) && --timo)
    533 		continue;
    534 
    535 	kcom_reg_write(com_data, c);
    536 
    537 	/* wait for this transmission to complete */
    538 	timo = 150000;
    539 	while ((!ISSET(kcom_reg_read(com_lsr), LSR_TXRDY)) && --timo)
    540 		continue;
    541 }
    542 
    543 void
    544 kcomcnpollc(dev_t dev, int on)
    545 {
    546 }
    547 
    548 struct consdev consdev_kcom = {
    549 	NULL,
    550 	kcomcninit,
    551 	kcomcngetc,
    552 	kcomcnputc,
    553 	kcomcnpollc,
    554 	NULL,
    555 };
    556 
    557 #if 1
    558 struct consdev *cn_tab = &consdev_kcom;
    559 #endif
    560 #endif
    561