explora_start.S revision 1.13
1 /* $NetBSD: explora_start.S,v 1.13 2022/06/04 22:32:20 rin Exp $ */ 2 3 /*- 4 * Copyright (c) 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Juergen Hannken-Illjes. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Initial state: 34 * 35 * iccr = 0x00008001 0x80000000-0x87ffffff 0xf80000000-0xffffffff 36 * dccr = 0x00008001 0x80000000-0x87ffffff 0xf80000000-0xffffffff 37 * dcwr = 0x00000000 38 * msr = 0x00001000 ME=machine check enable 39 * 40 */ 41 42 #include "assym.h" 43 44 #include <machine/param.h> 45 #include <machine/psl.h> 46 #include <machine/trap.h> 47 #include <machine/asm.h> 48 49 #include <powerpc/spr.h> 50 #include <powerpc/ibm4xx/spr.h> 51 #include <powerpc/ibm4xx/dcr403cgx.h> 52 53 #include "opt_ddb.h" 54 #include "opt_ppcparam.h" 55 56 /* 57 * Initially the dram starts at 0x01000000. This is way too high. 58 * We relocate dram to 0x00000000. We use the video ram at 0xf0000000 59 * as a temporary staging area. 60 */ 61 62 #define STAGE1_BASE 0xf0000000 63 64 .text 65 .globl __start 66 __start: 67 b 1f 68 nop 69 nop 70 .long 0 71 .ascii "XncdPPC\0" 72 .long 0 73 .long 0 74 75 1: 76 /* Disable exceptions, caches, invalidate all TLB's. */ 77 78 li %r0,0 79 mtmsr %r0 80 mttcr %r0 81 mtdccr %r0 82 mticcr %r0 83 sync 84 isync 85 86 /* Clear caches and invalidate tlbs */ 87 li %r7,256 88 mtctr %r7 89 li %r6,0 90 1: 91 dccci %r0,%r6 92 addi %r6,%r6,16 93 bdnz 1b 94 95 li %r7,512 96 mtctr %r7 97 li %r6,0 98 1: 99 iccci %r0,%r6 100 addi %r6,%r6,16 101 bdnz 1b 102 103 tlbia 104 sync 105 isync 106 107 /* Get current address -- NOT the same as . */ 108 109 bl _next 110 _next: 111 mflr %r3 112 subi %r3,%r3,_next-__start 113 lis %r4,STAGE1_BASE@h 114 ori %r4,%r4,STAGE1_BASE@l 115 li %r5,stage1size 116 117 1: 118 lbz %r1,0(%r3) 119 mr %r0,%r5 120 cmpwi %r0,0 121 stb %r1,0(%r4) 122 addi %r3,%r3,1 123 addi %r4,%r4,1 124 addi %r5,%r5,-1 125 bgt 1b 126 127 /* Jump into the staging area so we can remap the dram. */ 128 129 lis %r0,stage1reloc@h 130 ori %r0,%r0,stage1reloc@l 131 mtlr %r0 132 blr 133 134 stage1reloc = .-__start+STAGE1_BASE 135 136 /* Remap the dram from 0x01000000 to 0x00000000. */ 137 138 #define REMAP(r, tmp1, tmp2) \ 139 mfbr##r tmp1 ; \ 140 lis tmp2,0xff ; \ 141 ori tmp2,tmp2,0xffff ; \ 142 cmplw tmp1,tmp2 ; \ 143 ble 1f ; \ 144 addis tmp1,tmp1,0xf000 ; \ 145 mtbr##r tmp1 ; \ 146 1: 147 148 REMAP(4, %r1, %r2) 149 REMAP(5, %r1, %r2) 150 REMAP(6, %r1, %r2) 151 REMAP(7, %r1, %r2) 152 153 #undef REMAP 154 155 /* Initial setup. */ 156 157 ba stage2 158 159 stage2: 160 161 #ifdef PPC_4XX_NOCACHE 162 li %r0,0 163 #else 164 lis %r0,0xfffc 165 #endif 166 mtdccr %r0 167 mticcr %r0 168 sync 169 isync 170 171 /* get start of bss */ 172 lis %r7,_C_LABEL(edata)-4@h 173 ori %r7,%r7,_C_LABEL(edata)-4@l 174 /* get end of kernel */ 175 lis %r4,_C_LABEL(end)@h 176 ori %r4,%r4,_C_LABEL(end)@l 177 /* clear bss */ 178 li %r3,0 179 1: 180 stwu %r3,4(%r7) 181 cmpw %r7,%r4 182 bne+ 1b 183 184 /* Set kernel MMU context. */ 185 li %r0,KERNEL_PID 186 mtpid %r0 187 sync 188 189 INIT_CPUINFO(%r4,%r1,%r9,%r0) 190 191 lis %r3,__start@h 192 ori %r3,%r3,__start@l 193 194 /* Run the remaining setup in C. */ 195 bl _C_LABEL(initppc) 196 197 bl _C_LABEL(main) 198 199 /* NOTREACHED */ 200 2: nop 201 b 2b 202 203 stage1size = .-__start 204 205 #include <powerpc/ibm4xx/4xx_locore.S> 206
Indexes created Tue Sep 30 20:09:53 GMT 2025