ahcisata_ahb.c revision 1.1 
1/* $NetBSD: ahcisata_ahb.c,v 1.1 2026/01/09 22:54:29 jmcneill Exp $ */
2
3/*-
4 * Copyright (c) 2025 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30
31__KERNEL_RCSID(0, "$NetBSD: ahcisata_ahb.c,v 1.1 2026/01/09 22:54:29 jmcneill Exp $");
32
33#include <sys/param.h>
34#include <sys/bus.h>
35#include <sys/device.h>
36#include <sys/intr.h>
37#include <sys/systm.h>
38
39#include <dev/ata/atavar.h>
40#include <dev/ic/ahcisatavar.h>
41
42#include <machine/wii.h>
43#include <machine/wiiu.h>
44
45#include "ahb.h"
46
47#define SATA_HCCFG_INT_REG	0x400
48#define  SATA_HCCFG_INT_PORT1	__BIT(5)
49#define  SATA_HCCFG_INT_PORT0	__BIT(3)
50#define SATA_HCCFG_INTMSK_REG	0x404
51
52#define	RD4(sc, reg)		\
53	bus_space_read_4((sc)->sc_ahcit, (sc)->sc_ahcih, (reg))
54#define	WR4(sc, reg, val)	\
55	bus_space_write_4((sc)->sc_ahcit, (sc)->sc_ahcih, (reg), (val))
56
57static int
58ahcisata_ahb_intr(void *arg)
59{
60	struct ahci_softc * const sc = arg;
61	uint32_t val, mask;
62	int ret = 0;
63
64	val = RD4(sc, SATA_HCCFG_INT_REG);
65	mask = RD4(sc, SATA_HCCFG_INTMSK_REG);
66
67	if ((val & mask) != 0) {
68		ret = ahci_intr(sc);
69	}
70
71	WR4(sc, SATA_HCCFG_INT_REG, val);
72
73	return ret;
74}
75
76static int
77ahcisata_ahb_match(device_t parent, cfdata_t cf, void *aux)
78{
79	return wiiu_native;
80}
81
82static void
83ahcisata_ahb_attach(device_t parent, device_t self, void *aux)
84{
85	struct ahb_attach_args * const aaa = aux;
86	struct ahci_softc * const sc = device_private(self);
87
88	sc->sc_atac.atac_dev = self;
89	sc->sc_dmat = aaa->aaa_dmat;
90	sc->sc_ahcit = aaa->aaa_bst;
91	sc->sc_ahcis = 0x408;
92	if (bus_space_map(sc->sc_ahcit, aaa->aaa_addr, sc->sc_ahcis, 0,
93	    &sc->sc_ahcih) != 0) {
94		aprint_error(": couldn't map registers\n");
95		return;
96	}
97	sc->sc_ahci_ports = 1;
98	sc->sc_save_init_data = true;
99	sc->sc_ahci_quirks |= AHCI_QUIRK_BADPMP;
100
101	aprint_naive("\n");
102	aprint_normal(": AHCI SATA controller\n");
103
104	WR4(sc, SATA_HCCFG_INTMSK_REG, SATA_HCCFG_INT_PORT0);
105	WR4(sc, SATA_HCCFG_INT_REG, ~0U);
106
107	ahb_intr_establish(aaa->aaa_irq, IPL_BIO, ahcisata_ahb_intr, sc,
108	    device_xname(self));
109
110	ahci_attach(sc);
111}
112
113CFATTACH_DECL_NEW(ahcisata_ahb, sizeof(struct ahci_softc),
114	ahcisata_ahb_match, ahcisata_ahb_attach, NULL, NULL);
115