obs266_machdep.c revision 1.6 1 1.6 freza /* $NetBSD: obs266_machdep.c,v 1.6 2006/11/29 19:56:47 freza Exp $ */
2 1.1 shige /* Original: md_machdep.c,v 1.3 2005/01/24 18:47:37 shige Exp $ */
3 1.1 shige
4 1.1 shige /*
5 1.1 shige * Copyright 2001, 2002 Wasabi Systems, Inc.
6 1.1 shige * All rights reserved.
7 1.1 shige *
8 1.1 shige * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
9 1.1 shige *
10 1.1 shige * Redistribution and use in source and binary forms, with or without
11 1.1 shige * modification, are permitted provided that the following conditions
12 1.1 shige * are met:
13 1.1 shige * 1. Redistributions of source code must retain the above copyright
14 1.1 shige * notice, this list of conditions and the following disclaimer.
15 1.1 shige * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 shige * notice, this list of conditions and the following disclaimer in the
17 1.1 shige * documentation and/or other materials provided with the distribution.
18 1.1 shige * 3. All advertising materials mentioning features or use of this software
19 1.1 shige * must display the following acknowledgement:
20 1.1 shige * This product includes software developed for the NetBSD Project by
21 1.1 shige * Wasabi Systems, Inc.
22 1.1 shige * 4. The name of Wasabi Systems, Inc. may not be used to endorse
23 1.1 shige * or promote products derived from this software without specific prior
24 1.1 shige * written permission.
25 1.1 shige *
26 1.1 shige * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
27 1.1 shige * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 shige * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 shige * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
30 1.1 shige * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 shige * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 shige * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 shige * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 shige * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 shige * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 shige * POSSIBILITY OF SUCH DAMAGE.
37 1.1 shige */
38 1.1 shige
39 1.1 shige /*
40 1.1 shige * Copyright (C) 1995, 1996 Wolfgang Solfrank.
41 1.1 shige * Copyright (C) 1995, 1996 TooLs GmbH.
42 1.1 shige * All rights reserved.
43 1.1 shige *
44 1.1 shige * Redistribution and use in source and binary forms, with or without
45 1.1 shige * modification, are permitted provided that the following conditions
46 1.1 shige * are met:
47 1.1 shige * 1. Redistributions of source code must retain the above copyright
48 1.1 shige * notice, this list of conditions and the following disclaimer.
49 1.1 shige * 2. Redistributions in binary form must reproduce the above copyright
50 1.1 shige * notice, this list of conditions and the following disclaimer in the
51 1.1 shige * documentation and/or other materials provided with the distribution.
52 1.1 shige * 3. All advertising materials mentioning features or use of this software
53 1.1 shige * must display the following acknowledgement:
54 1.1 shige * This product includes software developed by TooLs GmbH.
55 1.1 shige * 4. The name of TooLs GmbH may not be used to endorse or promote products
56 1.1 shige * derived from this software without specific prior written permission.
57 1.1 shige *
58 1.1 shige * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
59 1.1 shige * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
60 1.1 shige * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
61 1.1 shige * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
62 1.1 shige * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
63 1.1 shige * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
64 1.1 shige * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
65 1.1 shige * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
66 1.1 shige * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
67 1.1 shige * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
68 1.1 shige */
69 1.1 shige
70 1.1 shige #include <sys/cdefs.h>
71 1.6 freza __KERNEL_RCSID(0, "$NetBSD: obs266_machdep.c,v 1.6 2006/11/29 19:56:47 freza Exp $");
72 1.1 shige
73 1.1 shige #include "opt_compat_netbsd.h"
74 1.1 shige #include "opt_ddb.h"
75 1.1 shige #include "opt_ipkdb.h"
76 1.1 shige
77 1.1 shige #include <sys/param.h>
78 1.1 shige #include <sys/kernel.h>
79 1.1 shige #include <sys/ksyms.h>
80 1.1 shige #include <sys/mount.h>
81 1.1 shige #include <sys/reboot.h>
82 1.1 shige #include <sys/systm.h>
83 1.1 shige
84 1.1 shige #include <uvm/uvm.h>
85 1.1 shige #include <uvm/uvm_extern.h>
86 1.1 shige
87 1.1 shige #include <machine/bus.h>
88 1.1 shige #include <machine/cpu.h>
89 1.1 shige #include <machine/obs266.h>
90 1.1 shige #include <powerpc/spr.h>
91 1.1 shige
92 1.4 shige #include <dev/pci/pcivar.h>
93 1.4 shige #include <dev/pci/pciconf.h>
94 1.4 shige
95 1.1 shige #include <powerpc/ibm4xx/dcr405gp.h>
96 1.1 shige #include <powerpc/ibm4xx/openbios.h>
97 1.1 shige
98 1.1 shige #include "ksyms.h"
99 1.1 shige
100 1.5 kiyohara
101 1.5 kiyohara #define TLB_PG_SIZE (16*1024*1024)
102 1.5 kiyohara
103 1.1 shige /*
104 1.1 shige * Global variables used here and there
105 1.1 shige */
106 1.1 shige char bootpath[256];
107 1.1 shige
108 1.1 shige extern paddr_t msgbuf_paddr;
109 1.1 shige
110 1.1 shige #if NKSYMS || defined(DDB) || defined(LKM)
111 1.1 shige void *startsym, *endsym;
112 1.1 shige #endif
113 1.1 shige
114 1.1 shige void initppc(u_int, u_int, char *, void *);
115 1.1 shige int lcsplx(int);
116 1.1 shige
117 1.1 shige
118 1.1 shige void
119 1.1 shige initppc(u_int startkernel, u_int endkernel, char *args, void *info_block)
120 1.1 shige {
121 1.5 kiyohara vaddr_t va;
122 1.1 shige u_int memsize;
123 1.1 shige
124 1.1 shige /* Disable all external interrupts */
125 1.1 shige mtdcr(DCR_UIC0_ER, 0);
126 1.1 shige
127 1.1 shige /* Setup board from OpenBIOS */
128 1.1 shige openbios_board_init(info_block, startkernel);
129 1.1 shige memsize = openbios_board_memsize_get();
130 1.1 shige
131 1.6 freza /* Linear map kernel memory */
132 1.6 freza for (va = 0; va < endkernel; va += TLB_PG_SIZE)
133 1.5 kiyohara ppc4xx_tlb_reserve(va, va, TLB_PG_SIZE, TLB_EX);
134 1.5 kiyohara
135 1.6 freza /* Map console after RAM (see pmap_tlbmiss()) */
136 1.6 freza ppc4xx_tlb_reserve(OBS405_CONADDR, roundup(memsize, TLB_PG_SIZE),
137 1.6 freza TLB_PG_SIZE, TLB_I | TLB_G);
138 1.5 kiyohara
139 1.1 shige /* Initialize IBM405GPr CPU */
140 1.1 shige ibm40x_memsize_init(memsize, startkernel);
141 1.1 shige ibm4xx_init((void (*)(void))ext_intr);
142 1.1 shige
143 1.1 shige /*
144 1.1 shige * Set the page size.
145 1.1 shige */
146 1.1 shige uvm_setpagesize();
147 1.1 shige
148 1.1 shige /*
149 1.1 shige * Initialize pmap module.
150 1.1 shige */
151 1.1 shige pmap_bootstrap(startkernel, endkernel);
152 1.1 shige
153 1.1 shige #ifdef DEBUG
154 1.1 shige openbios_board_print();
155 1.1 shige #endif
156 1.1 shige
157 1.1 shige #if NKSYMS || defined(DDB) || defined(LKM)
158 1.1 shige ksyms_init((int)((u_int)endsym - (u_int)startsym), startsym, endsym);
159 1.1 shige #endif
160 1.1 shige #ifdef DDB
161 1.1 shige if (boothowto & RB_KDB)
162 1.1 shige Debugger();
163 1.1 shige #endif
164 1.1 shige #ifdef IPKDB
165 1.1 shige /*
166 1.1 shige * Now trap to IPKDB
167 1.1 shige */
168 1.1 shige ipkdb_init();
169 1.1 shige if (boothowto & RB_KDB)
170 1.1 shige ipkdb_connect(0);
171 1.1 shige #endif
172 1.1 shige }
173 1.1 shige
174 1.1 shige void
175 1.1 shige consinit(void)
176 1.1 shige {
177 1.1 shige
178 1.1 shige obs405_consinit(OBS266_COM_FREQ);
179 1.1 shige }
180 1.1 shige
181 1.1 shige int
182 1.1 shige lcsplx(int ipl)
183 1.1 shige {
184 1.1 shige
185 1.1 shige return spllower(ipl); /* XXX */
186 1.1 shige }
187 1.1 shige
188 1.1 shige
189 1.1 shige /*
190 1.1 shige * Machine dependent startup code.
191 1.1 shige */
192 1.1 shige void
193 1.1 shige cpu_startup(void)
194 1.1 shige {
195 1.1 shige
196 1.1 shige /*
197 1.1 shige * cpu common startup
198 1.1 shige */
199 1.1 shige ibm4xx_cpu_startup("OpenBlockS266 IBM PowerPC 405GPr Board");
200 1.1 shige
201 1.1 shige /*
202 1.1 shige * Set up the board properties database.
203 1.1 shige */
204 1.1 shige openbios_board_info_set();
205 1.1 shige
206 1.1 shige /*
207 1.1 shige * Now that we have VM, malloc()s are OK in bus_space.
208 1.1 shige */
209 1.1 shige bus_space_mallocok();
210 1.1 shige
211 1.1 shige /*
212 1.1 shige * no fake mapiodev
213 1.1 shige */
214 1.1 shige fake_mapiodev = 0;
215 1.1 shige }
216 1.1 shige
217 1.1 shige /*
218 1.1 shige * Halt or reboot the machine after syncing/dumping according to howto.
219 1.1 shige */
220 1.1 shige void
221 1.1 shige cpu_reboot(int howto, char *what)
222 1.1 shige {
223 1.1 shige static int syncing;
224 1.1 shige static char str[256];
225 1.1 shige char *ap = str, *ap1 = ap;
226 1.1 shige
227 1.1 shige boothowto = howto;
228 1.1 shige if (!cold && !(howto & RB_NOSYNC) && !syncing) {
229 1.1 shige syncing = 1;
230 1.1 shige vfs_shutdown(); /* sync */
231 1.1 shige resettodr(); /* set wall clock */
232 1.1 shige }
233 1.1 shige
234 1.1 shige splhigh();
235 1.1 shige
236 1.1 shige if (!cold && (howto & RB_DUMP))
237 1.1 shige ibm4xx_dumpsys();
238 1.1 shige
239 1.1 shige doshutdownhooks();
240 1.1 shige
241 1.1 shige if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
242 1.1 shige /* Power off here if we know how...*/
243 1.1 shige }
244 1.1 shige
245 1.1 shige if (howto & RB_HALT) {
246 1.1 shige printf("halted\n\n");
247 1.1 shige
248 1.1 shige #if 0
249 1.1 shige goto reboot; /* XXX for now... */
250 1.1 shige #endif
251 1.1 shige
252 1.1 shige #ifdef DDB
253 1.1 shige printf("dropping to debugger\n");
254 1.1 shige while(1)
255 1.1 shige Debugger();
256 1.1 shige #endif
257 1.1 shige }
258 1.1 shige
259 1.1 shige printf("rebooting\n\n");
260 1.1 shige if (what && *what) {
261 1.1 shige if (strlen(what) > sizeof str - 5)
262 1.1 shige printf("boot string too large, ignored\n");
263 1.1 shige else {
264 1.1 shige strcpy(str, what);
265 1.1 shige ap1 = ap = str + strlen(str);
266 1.1 shige *ap++ = ' ';
267 1.1 shige }
268 1.1 shige }
269 1.1 shige *ap++ = '-';
270 1.1 shige if (howto & RB_SINGLE)
271 1.1 shige *ap++ = 's';
272 1.1 shige if (howto & RB_KDB)
273 1.1 shige *ap++ = 'd';
274 1.1 shige *ap++ = 0;
275 1.1 shige if (ap[-2] == '-')
276 1.1 shige *ap1 = 0;
277 1.1 shige
278 1.1 shige /* flush cache for msgbuf */
279 1.1 shige __syncicache((void *)msgbuf_paddr, round_page(MSGBUFSIZE));
280 1.1 shige
281 1.1 shige #if 0
282 1.1 shige reboot:
283 1.1 shige #endif
284 1.1 shige ppc4xx_reset();
285 1.1 shige
286 1.1 shige printf("ppc4xx_reset() failed!\n");
287 1.1 shige #ifdef DDB
288 1.1 shige while(1)
289 1.1 shige Debugger();
290 1.1 shige #else
291 1.1 shige while (1)
292 1.1 shige /* nothing */;
293 1.1 shige #endif
294 1.1 shige }
295 1.4 shige
296 1.4 shige int
297 1.4 shige pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
298 1.4 shige {
299 1.4 shige /*
300 1.4 shige * We need to map the interrupt pin to the interrupt bit
301 1.4 shige * in the UIC associated with it.
302 1.4 shige *
303 1.4 shige * This platform has 4 PCI devices.
304 1.4 shige *
305 1.4 shige # External IRQ Mappings:
306 1.4 shige * dev 1 (Ext IRQ3): PCI Connector
307 1.4 shige * dev 2 (Ext IRQ4): PCI Connector
308 1.4 shige * dev 3 (Ext IRQ5): HPT IDE Controller
309 1.4 shige * dev 4 (Ext IRQ6): Davicom Ethernet
310 1.4 shige */
311 1.4 shige static const int irqmap[4/*device*/][4/*pin*/] = {
312 1.4 shige { 3, 3, 3, 3 }, /* 1: PCI Connector 1 */
313 1.4 shige { 4, 4, 4, 4 }, /* 2: PCI Connector 2 */
314 1.4 shige { 5, 5, -1, -1 }, /* 3: HPT IDE Controller */
315 1.4 shige { 6, 6, -1, -1 }, /* 4: Damicom Ethernet */
316 1.4 shige };
317 1.4 shige
318 1.4 shige int pin, dev, irq;
319 1.4 shige
320 1.4 shige pin = pa->pa_intrpin;
321 1.4 shige dev = pa->pa_device;
322 1.4 shige *ihp = -1;
323 1.4 shige
324 1.4 shige /* if interrupt pin not used... */
325 1.4 shige if (pin == 0)
326 1.4 shige return 1;
327 1.4 shige
328 1.4 shige if (pin > 4) {
329 1.4 shige printf("pci_intr_map: bad interrupt pin %d\n", pin);
330 1.4 shige return 1;
331 1.4 shige }
332 1.4 shige
333 1.4 shige if ((dev < 1) || (dev > 4)) {
334 1.4 shige printf("pci_intr_map: bad device %d\n", dev);
335 1.4 shige return 1;
336 1.4 shige }
337 1.4 shige
338 1.4 shige
339 1.4 shige if ((irq = irqmap[dev - 1][pin - 1]) == -1) {
340 1.4 shige printf("pci_intr_map: no IRQ routing for device %d pin %d\n",
341 1.4 shige dev, pin);
342 1.4 shige return 1;
343 1.4 shige }
344 1.4 shige
345 1.4 shige *ihp = irq + 25;
346 1.4 shige return 0;
347 1.4 shige }
348 1.4 shige
349 1.4 shige void
350 1.4 shige pci_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int pin,
351 1.4 shige int swiz, int *iline)
352 1.4 shige {
353 1.4 shige
354 1.4 shige static const int ilinemap[4/*device*/] = {
355 1.4 shige 3, 4, 5 ,6
356 1.4 shige };
357 1.4 shige
358 1.4 shige if ((dev < 1) || (dev > 4)) {
359 1.4 shige printf("pci_intr_map: bad device %d\n", dev);
360 1.4 shige *iline = 0;
361 1.4 shige return;
362 1.4 shige }
363 1.4 shige *iline = ilinemap[dev - 1] + 25;
364 1.4 shige }
365