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cdmacreg.h revision 1.1.2.2
      1  1.1.2.2  yamt /* 	$NetBSD */
      2  1.1.2.2  yamt 
      3  1.1.2.2  yamt /*
      4  1.1.2.2  yamt  * Copyright (c) 2006 Jachym Holecek
      5  1.1.2.2  yamt  * All rights reserved.
      6  1.1.2.2  yamt  *
      7  1.1.2.2  yamt  * Written for DFC Design, s.r.o.
      8  1.1.2.2  yamt  *
      9  1.1.2.2  yamt  * Redistribution and use in source and binary forms, with or without
     10  1.1.2.2  yamt  * modification, are permitted provided that the following conditions
     11  1.1.2.2  yamt  * are met:
     12  1.1.2.2  yamt  *
     13  1.1.2.2  yamt  * 1. Redistributions of source code must retain the above copyright
     14  1.1.2.2  yamt  *    notice, this list of conditions and the following disclaimer.
     15  1.1.2.2  yamt  *
     16  1.1.2.2  yamt  * 2. Redistributions in binary form must reproduce the above copyright
     17  1.1.2.2  yamt  *    notice, this list of conditions and the following disclaimer in the
     18  1.1.2.2  yamt  *    documentation and/or other materials provided with the distribution.
     19  1.1.2.2  yamt  *
     20  1.1.2.2  yamt  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21  1.1.2.2  yamt  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22  1.1.2.2  yamt  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23  1.1.2.2  yamt  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24  1.1.2.2  yamt  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25  1.1.2.2  yamt  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26  1.1.2.2  yamt  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27  1.1.2.2  yamt  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28  1.1.2.2  yamt  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29  1.1.2.2  yamt  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30  1.1.2.2  yamt  */
     31  1.1.2.2  yamt 
     32  1.1.2.2  yamt #include <sys/cdefs.h>
     33  1.1.2.2  yamt 
     34  1.1.2.2  yamt #ifndef _VIRTEX_DEV_CDMACREG_H_
     35  1.1.2.2  yamt #define _VIRTEX_DEV_CDMACREG_H_
     36  1.1.2.2  yamt 
     37  1.1.2.2  yamt /*
     38  1.1.2.2  yamt  * CDMAC registers and data structures. Keep the names fully qualified, users
     39  1.1.2.2  yamt  * need at least CDMAC_STAT bits to manipulate descriptor queues. The offsets
     40  1.1.2.2  yamt  * are multiplied by four compared to Xilinx documentation -- so don't get
     41  1.1.2.2  yamt  * confused, bus space will deal.
     42  1.1.2.2  yamt  *
     43  1.1.2.2  yamt  * The number of channels and interrupt wiring differs per design.
     44  1.1.2.2  yamt  */
     45  1.1.2.2  yamt 
     46  1.1.2.2  yamt /* Status and control register block sizes. */
     47  1.1.2.2  yamt #define CDMAC_CTRL_SIZE 	0x0c
     48  1.1.2.2  yamt #define CDMAC_STAT_SIZE 	0x04
     49  1.1.2.2  yamt 
     50  1.1.2.2  yamt /* Status and control register offsets per channel. */
     51  1.1.2.2  yamt #define	CDMAC_STAT_BASE(n) 	(0x80 + (n) * 0x04)
     52  1.1.2.2  yamt #define	CDMAC_CTRL_BASE(n) 	(0x00 + (n) * 0x10)
     53  1.1.2.2  yamt 
     54  1.1.2.2  yamt /* Individual engine control registers. */
     55  1.1.2.2  yamt #define CDMAC_NEXT 		0x0000 	/* Next descriptor pointer,
     56  1.1.2.2  yamt 					 * 32B aligned, 0x0 = stop */
     57  1.1.2.2  yamt #define CDMAC_CURADDR 		0x0004 	/* Address being transferred */
     58  1.1.2.2  yamt #define CDMAC_CURSIZE 		0x0008 	/* Remaining length */
     59  1.1.2.2  yamt #define CDMAC_CURDESC 		0x000c 	/* Current descriptor pointer */
     60  1.1.2.2  yamt 
     61  1.1.2.2  yamt #define CDMAC_CURSIZE_MASK 	0x00ffffff
     62  1.1.2.2  yamt 
     63  1.1.2.2  yamt /* Engine status reg bits. */
     64  1.1.2.2  yamt #define CDMAC_STAT_ERROR 	0x80000000 	/* EINVAL -> halt, interrupt */
     65  1.1.2.2  yamt #define CDMAC_STAT_INTR 	0x40000000 	/* Interrupt on end of descr */
     66  1.1.2.2  yamt #define CDMAC_STAT_STOP 	0x20000000 	/* Stop on end of descr */
     67  1.1.2.2  yamt #define CDMAC_STAT_DONE 	0x10000000 	/* Descriptor done */
     68  1.1.2.2  yamt #define CDMAC_STAT_SOP 		0x08000000 	/* Start of packet */
     69  1.1.2.2  yamt #define CDMAC_STAT_EOP 		0x04000000 	/* End of packet */
     70  1.1.2.2  yamt #define CDMAC_STAT_BUSY 	0x02000000 	/* Engine busy */
     71  1.1.2.2  yamt #define CDMAC_STAT_RESET 	0x01000000 	/* Channel reset */
     72  1.1.2.2  yamt 
     73  1.1.2.2  yamt #ifdef notdef
     74  1.1.2.2  yamt /*
     75  1.1.2.2  yamt  * DMA engine timers, 8bit. Rather useless -- we need "interrupt
     76  1.1.2.2  yamt  * if transfer stalls for N cycles", not "fire after N cycles".
     77  1.1.2.2  yamt  * If we ever use this, move definitions to design-specific code
     78  1.1.2.2  yamt  * like we do with STAT.
     79  1.1.2.2  yamt  */
     80  1.1.2.2  yamt #define CDMAC_TIMER_TX0 	0x00a0
     81  1.1.2.2  yamt #define CDMAC_TIMER_RX0 	0x00a4
     82  1.1.2.2  yamt #define CDMAC_TIMER_TX1 	0x00a8
     83  1.1.2.2  yamt #define CDMAC_TIMER_RX1 	0x00ac
     84  1.1.2.2  yamt #endif /* notdef */
     85  1.1.2.2  yamt 
     86  1.1.2.2  yamt /* Interrupt register (active-high level-sensitive intr). */
     87  1.1.2.2  yamt #define CDMAC_INTR 		0x00bc
     88  1.1.2.2  yamt 
     89  1.1.2.2  yamt #define CDMAC_INTR_MIE 		0x80000000 	/* Master interrupt enable */
     90  1.1.2.2  yamt #define CDMAC_INTR_TX0 		0x00000001 	/* Descriptor interrupts */
     91  1.1.2.2  yamt #define CDMAC_INTR_RX0 		0x00000002
     92  1.1.2.2  yamt #define CDMAC_INTR_TX1 		0x00000004
     93  1.1.2.2  yamt #define CDMAC_INTR_RX1 		0x00000008
     94  1.1.2.2  yamt #define CDMAC_TIMO_TX0 		0x01000000 	/* Timer interrupts */
     95  1.1.2.2  yamt #define CDMAC_TIMO_RX0 		0x02000000
     96  1.1.2.2  yamt #define CDMAC_TIMO_TX1 		0x04000000
     97  1.1.2.2  yamt #define CDMAC_TIMO_RX1 		0x08000000
     98  1.1.2.2  yamt 
     99  1.1.2.2  yamt #define CDMAC_CHAN_INTR(n) 	(1 << (n))
    100  1.1.2.2  yamt 
    101  1.1.2.2  yamt /*
    102  1.1.2.2  yamt  * Wire data structure of transfer descriptor (shared for Rx/Tx).
    103  1.1.2.2  yamt  */
    104  1.1.2.2  yamt struct cdmac_descr {
    105  1.1.2.2  yamt 	uint32_t 	desc_next; 	/* Next descriptor */
    106  1.1.2.2  yamt 	uint32_t 	desc_addr; 	/* Payload address */
    107  1.1.2.2  yamt 	uint32_t 	desc_size; 	/* Payload size */
    108  1.1.2.2  yamt 
    109  1.1.2.2  yamt 	/* Application defined fields, valid in 1st desc on Tx, last on Rx. */
    110  1.1.2.2  yamt 	uint32_t 	desc_user0; 	/* See below */
    111  1.1.2.2  yamt #define desc_stat 	desc_user0
    112  1.1.2.2  yamt 
    113  1.1.2.2  yamt 	uint32_t 	desc_user1;
    114  1.1.2.2  yamt 	uint32_t 	desc_user2;
    115  1.1.2.2  yamt 	uint32_t 	desc_user3;
    116  1.1.2.2  yamt 	uint32_t 	desc_user4;
    117  1.1.2.2  yamt } __aligned(8) __packed;
    118  1.1.2.2  yamt 
    119  1.1.2.2  yamt #define DMAC_STAT_MASK 	0xff000000 	/* CDMAC portion of desc_user0 */
    120  1.1.2.2  yamt #define DMAC_USER_MASK 	0x00ffffff 	/* User defined part of desc_user0 */
    121  1.1.2.2  yamt 
    122  1.1.2.2  yamt #endif /*_VIRTEX_DEV_CDMACREG_H_*/
    123