1 1.5 rin /* $NetBSD: tft_ll.c,v 1.5 2021/03/29 13:14:13 rin Exp $ */ 2 1.1 freza 3 1.1 freza /* 4 1.1 freza * Copyright (c) 2006 Jachym Holecek 5 1.1 freza * All rights reserved. 6 1.1 freza * 7 1.1 freza * Written for DFC Design, s.r.o. 8 1.1 freza * 9 1.1 freza * Redistribution and use in source and binary forms, with or without 10 1.1 freza * modification, are permitted provided that the following conditions 11 1.1 freza * are met: 12 1.1 freza * 13 1.1 freza * 1. Redistributions of source code must retain the above copyright 14 1.1 freza * notice, this list of conditions and the following disclaimer. 15 1.1 freza * 16 1.1 freza * 2. Redistributions in binary form must reproduce the above copyright 17 1.1 freza * notice, this list of conditions and the following disclaimer in the 18 1.1 freza * documentation and/or other materials provided with the distribution. 19 1.1 freza * 20 1.1 freza * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 1.1 freza * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 1.1 freza * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 1.1 freza * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 1.1 freza * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 1.1 freza * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 1.1 freza * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 1.1 freza * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 1.1 freza * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 1.1 freza * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 1.1 freza */ 31 1.1 freza 32 1.1 freza #include <sys/cdefs.h> 33 1.5 rin __KERNEL_RCSID(0, "$NetBSD: tft_ll.c,v 1.5 2021/03/29 13:14:13 rin Exp $"); 34 1.1 freza 35 1.1 freza #include <sys/param.h> 36 1.1 freza #include <sys/systm.h> 37 1.1 freza #include <sys/mbuf.h> 38 1.1 freza #include <sys/kernel.h> 39 1.1 freza #include <sys/socket.h> 40 1.1 freza #include <sys/ioctl.h> 41 1.1 freza #include <sys/device.h> 42 1.1 freza #include <sys/queue.h> 43 1.1 freza 44 1.1 freza #include <uvm/uvm_extern.h> 45 1.1 freza 46 1.4 dyoung #include <sys/bus.h> 47 1.1 freza 48 1.1 freza /* XXX needed? */ 49 1.1 freza #include <dev/wscons/wsdisplayvar.h> 50 1.1 freza #include <dev/wscons/wsconsio.h> 51 1.1 freza #include <dev/rasops/rasops.h> 52 1.1 freza #include <dev/wscons/wsdisplay_vconsvar.h> 53 1.1 freza 54 1.1 freza #include <evbppc/virtex/dev/xcvbusvar.h> 55 1.1 freza #include <evbppc/virtex/dev/cdmacreg.h> 56 1.1 freza #include <evbppc/virtex/dev/tftreg.h> 57 1.1 freza #include <evbppc/virtex/dev/tftvar.h> 58 1.1 freza 59 1.1 freza 60 1.1 freza struct ll_tft_control { 61 1.1 freza struct cdmac_descr cd_dsc; 62 1.1 freza u_char cd_img[]; 63 1.5 rin }; 64 1.5 rin 65 1.5 rin CTASSERT(offsetof(struct ll_tft_control, cd_img) == sizeof(struct cdmac_descr)); 66 1.1 freza 67 1.1 freza struct ll_tft_softc { 68 1.1 freza struct tft_softc lsc_sc; 69 1.1 freza 70 1.1 freza bus_space_tag_t lsc_dma_iot; 71 1.1 freza bus_space_handle_t lsc_dma_ioh; 72 1.1 freza 73 1.1 freza bus_dma_tag_t lsc_dmat; 74 1.1 freza bus_dmamap_t lsc_dmap; 75 1.1 freza 76 1.1 freza struct ll_tft_control *lsc_cd; 77 1.1 freza bus_dma_segment_t lsc_seg; 78 1.1 freza }; 79 1.1 freza 80 1.3 matt static void ll_tft_attach(device_t, device_t, void *); 81 1.1 freza static paddr_t ll_tft_mmap(void *, void *, off_t, int); 82 1.1 freza static void ll_tft_shutdown(void *); 83 1.1 freza 84 1.3 matt CFATTACH_DECL_NEW(ll_tft, sizeof(struct ll_tft_softc), 85 1.1 freza xcvbus_child_match, ll_tft_attach, NULL, NULL); 86 1.1 freza 87 1.1 freza 88 1.1 freza static struct wsdisplay_accessops ll_tft_accessops = { 89 1.1 freza .mmap = ll_tft_mmap, 90 1.1 freza }; 91 1.1 freza 92 1.1 freza 93 1.1 freza static void 94 1.3 matt ll_tft_attach(device_t parent, device_t self, void *aux) 95 1.1 freza { 96 1.1 freza struct xcvbus_attach_args *vaa = aux; 97 1.1 freza struct ll_dmac *tx = vaa->vaa_tx_dmac; 98 1.3 matt struct ll_tft_softc *lsc = device_private(self); 99 1.1 freza struct tft_softc *sc = &lsc->lsc_sc; 100 1.1 freza int nseg, error; 101 1.1 freza 102 1.1 freza KASSERT(tx); 103 1.1 freza 104 1.1 freza lsc->lsc_dma_iot = tx->dmac_iot; 105 1.1 freza lsc->lsc_dmat = vaa->vaa_dmat; 106 1.1 freza sc->sc_iot = vaa->vaa_iot; 107 1.3 matt sc->sc_dev = self; 108 1.1 freza 109 1.3 matt aprint_normal(": LL_TFT\n"); 110 1.1 freza 111 1.1 freza if ((error = bus_space_map(sc->sc_iot, vaa->vaa_addr, TFT_SIZE, 112 1.1 freza 0, &sc->sc_ioh)) != 0) { 113 1.3 matt aprint_error_dev(self, "could not map device registers\n"); 114 1.1 freza goto fail_0; 115 1.1 freza } 116 1.1 freza if ((error = bus_space_map(lsc->lsc_dma_iot, tx->dmac_ctrl_addr, 117 1.1 freza CDMAC_CTRL_SIZE, 0, &lsc->lsc_dma_ioh)) != 0) { 118 1.3 matt aprint_error_dev(self, "could not map dmac registers\n"); 119 1.1 freza goto fail_1; 120 1.1 freza } 121 1.1 freza 122 1.1 freza /* Fill in resolution, depth, size. */ 123 1.3 matt tft_mode(sc->sc_dev); 124 1.1 freza 125 1.1 freza /* Allocate and map framebuffer control data. */ 126 1.1 freza if ((error = bus_dmamem_alloc(lsc->lsc_dmat, 127 1.1 freza sizeof(struct ll_tft_control) + sc->sc_size, 8, 0, 128 1.1 freza &lsc->lsc_seg, 1, &nseg, 0)) != 0) { 129 1.3 matt aprint_error_dev(self, "could not allocate framebuffer\n"); 130 1.1 freza goto fail_2; 131 1.1 freza } 132 1.1 freza if ((error = bus_dmamem_map(lsc->lsc_dmat, &lsc->lsc_seg, nseg, 133 1.1 freza sizeof(struct ll_tft_control) + sc->sc_size, 134 1.2 christos (void **)&lsc->lsc_cd, BUS_DMA_COHERENT)) != 0) { 135 1.3 matt aprint_error_dev(self, "could not map framebuffer\n"); 136 1.1 freza goto fail_3; 137 1.1 freza } 138 1.1 freza if ((error = bus_dmamap_create(lsc->lsc_dmat, 139 1.1 freza sizeof(struct ll_tft_control) + sc->sc_size, 1, 140 1.1 freza sizeof(struct ll_tft_control) + sc->sc_size, 0, 0, 141 1.1 freza &lsc->lsc_dmap)) != 0) { 142 1.3 matt aprint_error_dev(self, "could not create framebuffer DMA map\n"); 143 1.1 freza goto fail_4; 144 1.1 freza } 145 1.1 freza if ((error = bus_dmamap_load(lsc->lsc_dmat, lsc->lsc_dmap, lsc->lsc_cd, 146 1.1 freza sizeof(struct ll_tft_control) + sc->sc_size, NULL, 0)) != 0) { 147 1.3 matt aprint_error_dev(self, "could not load framebuffer DMA map\n"); 148 1.1 freza goto fail_5; 149 1.1 freza } 150 1.1 freza 151 1.1 freza /* Clear screen, setup descriptor. */ 152 1.1 freza memset(lsc->lsc_cd, 0x00, sizeof(struct ll_tft_control)); 153 1.1 freza sc->sc_image = lsc->lsc_cd->cd_img; 154 1.1 freza 155 1.1 freza lsc->lsc_cd->cd_dsc.desc_next = lsc->lsc_dmap->dm_segs[0].ds_addr; 156 1.1 freza lsc->lsc_cd->cd_dsc.desc_addr = lsc->lsc_dmap->dm_segs[0].ds_addr + 157 1.1 freza offsetof(struct ll_tft_control, cd_img); 158 1.1 freza lsc->lsc_cd->cd_dsc.desc_size = sc->sc_size; 159 1.1 freza lsc->lsc_cd->cd_dsc.desc_stat = CDMAC_STAT_SOP; 160 1.1 freza 161 1.1 freza bus_dmamap_sync(lsc->lsc_dmat, lsc->lsc_dmap, 0, 162 1.1 freza sizeof(struct ll_tft_control) + sc->sc_size, 163 1.1 freza BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 164 1.1 freza 165 1.1 freza sc->sc_sdhook = shutdownhook_establish(ll_tft_shutdown, sc); 166 1.1 freza if (sc->sc_sdhook == NULL) 167 1.3 matt aprint_error_dev(self, 168 1.3 matt "WARNING: unable to establish shutdown hook\n"); 169 1.1 freza 170 1.1 freza tft_attach(self, &ll_tft_accessops); 171 1.1 freza 172 1.3 matt aprint_normal_dev(self, "video memory pa 0x%08x\n", 173 1.1 freza (uint32_t)lsc->lsc_cd->cd_dsc.desc_addr); 174 1.1 freza 175 1.1 freza /* Timing sensitive... */ 176 1.1 freza bus_space_write_4(sc->sc_iot, sc->sc_ioh, TFT_CTRL, CTRL_RESET); 177 1.1 freza bus_space_write_4(sc->sc_iot, sc->sc_ioh, TFT_CTRL, CTRL_ENABLE); 178 1.1 freza bus_space_write_4(lsc->lsc_dma_iot, lsc->lsc_dma_ioh, CDMAC_CURDESC, 179 1.1 freza lsc->lsc_dmap->dm_segs[0].ds_addr); 180 1.1 freza 181 1.1 freza return ; 182 1.1 freza 183 1.1 freza fail_5: 184 1.1 freza bus_dmamap_destroy(lsc->lsc_dmat, lsc->lsc_dmap); 185 1.1 freza fail_4: 186 1.2 christos bus_dmamem_unmap(lsc->lsc_dmat, (void *)lsc->lsc_cd, 187 1.1 freza sizeof(struct ll_tft_control) + sc->sc_size); 188 1.1 freza fail_3: 189 1.1 freza bus_dmamem_free(lsc->lsc_dmat, &lsc->lsc_seg, nseg); 190 1.1 freza fail_2: 191 1.1 freza bus_space_unmap(lsc->lsc_dma_iot, lsc->lsc_dma_ioh, CDMAC_CTRL_SIZE); 192 1.1 freza fail_1: 193 1.1 freza bus_space_unmap(sc->sc_iot, sc->sc_ioh, TFT_SIZE); 194 1.1 freza fail_0: 195 1.3 matt aprint_error_dev(self, "error %d\n", error); 196 1.1 freza } 197 1.1 freza 198 1.1 freza static paddr_t 199 1.1 freza ll_tft_mmap(void *arg, void *scr, off_t offs, int prot) 200 1.1 freza { 201 1.1 freza struct ll_tft_softc *lsc = arg; 202 1.1 freza paddr_t pa; 203 1.1 freza 204 1.1 freza if (offs < lsc->lsc_sc.sc_size) { 205 1.1 freza pa = bus_dmamem_mmap(lsc->lsc_dmat, &lsc->lsc_seg, 1, 206 1.1 freza offs + offsetof(struct ll_tft_control, cd_img), 207 1.1 freza prot, BUS_DMA_WAITOK | BUS_DMA_COHERENT); 208 1.1 freza 209 1.1 freza return (pa); 210 1.1 freza } 211 1.1 freza 212 1.1 freza return (-1); 213 1.1 freza } 214 1.1 freza 215 1.1 freza static void 216 1.1 freza ll_tft_shutdown(void *arg) 217 1.1 freza { 218 1.1 freza struct ll_tft_softc *lsc = arg; 219 1.1 freza 220 1.1 freza bus_space_write_4(lsc->lsc_dma_iot, lsc->lsc_dma_ioh, 0, 221 1.1 freza CDMAC_STAT_RESET); 222 1.1 freza 223 1.1 freza tft_shutdown(&lsc->lsc_sc); 224 1.1 freza } 225