idcr.h revision 1.1.2.2
1 1.1.2.2 yamt /* $NetBSD: idcr.h,v 1.1.2.2 2006/12/10 07:15:53 yamt Exp $ */ 2 1.1.2.2 yamt 3 1.1.2.2 yamt /* 4 1.1.2.2 yamt * Copyright (c) 2006 Jachym Holecek 5 1.1.2.2 yamt * All rights reserved. 6 1.1.2.2 yamt * 7 1.1.2.2 yamt * Written for DFC Design, s.r.o. 8 1.1.2.2 yamt * 9 1.1.2.2 yamt * Redistribution and use in source and binary forms, with or without 10 1.1.2.2 yamt * modification, are permitted provided that the following conditions 11 1.1.2.2 yamt * are met: 12 1.1.2.2 yamt * 13 1.1.2.2 yamt * 1. Redistributions of source code must retain the above copyright 14 1.1.2.2 yamt * notice, this list of conditions and the following disclaimer. 15 1.1.2.2 yamt * 16 1.1.2.2 yamt * 2. Redistributions in binary form must reproduce the above copyright 17 1.1.2.2 yamt * notice, this list of conditions and the following disclaimer in the 18 1.1.2.2 yamt * documentation and/or other materials provided with the distribution. 19 1.1.2.2 yamt * 20 1.1.2.2 yamt * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 1.1.2.2 yamt * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 1.1.2.2 yamt * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 1.1.2.2 yamt * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 1.1.2.2 yamt * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 1.1.2.2 yamt * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 1.1.2.2 yamt * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 1.1.2.2 yamt * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 1.1.2.2 yamt * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 1.1.2.2 yamt * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 1.1.2.2 yamt */ 31 1.1.2.2 yamt 32 1.1.2.2 yamt #include "opt_virtex.h" 33 1.1.2.2 yamt 34 1.1.2.2 yamt #ifndef IDCR_BASE 35 1.1.2.2 yamt #error "Internal DCR base address not defined" 36 1.1.2.2 yamt #endif 37 1.1.2.2 yamt 38 1.1.2.2 yamt #include <powerpc/cpu.h> 39 1.1.2.2 yamt 40 1.1.2.2 yamt #ifndef _VIRTEX_IDCR_H_ 41 1.1.2.2 yamt #define _VIRTEX_IDCR_H_ 42 1.1.2.2 yamt 43 1.1.2.2 yamt /* Instruction OCM control */ 44 1.1.2.2 yamt #define IDCR_ISINIT 0x0000 45 1.1.2.2 yamt #define IDCR_ISFILL 0x0001 46 1.1.2.2 yamt #define IDCR_ISARC 0x0002 47 1.1.2.2 yamt #define IDCR_ISCNT 0x0003 48 1.1.2.2 yamt 49 1.1.2.2 yamt /* APU control */ 50 1.1.2.2 yamt #define IDCR_UDICFG 0x0004 51 1.1.2.2 yamt #define IDCR_APUCFG 0x0005 52 1.1.2.2 yamt 53 1.1.2.2 yamt /* Data OCM control */ 54 1.1.2.2 yamt #define IDCR_DSARC 0x0006 55 1.1.2.2 yamt #define IDCR_DSCNT 0x0007 56 1.1.2.2 yamt 57 1.1.2.2 yamt /* 8...11 reserved */ 58 1.1.2.2 yamt 59 1.1.2.2 yamt /* Temac HIF-to-GMI communication: arguments, ... */ 60 1.1.2.2 yamt #define IDCR_HIF_ARG1 0x000c 61 1.1.2.2 yamt #define IDCR_HIF_ARG0 0x000d 62 1.1.2.2 yamt 63 1.1.2.2 yamt /* ... control, ... */ 64 1.1.2.2 yamt #define IDCR_HIF_CTRL 0x000e 65 1.1.2.2 yamt #define HIF_CTRL_GMIADDR 0x000003ff 66 1.1.2.2 yamt #define HIF_CTRL_SEL 0x00000400 /* Keep this bit zero! */ 67 1.1.2.2 yamt #define HIF_CTRL_WRITE 0x00008000 /* Read otherwise */ 68 1.1.2.2 yamt 69 1.1.2.2 yamt /* ... status. */ 70 1.1.2.2 yamt #define IDCR_HIF_STAT 0x000f 71 1.1.2.2 yamt #define HIF_STAT_STATS 0x00000001 72 1.1.2.2 yamt #define HIF_STAT_MIIRR 0x00000002 /* MII read ready */ 73 1.1.2.2 yamt #define HIF_STAT_MIIWR 0x00000004 /* MII write ready */ 74 1.1.2.2 yamt #define HIF_STAT_AFRR 0x00000008 /* Address filter read ready */ 75 1.1.2.2 yamt #define HIF_STAT_AFWR 0x00000010 /* Address filter write ready */ 76 1.1.2.2 yamt #define HIF_STAT_GMIRR 0x00000020 /* GMI read ready */ 77 1.1.2.2 yamt #define HIF_STAT_GMIWR 0x00000040 /* GMI write ready */ 78 1.1.2.2 yamt 79 1.1.2.2 yamt #define mtidcr(addr, val) mtdcr(IDCR_BASE + (addr), (val)) 80 1.1.2.2 yamt #define mfidcr(addr) mfdcr(IDCR_BASE + (addr)) 81 1.1.2.2 yamt 82 1.1.2.2 yamt #endif /*_VIRTEX_IDCR_H_*/ 83
Indexes created Wed Oct 29 03:09:52 GMT 2025