virtex_start.S revision 1.5.2.2
1 /* $NetBSD: virtex_start.S,v 1.5.2.2 2011/03/05 20:50:17 rmind Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Jachym Holecek 5 * All rights reserved. 6 * 7 * Written for DFC Design, s.r.o. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * This file is based on startup code of Walnut and Explora boards. 34 */ 35 36 #include "opt_ddb.h" 37 #include "opt_ipkdb.h" 38 #include "opt_lockdebug.h" 39 #include "opt_modular.h" 40 #include "opt_multiprocessor.h" 41 #include "opt_ppcarch.h" 42 #include "opt_ppcparam.h" 43 #include "opt_virtex.h" 44 #include "assym.h" 45 #include "ksyms.h" 46 47 #include <sys/syscall.h> 48 49 #include <machine/param.h> 50 #include <machine/psl.h> 51 #include <machine/trap.h> 52 #include <machine/asm.h> 53 54 #include <powerpc/spr.h> 55 #include <powerpc/ibm4xx/spr.h> 56 #include <powerpc/ibm4xx/dcr4xx.h> 57 #include <powerpc/ibm4xx/pmap.h> 58 59 60 /* N megabytes. */ 61 #define MB(n) ((n)*1024*1024) 62 63 /* Set bit (beginning with MSB) for each 128MB of RAM. */ 64 #define PHYSMEM_REGIONS_MASK ~((1 << (32 - MB(PHYSMEM)/MB(128))) - 1) 65 66 /* For kvm_mkdb, supposed to mark the start of kernel text. */ 67 .text 68 .globl _C_LABEL(kernel_text) 69 _C_LABEL(kernel_text): 70 71 /* Startup entry. This must be the first thing in the text segment! */ 72 .text 73 .globl __start 74 __start: 75 /* Disable MMU/exceptions */ 76 lis %r0, 0 77 mtmsr %r0 78 79 /* Disable timers */ 80 lis %r0, 0 81 mttcr %r0 82 83 sync 84 isync 85 86 /* Disable caches */ 87 mtdccr %r0 88 mticcr %r0 89 sync 90 isync 91 92 /* Invalidate I$, operands ignored on the 405 */ 93 li %r0,0 /* just in case... */ 94 iccci %r0,%r0 95 96 /* Invalidate D$, hardcoded for 16KB size, 32B line */ 97 li %r7,256 /* # of congruence classes */ 98 mtctr %r7 99 li %r6,0 100 1: 101 dccci %r0,%r6 /* invalidates both ways */ 102 addi %r6,%r6,32 103 bdnz 1b 104 105 /* 106 * Errata 213: Incorrect data may be flushed from the data cache. 107 * Cores: PPC405D5X1, PPC405D5X2 108 * Workaround: #1, CCR0 modification sequence #2 109 * Note: Meaning of bits we need to set is undocumented. 110 */ 111 sync 112 mfccr0 %r0 113 oris %r0,%r0,0x50000000@h 114 mtccr0 %r0 115 isync 116 117 /* 118 * Errata 58: Load string instructions may write incorrect 119 * data into the last GPR targeted in operation. 120 * Cores: PPC405GP 121 * Workaround: set OCM0_DSCNTL[DSEN]=0 and OCM0_DSCNTL[DOF]=0 122 */ 123 mtdcr DCR_OCM0_DSCNTL,%r0 /* Disable Data access to OCM */ 124 125 #if 0 126 /* Allow cacheing for whole RAM. */ 127 lis %r0,PHYSMEM_REGIONS_MASK@ha 128 ori %r0,%r0,PHYSMEM_REGIONS_MASK@l 129 #else 130 #ifndef PPC_4XX_NOCACHE 131 /* Allow cacheing for only the first 1GB of RAM */ 132 lis %r0,0xff00 133 mtdccr %r0 134 mticcr %r0 135 #endif /* PPC_4XX_NOCACHE */ 136 #endif 137 138 /* Invalidate all TLB entries */ 139 tlbia 140 sync 141 isync 142 143 /* Set kernel MMU context, we'll enable MMU in initppc() */ 144 li %r0,KERNEL_PID 145 mtpid %r0 146 sync 147 isync 148 149 /* Setup endkernel argument for initppc() and INIT_CPUINFO */ 150 lis %r4,_C_LABEL(end)@h 151 ori %r4,%r4,_C_LABEL(end)@l 152 153 /* Clear .bss segment */ 154 lis %r7,_C_LABEL(edata)-4@h 155 ori %r7,%r7,_C_LABEL(edata)-4@l 156 li %r3,0 157 2: stwu %r3,4(%r7) 158 cmpw %r7,%r4 159 bne+ 2b 160 161 #if NKSYMS || defined(DDB) || defined(MODULAR) 162 /* We don't have a symbol table, so set startsym = endsym = end */ 163 lis %r7,_C_LABEL(startsym)@ha 164 ori %r7,%r7,_C_LABEL(startsym)@l 165 stw %r4,0(%r7) 166 lis %r7,_C_LABEL(endsym)@ha 167 ori %r7,%r7,_C_LABEL(endsym)@l 168 stw %r4,0(%r7) 169 #endif 170 171 /* INIT_CPUINFO will 'addi', so clean up. */ 172 lis %r1,0 173 174 INIT_CPUINFO(4,1,9,0) 175 176 /* startkernel argument for initppc */ 177 lis %r3,__start@h 178 addi %r3,%r3,__start@l 179 180 bl _C_LABEL(initppc) 181 bl _C_LABEL(main) 182 183 loop: /* UNREACHED */ 184 b loop 185 186 #include <powerpc/ibm4xx/4xx_locore.S> 187
Indexes created Fri Oct 17 17:09:57 GMT 2025