virtex_start.S revision 1.6
1 /* $NetBSD: virtex_start.S,v 1.6 2010/03/18 14:04:07 kiyohara Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Jachym Holecek 5 * All rights reserved. 6 * 7 * Written for DFC Design, s.r.o. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * This file is based on startup code of Walnut and Explora boards. 34 */ 35 36 #define _NOREGNAMES 37 38 #include "opt_ddb.h" 39 #include "opt_ipkdb.h" 40 #include "opt_lockdebug.h" 41 #include "opt_modular.h" 42 #include "opt_multiprocessor.h" 43 #include "opt_ppcarch.h" 44 #include "opt_ppcparam.h" 45 #include "opt_virtex.h" 46 #include "assym.h" 47 #include "ksyms.h" 48 49 #include <sys/syscall.h> 50 51 #include <machine/param.h> 52 #include <machine/psl.h> 53 #include <machine/trap.h> 54 #include <machine/asm.h> 55 56 #include <powerpc/spr.h> 57 #include <powerpc/ibm4xx/spr.h> 58 #include <powerpc/ibm4xx/dcr4xx.h> 59 #include <powerpc/ibm4xx/pmap.h> 60 61 62 /* N megabytes. */ 63 #define MB(n) ((n)*1024*1024) 64 65 /* Set bit (beginning with MSB) for each 128MB of RAM. */ 66 #define PHYSMEM_REGIONS_MASK ~((1 << (32 - MB(PHYSMEM)/MB(128))) - 1) 67 68 /* For kvm_mkdb, supposed to mark the start of kernel text. */ 69 .text 70 .globl _C_LABEL(kernel_text) 71 _C_LABEL(kernel_text): 72 73 /* Startup entry. This must be the first thing in the text segment! */ 74 .text 75 .globl __start 76 __start: 77 /* Disable MMU/exceptions */ 78 lis %r0, 0 79 mtmsr %r0 80 81 /* Disable timers */ 82 lis %r0, 0 83 mttcr %r0 84 85 sync 86 isync 87 88 /* Disable caches */ 89 mtdccr %r0 90 mticcr %r0 91 sync 92 isync 93 94 /* Invalidate I$, operands ignored on the 405 */ 95 li %r0,0 /* just in case... */ 96 iccci %r0,%r0 97 98 /* Invalidate D$, hardcoded for 16KB size, 32B line */ 99 li %r7,256 /* # of congruence classes */ 100 mtctr %r7 101 li %r6,0 102 1: 103 dccci %r0,%r6 /* invalidates both ways */ 104 addi %r6,%r6,32 105 bdnz 1b 106 107 /* 108 * Errata 213: Incorrect data may be flushed from the data cache. 109 * Cores: PPC405D5X1, PPC405D5X2 110 * Workaround: #1, CCR0 modification sequence #2 111 * Note: Meaning of bits we need to set is undocumented. 112 */ 113 sync 114 mfccr0 %r0 115 oris %r0,%r0,0x50000000@h 116 mtccr0 %r0 117 isync 118 119 /* 120 * Errata 58: Load string instructions may write incorrect 121 * data into the last GPR targeted in operation. 122 * Cores: PPC405GP 123 * Workaround: set OCM0_DSCNTL[DSEN]=0 and OCM0_DSCNTL[DOF]=0 124 */ 125 mtdcr DCR_OCM0_DSCNTL,%r0 /* Disable Data access to OCM */ 126 127 #if 0 128 /* Allow cacheing for whole RAM. */ 129 lis %r0,PHYSMEM_REGIONS_MASK@ha 130 ori %r0,%r0,PHYSMEM_REGIONS_MASK@l 131 #else 132 #ifndef PPC_4XX_NOCACHE 133 /* Allow cacheing for only the first 1GB of RAM */ 134 lis %r0,0xff00 135 mtdccr %r0 136 mticcr %r0 137 #endif /* PPC_4XX_NOCACHE */ 138 #endif 139 140 /* Invalidate all TLB entries */ 141 tlbia 142 sync 143 isync 144 145 /* Set kernel MMU context, we'll enable MMU in initppc() */ 146 li %r0,KERNEL_PID 147 mtpid %r0 148 sync 149 isync 150 151 /* Setup endkernel argument for initppc() and INIT_CPUINFO */ 152 lis %r4,_C_LABEL(end)@h 153 ori %r4,%r4,_C_LABEL(end)@l 154 155 /* Clear .bss segment */ 156 lis %r7,_C_LABEL(edata)-4@h 157 ori %r7,%r7,_C_LABEL(edata)-4@l 158 li %r3,0 159 2: stwu %r3,4(%r7) 160 cmpw %r7,%r4 161 bne+ 2b 162 163 #if NKSYMS || defined(DDB) || defined(MODULAR) 164 /* We don't have a symbol table, so set startsym = endsym = end */ 165 lis %r7,_C_LABEL(startsym)@ha 166 ori %r7,%r7,_C_LABEL(startsym)@l 167 stw %r4,0(%r7) 168 lis %r7,_C_LABEL(endsym)@ha 169 ori %r7,%r7,_C_LABEL(endsym)@l 170 stw %r4,0(%r7) 171 #endif 172 173 /* INIT_CPUINFO will 'addi', so clean up. */ 174 lis %r1,0 175 176 INIT_CPUINFO(4,1,9,0) 177 178 /* startkernel argument for initppc */ 179 lis %r3,__start@h 180 addi %r3,%r3,__start@l 181 182 bl _C_LABEL(initppc) 183 bl _C_LABEL(main) 184 185 loop: /* UNREACHED */ 186 b loop 187 188 #include <powerpc/ibm4xx/4xx_locore.S> 189
Indexes created Thu Oct 02 01:09:59 GMT 2025