virtex_start.S revision 1.8
1 /* $NetBSD: virtex_start.S,v 1.8 2011/06/20 19:56:11 matt Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Jachym Holecek 5 * All rights reserved. 6 * 7 * Written for DFC Design, s.r.o. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * This file is based on startup code of Walnut and Explora boards. 34 */ 35 36 #include "opt_ddb.h" 37 #include "opt_ipkdb.h" 38 #include "opt_lockdebug.h" 39 #include "opt_modular.h" 40 #include "opt_multiprocessor.h" 41 #include "opt_ppcarch.h" 42 #include "opt_ppcparam.h" 43 #include "opt_virtex.h" 44 #include "assym.h" 45 #include "ksyms.h" 46 47 #include <sys/syscall.h> 48 49 #include <machine/param.h> 50 #include <machine/psl.h> 51 #include <machine/trap.h> 52 #include <machine/asm.h> 53 54 #include <powerpc/spr.h> 55 #include <powerpc/ibm4xx/spr.h> 56 #include <powerpc/ibm4xx/dcr4xx.h> 57 58 59 /* N megabytes. */ 60 #define MB(n) ((n)*1024*1024) 61 62 /* Set bit (beginning with MSB) for each 128MB of RAM. */ 63 #define PHYSMEM_REGIONS_MASK ~((1 << (32 - MB(PHYSMEM)/MB(128))) - 1) 64 65 /* For kvm_mkdb, supposed to mark the start of kernel text. */ 66 .text 67 .globl _C_LABEL(kernel_text) 68 _C_LABEL(kernel_text): 69 70 /* Startup entry. This must be the first thing in the text segment! */ 71 .text 72 .globl __start 73 __start: 74 /* Disable MMU/exceptions */ 75 lis %r0, 0 76 mtmsr %r0 77 78 /* Disable timers */ 79 lis %r0, 0 80 mttcr %r0 81 82 sync 83 isync 84 85 /* Disable caches */ 86 mtdccr %r0 87 mticcr %r0 88 sync 89 isync 90 91 /* Invalidate I$, operands ignored on the 405 */ 92 li %r0,0 /* just in case... */ 93 iccci %r0,%r0 94 95 /* Invalidate D$, hardcoded for 16KB size, 32B line */ 96 li %r7,256 /* # of congruence classes */ 97 mtctr %r7 98 li %r6,0 99 1: 100 dccci %r0,%r6 /* invalidates both ways */ 101 addi %r6,%r6,32 102 bdnz 1b 103 104 /* 105 * Errata 213: Incorrect data may be flushed from the data cache. 106 * Cores: PPC405D5X1, PPC405D5X2 107 * Workaround: #1, CCR0 modification sequence #2 108 * Note: Meaning of bits we need to set is undocumented. 109 */ 110 sync 111 mfccr0 %r0 112 oris %r0,%r0,0x50000000@h 113 mtccr0 %r0 114 isync 115 116 /* 117 * Errata 58: Load string instructions may write incorrect 118 * data into the last GPR targeted in operation. 119 * Cores: PPC405GP 120 * Workaround: set OCM0_DSCNTL[DSEN]=0 and OCM0_DSCNTL[DOF]=0 121 */ 122 mtdcr DCR_OCM0_DSCNTL,%r0 /* Disable Data access to OCM */ 123 124 #if 0 125 /* Allow cacheing for whole RAM. */ 126 lis %r0,PHYSMEM_REGIONS_MASK@ha 127 ori %r0,%r0,PHYSMEM_REGIONS_MASK@l 128 #else 129 #ifndef PPC_4XX_NOCACHE 130 /* Allow cacheing for only the first 1GB of RAM */ 131 lis %r0,0xff00 132 mtdccr %r0 133 mticcr %r0 134 #endif /* PPC_4XX_NOCACHE */ 135 #endif 136 137 /* Invalidate all TLB entries */ 138 tlbia 139 sync 140 isync 141 142 /* Set kernel MMU context, we'll enable MMU in initppc() */ 143 li %r0,KERNEL_PID 144 mtpid %r0 145 sync 146 isync 147 148 /* Setup endkernel argument for initppc() and INIT_CPUINFO */ 149 lis %r4,_C_LABEL(end)@h 150 ori %r4,%r4,_C_LABEL(end)@l 151 152 /* Clear .bss segment */ 153 lis %r7,_C_LABEL(edata)-4@h 154 ori %r7,%r7,_C_LABEL(edata)-4@l 155 li %r3,0 156 2: stwu %r3,4(%r7) 157 cmpw %r7,%r4 158 bne+ 2b 159 160 #if NKSYMS || defined(DDB) || defined(MODULAR) 161 /* We don't have a symbol table, so set startsym = endsym = end */ 162 lis %r7,_C_LABEL(startsym)@ha 163 ori %r7,%r7,_C_LABEL(startsym)@l 164 stw %r4,0(%r7) 165 lis %r7,_C_LABEL(endsym)@ha 166 ori %r7,%r7,_C_LABEL(endsym)@l 167 stw %r4,0(%r7) 168 #endif 169 170 /* INIT_CPUINFO will 'addi', so clean up. */ 171 lis %r1,0 172 173 INIT_CPUINFO(4,1,9,0) 174 175 /* startkernel argument for initppc */ 176 lis %r3,__start@h 177 addi %r3,%r3,__start@l 178 179 bl _C_LABEL(initppc) 180 bl _C_LABEL(main) 181 182 loop: /* UNREACHED */ 183 b loop 184 185 #include <powerpc/ibm4xx/4xx_locore.S> 186
Indexes created Sat Oct 18 16:10:06 GMT 2025