exi.c revision 1.1.2.2 1 1.1.2.2 martin /* $NetBSD: exi.c,v 1.1.2.2 2024/02/03 11:47:05 martin Exp $ */
2 1.1.2.2 martin
3 1.1.2.2 martin /*-
4 1.1.2.2 martin * Copyright (c) 2024 Jared McNeill <jmcneill (at) invisible.ca>
5 1.1.2.2 martin * All rights reserved.
6 1.1.2.2 martin *
7 1.1.2.2 martin * Redistribution and use in source and binary forms, with or without
8 1.1.2.2 martin * modification, are permitted provided that the following conditions
9 1.1.2.2 martin * are met:
10 1.1.2.2 martin * 1. Redistributions of source code must retain the above copyright
11 1.1.2.2 martin * notice, this list of conditions and the following disclaimer.
12 1.1.2.2 martin * 2. Redistributions in binary form must reproduce the above copyright
13 1.1.2.2 martin * notice, this list of conditions and the following disclaimer in the
14 1.1.2.2 martin * documentation and/or other materials provided with the distribution.
15 1.1.2.2 martin *
16 1.1.2.2 martin * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1.2.2 martin * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1.2.2 martin * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1.2.2 martin * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1.2.2 martin * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1.2.2 martin * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1.2.2 martin * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1.2.2 martin * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1.2.2 martin * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1.2.2 martin * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1.2.2 martin * SUCH DAMAGE.
27 1.1.2.2 martin */
28 1.1.2.2 martin
29 1.1.2.2 martin #include <sys/cdefs.h>
30 1.1.2.2 martin __KERNEL_RCSID(0, "$NetBSD: exi.c,v 1.1.2.2 2024/02/03 11:47:05 martin Exp $");
31 1.1.2.2 martin
32 1.1.2.2 martin #include <sys/param.h>
33 1.1.2.2 martin #include <sys/bus.h>
34 1.1.2.2 martin #include <sys/device.h>
35 1.1.2.2 martin #include <sys/systm.h>
36 1.1.2.2 martin #include <sys/bitops.h>
37 1.1.2.2 martin #include <sys/mutex.h>
38 1.1.2.2 martin #include <uvm/uvm_extern.h>
39 1.1.2.2 martin
40 1.1.2.2 martin #include <machine/wii.h>
41 1.1.2.2 martin #include <machine/pio.h>
42 1.1.2.2 martin
43 1.1.2.2 martin #include "locators.h"
44 1.1.2.2 martin #include "mainbus.h"
45 1.1.2.2 martin #include "exi.h"
46 1.1.2.2 martin
47 1.1.2.2 martin #define EXI_NUM_CHAN 3
48 1.1.2.2 martin #define EXI_NUM_DEV 3
49 1.1.2.2 martin
50 1.1.2.2 martin /* This is an arbitrary limit. The real limit is probably much higher. */
51 1.1.2.2 martin #define EXI_MAX_DMA 4096
52 1.1.2.2 martin
53 1.1.2.2 martin #define EXI_CSR(n) (0x00 + (n) * 0x14)
54 1.1.2.2 martin #define EXI_CSR_CS __BITS(9,7)
55 1.1.2.2 martin #define EXI_MAR(n) (0x04 + (n) * 0x14)
56 1.1.2.2 martin #define EXI_LENGTH(n) (0x08 + (n) * 0x14)
57 1.1.2.2 martin #define EXI_CR(n) (0x0c + (n) * 0x14)
58 1.1.2.2 martin #define EXI_CR_TLEN __BITS(5,4)
59 1.1.2.2 martin #define EXI_CR_RW __BITS(3,2)
60 1.1.2.2 martin #define EXI_CR_RW_READ __SHIFTIN(0, EXI_CR_RW)
61 1.1.2.2 martin #define EXI_CR_RW_WRITE __SHIFTIN(1, EXI_CR_RW)
62 1.1.2.2 martin #define EXI_CR_DMA __BIT(1)
63 1.1.2.2 martin #define EXI_CR_TSTART __BIT(0)
64 1.1.2.2 martin #define EXI_DATA(n) (0x10 + (n) * 0x14)
65 1.1.2.2 martin
66 1.1.2.2 martin #define ASSERT_CHAN_VALID(chan) KASSERT((chan) >= 0 && (chan) < EXI_NUM_CHAN)
67 1.1.2.2 martin #define ASSERT_DEV_VALID(dev) KASSERT((dev) >= 0 && (dev) < EXI_NUM_DEV)
68 1.1.2.2 martin #define ASSERT_LEN_VALID(len) KASSERT((len) == 1 || (len) == 2 || (len) == 4)
69 1.1.2.2 martin
70 1.1.2.2 martin struct exi_channel {
71 1.1.2.2 martin kmutex_t ch_lock;
72 1.1.2.2 martin
73 1.1.2.2 martin bus_dmamap_t ch_dmamap;
74 1.1.2.2 martin
75 1.1.2.2 martin device_t ch_child[EXI_NUM_DEV];
76 1.1.2.2 martin };
77 1.1.2.2 martin
78 1.1.2.2 martin struct exi_softc {
79 1.1.2.2 martin device_t sc_dev;
80 1.1.2.2 martin bus_space_tag_t sc_bst;
81 1.1.2.2 martin bus_space_handle_t sc_bsh;
82 1.1.2.2 martin bus_dma_tag_t sc_dmat;
83 1.1.2.2 martin
84 1.1.2.2 martin struct exi_channel sc_chan[EXI_NUM_CHAN];
85 1.1.2.2 martin };
86 1.1.2.2 martin
87 1.1.2.2 martin static struct exi_softc *exi_softc;
88 1.1.2.2 martin
89 1.1.2.2 martin #define RD4(sc, reg) \
90 1.1.2.2 martin bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
91 1.1.2.2 martin #define WR4(sc, reg, val) \
92 1.1.2.2 martin bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
93 1.1.2.2 martin
94 1.1.2.2 martin static int exi_match(device_t, cfdata_t, void *);
95 1.1.2.2 martin static void exi_attach(device_t, device_t, void *);
96 1.1.2.2 martin
97 1.1.2.2 martin static int exi_rescan(device_t, const char *, const int *);
98 1.1.2.2 martin static int exi_print(void *, const char *);
99 1.1.2.2 martin
100 1.1.2.2 martin CFATTACH_DECL_NEW(exi, sizeof(struct exi_softc),
101 1.1.2.2 martin exi_match, exi_attach, NULL, NULL);
102 1.1.2.2 martin
103 1.1.2.2 martin static int
104 1.1.2.2 martin exi_match(device_t parent, cfdata_t cf, void *aux)
105 1.1.2.2 martin {
106 1.1.2.2 martin struct mainbus_attach_args *maa = aux;
107 1.1.2.2 martin
108 1.1.2.2 martin return strcmp(maa->maa_name, "exi") == 0;
109 1.1.2.2 martin }
110 1.1.2.2 martin
111 1.1.2.2 martin static void
112 1.1.2.2 martin exi_attach(device_t parent, device_t self, void *aux)
113 1.1.2.2 martin {
114 1.1.2.2 martin struct mainbus_attach_args * const maa = aux;
115 1.1.2.2 martin struct exi_softc * const sc = device_private(self);
116 1.1.2.2 martin uint8_t chan;
117 1.1.2.2 martin int error;
118 1.1.2.2 martin
119 1.1.2.2 martin KASSERT(device_unit(self) == 0);
120 1.1.2.2 martin
121 1.1.2.2 martin aprint_naive("\n");
122 1.1.2.2 martin aprint_normal(": External Interface\n");
123 1.1.2.2 martin
124 1.1.2.2 martin exi_softc = sc;
125 1.1.2.2 martin sc->sc_dev = self;
126 1.1.2.2 martin sc->sc_bst = maa->maa_bst;
127 1.1.2.2 martin if (bus_space_map(sc->sc_bst, maa->maa_addr, EXI_SIZE, 0,
128 1.1.2.2 martin &sc->sc_bsh) != 0) {
129 1.1.2.2 martin aprint_error_dev(self, "couldn't map registers\n");
130 1.1.2.2 martin return;
131 1.1.2.2 martin }
132 1.1.2.2 martin sc->sc_dmat = maa->maa_dmat;
133 1.1.2.2 martin for (chan = 0; chan < EXI_NUM_CHAN; chan++) {
134 1.1.2.2 martin mutex_init(&sc->sc_chan[chan].ch_lock, MUTEX_DEFAULT, IPL_VM);
135 1.1.2.2 martin error = bus_dmamap_create(exi_softc->sc_dmat, EXI_MAX_DMA, 1,
136 1.1.2.2 martin EXI_MAX_DMA, 0, BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW,
137 1.1.2.2 martin &sc->sc_chan[chan].ch_dmamap);
138 1.1.2.2 martin if (error != 0) {
139 1.1.2.2 martin aprint_error_dev(self, "couldn't create dmamap: %d\n",
140 1.1.2.2 martin error);
141 1.1.2.2 martin return;
142 1.1.2.2 martin }
143 1.1.2.2 martin }
144 1.1.2.2 martin
145 1.1.2.2 martin exi_rescan(self, NULL, NULL);
146 1.1.2.2 martin }
147 1.1.2.2 martin
148 1.1.2.2 martin static int
149 1.1.2.2 martin exi_rescan(device_t self, const char *ifattr, const int *locs)
150 1.1.2.2 martin {
151 1.1.2.2 martin struct exi_softc * const sc = device_private(self);
152 1.1.2.2 martin uint8_t chan, dev;
153 1.1.2.2 martin
154 1.1.2.2 martin for (chan = 0; chan < EXI_NUM_CHAN; chan++) {
155 1.1.2.2 martin struct exi_channel *ch = &sc->sc_chan[chan];
156 1.1.2.2 martin for (dev = 0; dev < EXI_NUM_DEV; dev++) {
157 1.1.2.2 martin struct exi_attach_args eaa = {};
158 1.1.2.2 martin uint16_t command = 0x0000; /* ID command */
159 1.1.2.2 martin uint32_t id = 0;
160 1.1.2.2 martin
161 1.1.2.2 martin if (ch->ch_child[dev] != NULL) {
162 1.1.2.2 martin continue;
163 1.1.2.2 martin }
164 1.1.2.2 martin
165 1.1.2.2 martin exi_select(chan, dev);
166 1.1.2.2 martin exi_send_imm(chan, dev, &command, sizeof(command));
167 1.1.2.2 martin exi_recv_imm(chan, dev, &id, sizeof(id));
168 1.1.2.2 martin exi_unselect(chan);
169 1.1.2.2 martin
170 1.1.2.2 martin if (id == 0 || id == 0xffffffff) {
171 1.1.2.2 martin continue;
172 1.1.2.2 martin }
173 1.1.2.2 martin
174 1.1.2.2 martin eaa.eaa_id = id;
175 1.1.2.2 martin eaa.eaa_chan = chan;
176 1.1.2.2 martin eaa.eaa_device = dev;
177 1.1.2.2 martin
178 1.1.2.2 martin ch->ch_child[dev] = config_found(self, &eaa, exi_print,
179 1.1.2.2 martin CFARGS(.submatch = config_stdsubmatch,
180 1.1.2.2 martin .locators = locs));
181 1.1.2.2 martin }
182 1.1.2.2 martin }
183 1.1.2.2 martin
184 1.1.2.2 martin return 0;
185 1.1.2.2 martin }
186 1.1.2.2 martin
187 1.1.2.2 martin static int
188 1.1.2.2 martin exi_print(void *aux, const char *pnp)
189 1.1.2.2 martin {
190 1.1.2.2 martin struct exi_attach_args *eaa = aux;
191 1.1.2.2 martin
192 1.1.2.2 martin if (pnp != NULL) {
193 1.1.2.2 martin aprint_normal("EXI device 0x%08x at %s", eaa->eaa_id, pnp);
194 1.1.2.2 martin }
195 1.1.2.2 martin
196 1.1.2.2 martin aprint_normal(" addr %u-%u", eaa->eaa_chan, eaa->eaa_device);
197 1.1.2.2 martin
198 1.1.2.2 martin return UNCONF;
199 1.1.2.2 martin }
200 1.1.2.2 martin
201 1.1.2.2 martin void
202 1.1.2.2 martin exi_select(uint8_t chan, uint8_t dev)
203 1.1.2.2 martin {
204 1.1.2.2 martin struct exi_channel *ch;
205 1.1.2.2 martin uint32_t val;
206 1.1.2.2 martin
207 1.1.2.2 martin ASSERT_CHAN_VALID(chan);
208 1.1.2.2 martin ASSERT_DEV_VALID(dev);
209 1.1.2.2 martin
210 1.1.2.2 martin ch = &exi_softc->sc_chan[chan];
211 1.1.2.2 martin mutex_enter(&ch->ch_lock);
212 1.1.2.2 martin
213 1.1.2.2 martin val = RD4(exi_softc, EXI_CSR(chan));
214 1.1.2.2 martin val &= ~EXI_CSR_CS;
215 1.1.2.2 martin val |= __SHIFTIN(__BIT(dev), EXI_CSR_CS);
216 1.1.2.2 martin WR4(exi_softc, EXI_CSR(chan), val);
217 1.1.2.2 martin }
218 1.1.2.2 martin
219 1.1.2.2 martin void
220 1.1.2.2 martin exi_unselect(uint8_t chan)
221 1.1.2.2 martin {
222 1.1.2.2 martin struct exi_channel *ch;
223 1.1.2.2 martin uint32_t val;
224 1.1.2.2 martin
225 1.1.2.2 martin ASSERT_CHAN_VALID(chan);
226 1.1.2.2 martin
227 1.1.2.2 martin ch = &exi_softc->sc_chan[chan];
228 1.1.2.2 martin
229 1.1.2.2 martin val = RD4(exi_softc, EXI_CSR(chan));
230 1.1.2.2 martin val &= ~EXI_CSR_CS;
231 1.1.2.2 martin WR4(exi_softc, EXI_CSR(chan), val);
232 1.1.2.2 martin
233 1.1.2.2 martin mutex_exit(&ch->ch_lock);
234 1.1.2.2 martin }
235 1.1.2.2 martin
236 1.1.2.2 martin static void
237 1.1.2.2 martin exi_wait(uint8_t chan)
238 1.1.2.2 martin {
239 1.1.2.2 martin uint32_t val;
240 1.1.2.2 martin
241 1.1.2.2 martin ASSERT_CHAN_VALID(chan);
242 1.1.2.2 martin
243 1.1.2.2 martin do {
244 1.1.2.2 martin val = RD4(exi_softc, EXI_CR(chan));
245 1.1.2.2 martin } while ((val & EXI_CR_TSTART) != 0);
246 1.1.2.2 martin }
247 1.1.2.2 martin
248 1.1.2.2 martin void
249 1.1.2.2 martin exi_send_imm(uint8_t chan, uint8_t dev, const void *data, size_t datalen)
250 1.1.2.2 martin {
251 1.1.2.2 martin struct exi_channel *ch;
252 1.1.2.2 martin uint32_t val = 0;
253 1.1.2.2 martin
254 1.1.2.2 martin ASSERT_CHAN_VALID(chan);
255 1.1.2.2 martin ASSERT_DEV_VALID(dev);
256 1.1.2.2 martin ASSERT_LEN_VALID(datalen);
257 1.1.2.2 martin
258 1.1.2.2 martin ch = &exi_softc->sc_chan[chan];
259 1.1.2.2 martin KASSERT(mutex_owned(&ch->ch_lock));
260 1.1.2.2 martin
261 1.1.2.2 martin switch (datalen) {
262 1.1.2.2 martin case 1:
263 1.1.2.2 martin val = *(const uint8_t *)data << 24;
264 1.1.2.2 martin break;
265 1.1.2.2 martin case 2:
266 1.1.2.2 martin val = *(const uint16_t *)data << 16;
267 1.1.2.2 martin break;
268 1.1.2.2 martin case 4:
269 1.1.2.2 martin val = *(const uint32_t *)data;
270 1.1.2.2 martin break;
271 1.1.2.2 martin }
272 1.1.2.2 martin
273 1.1.2.2 martin WR4(exi_softc, EXI_DATA(chan), val);
274 1.1.2.2 martin WR4(exi_softc, EXI_CR(chan),
275 1.1.2.2 martin EXI_CR_TSTART | EXI_CR_RW_WRITE |
276 1.1.2.2 martin __SHIFTIN(datalen - 1, EXI_CR_TLEN));
277 1.1.2.2 martin exi_wait(chan);
278 1.1.2.2 martin }
279 1.1.2.2 martin
280 1.1.2.2 martin void
281 1.1.2.2 martin exi_recv_imm(uint8_t chan, uint8_t dev, void *data, size_t datalen)
282 1.1.2.2 martin {
283 1.1.2.2 martin struct exi_channel *ch;
284 1.1.2.2 martin uint32_t val;
285 1.1.2.2 martin
286 1.1.2.2 martin ASSERT_CHAN_VALID(chan);
287 1.1.2.2 martin ASSERT_DEV_VALID(dev);
288 1.1.2.2 martin ASSERT_LEN_VALID(datalen);
289 1.1.2.2 martin
290 1.1.2.2 martin ch = &exi_softc->sc_chan[chan];
291 1.1.2.2 martin KASSERT(mutex_owned(&ch->ch_lock));
292 1.1.2.2 martin
293 1.1.2.2 martin WR4(exi_softc, EXI_CR(chan),
294 1.1.2.2 martin EXI_CR_TSTART | EXI_CR_RW_READ |
295 1.1.2.2 martin __SHIFTIN(datalen - 1, EXI_CR_TLEN));
296 1.1.2.2 martin exi_wait(chan);
297 1.1.2.2 martin val = RD4(exi_softc, EXI_DATA(chan));
298 1.1.2.2 martin
299 1.1.2.2 martin switch (datalen) {
300 1.1.2.2 martin case 1:
301 1.1.2.2 martin *(uint8_t *)data = val >> 24;
302 1.1.2.2 martin break;
303 1.1.2.2 martin case 2:
304 1.1.2.2 martin *(uint16_t *)data = val >> 16;
305 1.1.2.2 martin break;
306 1.1.2.2 martin case 4:
307 1.1.2.2 martin *(uint32_t *)data = val;
308 1.1.2.2 martin break;
309 1.1.2.2 martin }
310 1.1.2.2 martin }
311 1.1.2.2 martin
312 1.1.2.2 martin void
313 1.1.2.2 martin exi_recv_dma(uint8_t chan, uint8_t dev, void *data, size_t datalen)
314 1.1.2.2 martin {
315 1.1.2.2 martin struct exi_channel *ch;
316 1.1.2.2 martin int error;
317 1.1.2.2 martin
318 1.1.2.2 martin ASSERT_CHAN_VALID(chan);
319 1.1.2.2 martin ASSERT_DEV_VALID(dev);
320 1.1.2.2 martin KASSERT((datalen & 0x1f) == 0);
321 1.1.2.2 martin
322 1.1.2.2 martin ch = &exi_softc->sc_chan[chan];
323 1.1.2.2 martin KASSERT(mutex_owned(&ch->ch_lock));
324 1.1.2.2 martin
325 1.1.2.2 martin error = bus_dmamap_load(exi_softc->sc_dmat, ch->ch_dmamap,
326 1.1.2.2 martin data, datalen, NULL, BUS_DMA_WAITOK);
327 1.1.2.2 martin if (error != 0) {
328 1.1.2.2 martin device_printf(exi_softc->sc_dev, "can't load DMA handle: %d\n",
329 1.1.2.2 martin error);
330 1.1.2.2 martin return;
331 1.1.2.2 martin }
332 1.1.2.2 martin
333 1.1.2.2 martin KASSERT((ch->ch_dmamap->dm_segs[0].ds_addr & 0x1f) == 0);
334 1.1.2.2 martin
335 1.1.2.2 martin bus_dmamap_sync(exi_softc->sc_dmat, ch->ch_dmamap, 0, datalen,
336 1.1.2.2 martin BUS_DMASYNC_PREREAD);
337 1.1.2.2 martin
338 1.1.2.2 martin WR4(exi_softc, EXI_MAR(chan), ch->ch_dmamap->dm_segs[0].ds_addr);
339 1.1.2.2 martin WR4(exi_softc, EXI_LENGTH(chan), datalen);
340 1.1.2.2 martin WR4(exi_softc, EXI_CR(chan),
341 1.1.2.2 martin EXI_CR_TSTART | EXI_CR_RW_READ | EXI_CR_DMA);
342 1.1.2.2 martin exi_wait(chan);
343 1.1.2.2 martin
344 1.1.2.2 martin bus_dmamap_sync(exi_softc->sc_dmat, ch->ch_dmamap, 0, datalen,
345 1.1.2.2 martin BUS_DMASYNC_POSTREAD);
346 1.1.2.2 martin
347 1.1.2.2 martin bus_dmamap_unload(exi_softc->sc_dmat, ch->ch_dmamap);
348 1.1.2.2 martin }
349