vireg.h revision 1.2.2.2
1 1.2.2.2 martin /* $NetBSD: vireg.h,v 1.2.2.2 2024/02/03 11:47:05 martin Exp $ */ 2 1.2.2.2 martin 3 1.2.2.2 martin /*- 4 1.2.2.2 martin * Copyright (c) 2024 Jared McNeill <jmcneill (at) invisible.ca> 5 1.2.2.2 martin * All rights reserved. 6 1.2.2.2 martin * 7 1.2.2.2 martin * Redistribution and use in source and binary forms, with or without 8 1.2.2.2 martin * modification, are permitted provided that the following conditions 9 1.2.2.2 martin * are met: 10 1.2.2.2 martin * 1. Redistributions of source code must retain the above copyright 11 1.2.2.2 martin * notice, this list of conditions and the following disclaimer. 12 1.2.2.2 martin * 2. Redistributions in binary form must reproduce the above copyright 13 1.2.2.2 martin * notice, this list of conditions and the following disclaimer in the 14 1.2.2.2 martin * documentation and/or other materials provided with the distribution. 15 1.2.2.2 martin * 16 1.2.2.2 martin * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.2.2.2 martin * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.2.2.2 martin * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.2.2.2 martin * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.2.2.2 martin * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.2.2.2 martin * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.2.2.2 martin * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.2.2.2 martin * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.2.2.2 martin * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.2.2.2 martin * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.2.2.2 martin * SUCH DAMAGE. 27 1.2.2.2 martin */ 28 1.2.2.2 martin 29 1.2.2.2 martin #ifndef _WII_DEV_VIREG_H 30 1.2.2.2 martin #define _WII_DEV_VIREG_H 31 1.2.2.2 martin 32 1.2.2.2 martin /* 33 1.2.2.2 martin * Nintendo Wii Video Interface (VI) registers, from 34 1.2.2.2 martin * https://www.gc-forever.com/yagcd/ 35 1.2.2.2 martin */ 36 1.2.2.2 martin 37 1.2.2.2 martin /* [2B] VTR - Vertical Timing Register */ 38 1.2.2.2 martin #define VI_VTR 0x00 39 1.2.2.2 martin #define VI_VTR_ACV __BITS(13,4) 40 1.2.2.2 martin #define VI_VTR_EQU __BITS(3,0) 41 1.2.2.2 martin 42 1.2.2.2 martin /* [2B] DCR - Display Configuration Register */ 43 1.2.2.2 martin #define VI_DCR 0x02 44 1.2.2.2 martin #define VI_DCR_FMT __BITS(9,8) 45 1.2.2.2 martin #define VI_DCR_FMT_NTSC 0 46 1.2.2.2 martin #define VI_DCR_FMT_PAL 1 47 1.2.2.2 martin #define VI_DCR_FMT_MPAL 2 48 1.2.2.2 martin #define VI_DCR_FMT_DEBUG 3 49 1.2.2.2 martin #define VI_DCR_LE1 __BITS(7,6) 50 1.2.2.2 martin #define VI_DCR_LE0 __BITS(5,4) 51 1.2.2.2 martin #define VI_DCR_DLR __BIT(3) 52 1.2.2.2 martin #define VI_DCR_NIN __BIT(2) 53 1.2.2.2 martin #define VI_DCR_RST __BIT(1) 54 1.2.2.2 martin #define VI_DCR_ENB __BIT(0) 55 1.2.2.2 martin 56 1.2.2.2 martin /* [4B] HTR0 - Horizontal Timing 0 */ 57 1.2.2.2 martin #define VI_HTR0 0x04 58 1.2.2.2 martin #define VI_HTR0_HCS __BITS(30,24) 59 1.2.2.2 martin #define VI_HTR0_HCE __BITS(22,16) 60 1.2.2.2 martin #define VI_HTR0_HLW __BITS(8,0) 61 1.2.2.2 martin 62 1.2.2.2 martin /* [4B] HTR1 - Horizontal Timing 1 */ 63 1.2.2.2 martin #define VI_HTR1 0x08 64 1.2.2.2 martin #define VI_HTR1_HBS __BITS(26,17) 65 1.2.2.2 martin #define VI_HTR1_HBE __BITS(16,7) 66 1.2.2.2 martin #define VI_HTR1_HSY __BITS(6,0) 67 1.2.2.2 martin 68 1.2.2.2 martin /* [4B] VTO - Odd Field Vertical Timing Register */ 69 1.2.2.2 martin #define VI_VTO 0x0c 70 1.2.2.2 martin #define VI_VTO_PSB __BITS(25,16) 71 1.2.2.2 martin #define VI_VTO_PRB __BITS(9,0) 72 1.2.2.2 martin 73 1.2.2.2 martin /* [4B] VTE - Even Field Vertical Timing Register */ 74 1.2.2.2 martin #define VI_VTE 0x10 75 1.2.2.2 martin #define VI_VTE_PSB __BITS(25,16) 76 1.2.2.2 martin #define VI_VTE_PRB __BITS(9,0) 77 1.2.2.2 martin 78 1.2.2.2 martin /* [4B] BBOI - Odd Field Burst Blanking Interval Register */ 79 1.2.2.2 martin #define VI_BBOI 0x14 80 1.2.2.2 martin #define VI_BBOI_BE3 __BITS(31,21) 81 1.2.2.2 martin #define VI_BBOI_BS3 __BITS(20,16) 82 1.2.2.2 martin #define VI_BBOI_BE1 __BITS(15,5) 83 1.2.2.2 martin #define VI_BBOI_BS1 __BITS(4,0) 84 1.2.2.2 martin 85 1.2.2.2 martin /* [4B] BBEI - Even Field Burst Blanking Interval Register */ 86 1.2.2.2 martin #define VI_BBEI 0x18 87 1.2.2.2 martin #define VI_BBEI_BE4 __BITS(31,21) 88 1.2.2.2 martin #define VI_BBEI_BS4 __BITS(20,16) 89 1.2.2.2 martin #define VI_BBEI_BE2 __BITS(15,5) 90 1.2.2.2 martin #define VI_BBEI_BS2 __BITS(4,0) 91 1.2.2.2 martin 92 1.2.2.2 martin /* [4B] TFBL - Top Field Base Register (L) */ 93 1.2.2.2 martin #define VI_TFBL 0x1c 94 1.2.2.2 martin #define VI_TFBL_PGOFF __BIT(28) 95 1.2.2.2 martin #define VI_TFBL_XOF __BITS(27,24) 96 1.2.2.2 martin #define VI_TFBL_FBB __BITS(23,0) 97 1.2.2.2 martin 98 1.2.2.2 martin /* [4B] TFBR - Top Field Base Register (R) */ 99 1.2.2.2 martin #define VI_TFBR 0x20 100 1.2.2.2 martin #define VI_TFBR_FBB __BITS(23,0) 101 1.2.2.2 martin 102 1.2.2.2 martin /* [4B] BFBL - Bottom Field Base Register (L) */ 103 1.2.2.2 martin #define VI_BFBL 0x24 104 1.2.2.2 martin #define VI_BFBL_PGOFF __BIT(28) 105 1.2.2.2 martin #define VI_BFBL_XOF __BITS(27,24) 106 1.2.2.2 martin #define VI_BFBL_FBB __BITS(23,0) 107 1.2.2.2 martin 108 1.2.2.2 martin /* [4B] BFBR - Bottom Field Base Register (R) */ 109 1.2.2.2 martin #define VI_BFBR 0x28 110 1.2.2.2 martin #define VI_BFBR_FBB __BITS(23,0) 111 1.2.2.2 martin 112 1.2.2.2 martin /* [2B] DPV - Current Vertical Position */ 113 1.2.2.2 martin #define VI_DPV 0x2c 114 1.2.2.2 martin #define VI_DPV_VCT __BITS(10,0) 115 1.2.2.2 martin 116 1.2.2.2 martin /* [2B] DPH - Current Horizontal Position */ 117 1.2.2.2 martin #define VI_DPH 0x2e 118 1.2.2.2 martin #define VI_DPH_HCT __BITS(10,0) 119 1.2.2.2 martin 120 1.2.2.2 martin /* [4B] DI[0-3] - Display Interrupt 0-3 */ 121 1.2.2.2 martin #define VI_DI0 0x30 122 1.2.2.2 martin #define VI_DI1 0x34 123 1.2.2.2 martin #define VI_DI2 0x38 124 1.2.2.2 martin #define VI_DI3 0x3c 125 1.2.2.2 martin #define VI_DI_INT __BIT(31) 126 1.2.2.2 martin #define VI_DI_ENB __BIT(28) 127 1.2.2.2 martin #define VI_DI_VCT __BITS(25,16) 128 1.2.2.2 martin #define VI_DI_HCT __BITS(9,0) 129 1.2.2.2 martin 130 1.2.2.2 martin /* [4B] DL[0-1] - Display Latch Register 0-1 */ 131 1.2.2.2 martin #define VI_DL0 0x40 132 1.2.2.2 martin #define VI_DL1 0x44 133 1.2.2.2 martin #define VI_DL_TRG __BIT(31) 134 1.2.2.2 martin #define VI_DL_VCT __BITS(26,16) 135 1.2.2.2 martin #define VI_DL_HCT __BITS(10,0) 136 1.2.2.2 martin 137 1.2.2.2 martin /* [2B] PICCONF - Picture Configuration Register */ 138 1.2.2.2 martin #define VI_PICCONF 0x48 139 1.2.2.2 martin #define VI_PICCONF_READS __BITS(15,8) 140 1.2.2.2 martin #define VI_PICCONF_STRIDES __BITS(7,0) 141 1.2.2.2 martin 142 1.2.2.2 martin /* [2B] HSR - Horizontal Scaling Register */ 143 1.2.2.2 martin #define VI_HSR 0x4a 144 1.2.2.2 martin #define VI_HSR_HS_EN __BIT(12) 145 1.2.2.2 martin #define VI_HSR_STP __BITS(8,0) 146 1.2.2.2 martin 147 1.2.2.2 martin /* [4B] FCT[0-6] - Filter Coefficient Table 0-6 */ 148 1.2.2.2 martin #define VI_FCT0 0x50 149 1.2.2.2 martin #define VI_FCT1 0x54 150 1.2.2.2 martin #define VI_FCT2 0x58 151 1.2.2.2 martin #define VI_FCT3 0x5c 152 1.2.2.2 martin #define VI_FCT4 0x60 153 1.2.2.2 martin #define VI_FCT5 0x64 154 1.2.2.2 martin 155 1.2.2.2 martin /* [4B] ??? */ 156 1.2.2.2 martin #define VI_UNKNOWN_68H 0x68 157 1.2.2.2 martin 158 1.2.2.2 martin /* [2B] VICLK - VI Clock Select Register */ 159 1.2.2.2 martin #define VI_VICLK 0x6c 160 1.2.2.2 martin #define VI_VICLK_SEL __BIT(0) 161 1.2.2.2 martin #define VI_VICLK_SEL_27MHZ 0 162 1.2.2.2 martin #define VI_VICLK_SEL_54MHZ 1 163 1.2.2.2 martin 164 1.2.2.2 martin /* [2B] VISEL - VI DTV Status Register */ 165 1.2.2.2 martin #define VI_VISEL 0x6e 166 1.2.2.2 martin #define VI_VISEL_SEL __BIT(2) 167 1.2.2.2 martin #define VI_VISEL_COMPONENT_CABLE __BIT(0) 168 1.2.2.2 martin 169 1.2.2.2 martin /* [2B] VI_HSCALINGW - Horizontal Scaling Width */ 170 1.2.2.2 martin #define VI_HSCALINGW 0x70 171 1.2.2.2 martin #define VI_HSCALINGW_WIDTH __BITS(9,0) 172 1.2.2.2 martin 173 1.2.2.2 martin /* [2B] HBE - Border HBE */ 174 1.2.2.2 martin #define VI_HBE 0x72 175 1.2.2.2 martin #define VI_HBE_BRDR_EN __BIT(15) 176 1.2.2.2 martin #define VI_HBE_HBE656 __BITS(9,0) 177 1.2.2.2 martin 178 1.2.2.2 martin /* [2B] HBS - Border HBS */ 179 1.2.2.2 martin #define VI_HBS 0x74 180 1.2.2.2 martin #define VI_HBS_HBS656 __BITS(9,0) 181 1.2.2.2 martin 182 1.2.2.2 martin /* [2B] ??? */ 183 1.2.2.2 martin #define VI_UNKNOWN_76H 0x76 184 1.2.2.2 martin 185 1.2.2.2 martin /* [4B] ??? */ 186 1.2.2.2 martin #define VI_UNKNOWN_78H 0x78 187 1.2.2.2 martin 188 1.2.2.2 martin /* [4B] ??? */ 189 1.2.2.2 martin #define VI_UNKNOWN_7CH 0x7c 190 1.2.2.2 martin 191 1.2.2.2 martin #endif /* !_WII_DEV_VIREG_H */ 192
Indexes created Mon Oct 20 20:10:13 GMT 2025