ap_ms104_sh4_intr.c revision 1.1.2.2
1 /* $NetBSD: ap_ms104_sh4_intr.c,v 1.1.2.2 2010/04/30 14:39:19 uebayasi Exp $ */ 2 3 /*- 4 * Copyright (c) 2009 NONAKA Kimihiro <nonaka (at) netbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: ap_ms104_sh4_intr.c,v 1.1.2.2 2010/04/30 14:39:19 uebayasi Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/malloc.h> 36 #include <sys/device.h> 37 38 #include <sh3/devreg.h> 39 #include <sh3/exception.h> 40 41 #include <machine/intr.h> 42 43 #include <evbsh3/ap_ms104_sh4/ap_ms104_sh4reg.h> 44 #include <evbsh3/ap_ms104_sh4/ap_ms104_sh4var.h> 45 46 #define _N_EXTINTR 16 47 48 struct intrhand { 49 int (*ih_fun)(void *); 50 void *ih_arg; 51 struct intrhand *ih_next; 52 int ih_enable; 53 int ih_level; 54 int ih_irq; 55 struct evcnt ih_evcnt; 56 }; 57 58 struct extintr_handler { 59 void *eih_func; 60 struct intrhand *eih_ih; 61 int eih_nih; 62 }; 63 static struct extintr_handler extintr_handler[_N_EXTINTR]; 64 65 static const char *extintr_names[_N_EXTINTR] = { 66 "irq0", "irq1", "irq2", "irq3", 67 "irq4", "irq5", "irq6", "irq7", 68 "irq8", "irq9", "irq10", "irq11", 69 "irq12", "irq13", "irq14", "irq15" 70 }; 71 72 static int fakeintr(void *arg); 73 static int extintr_intr_handler(void *arg); 74 75 void 76 extintr_init(void) 77 { 78 79 _reg_write_1(EXTINTR_MASK1, 0); 80 _reg_write_1(EXTINTR_MASK2, 0); 81 _reg_write_1(EXTINTR_MASK3, 0); 82 _reg_write_1(EXTINTR_MASK4, 0); 83 } 84 85 /*ARGSUSED*/ 86 static int 87 fakeintr(void *arg) 88 { 89 90 return 0; 91 } 92 93 void * 94 extintr_establish(int irq, int trigger, int level, 95 int (*ih_fun)(void *), void *ih_arg) 96 { 97 static struct intrhand fakehand = {fakeintr}; 98 struct extintr_handler *eih; 99 struct intrhand **p, *q, *ih; 100 const char *name; 101 int evtcode; 102 int s; 103 104 KDASSERT(irq >= 1 && irq <= 14); 105 106 ih = malloc(sizeof(*ih), M_DEVBUF, cold ? M_NOWAIT : M_WAITOK); 107 if (ih == NULL) 108 panic("intr_establish: can't malloc handler info"); 109 110 s = _cpu_intr_suspend(); 111 112 switch (level) { 113 default: 114 #if defined(DEBUG) 115 panic("extintr_establish: unknown level %d", level); 116 /*NOTREACHED*/ 117 #endif 118 case IPL_VM: 119 break; 120 } 121 122 eih = &extintr_handler[irq]; 123 if (eih->eih_func == NULL) { 124 evtcode = 0x200 + (irq << 5); 125 eih->eih_func = intc_intr_establish(evtcode, trigger, level, 126 extintr_intr_handler, eih); 127 } 128 129 /* 130 * Figure out where to put the handler. 131 * This is O(N^2), but we want to preserve the order, and N is 132 * generally small. 133 */ 134 for (p = &eih->eih_ih; (q = *p) != NULL; p = &q->ih_next) 135 continue; 136 137 /* 138 * Actually install a fake handler momentarily, since we might be doing 139 * this with interrupts enabled and don't want the real routine called 140 * until masking is set up. 141 */ 142 fakehand.ih_level = level; 143 *p = &fakehand; 144 145 /* 146 * Poke the real handler in now. 147 */ 148 memset(ih, 0, sizeof(*ih)); 149 ih->ih_fun = ih_fun; 150 ih->ih_arg = ih_arg; 151 ih->ih_next = NULL; 152 ih->ih_enable = 1; 153 ih->ih_level = level; 154 ih->ih_irq = irq; 155 name = extintr_names[irq]; 156 evcnt_attach_dynamic(&ih->ih_evcnt, EVCNT_TYPE_INTR, NULL, "ext", name); 157 *p = ih; 158 159 if (++eih->eih_nih == 1) { 160 uint8_t reg; 161 162 /* Unmask interrupt */ 163 switch (irq) { 164 case 1: case 2: 165 reg = _reg_read_1(EXTINTR_MASK4); 166 reg |= 1 << (2 - irq); 167 _reg_write_1(EXTINTR_MASK4, reg); 168 break; 169 170 case 3: case 4: case 5: case 6: 171 reg = _reg_read_1(EXTINTR_MASK3); 172 reg |= 1 << (6 - irq); 173 _reg_write_1(EXTINTR_MASK3, reg); 174 break; 175 176 case 7: case 8: case 9: case 10: 177 reg = _reg_read_1(EXTINTR_MASK2); 178 reg |= 1 << (10 - irq); 179 _reg_write_1(EXTINTR_MASK2, reg); 180 break; 181 182 case 11: case 12: case 13: case 14: 183 reg = _reg_read_1(EXTINTR_MASK1); 184 reg |= 1 << (14 - irq); 185 _reg_write_1(EXTINTR_MASK1, reg); 186 break; 187 188 default: 189 panic("unknown irq%d\n", irq); 190 /*NOTREACHED*/ 191 break; 192 } 193 } 194 195 splx(s); 196 197 return (ih); 198 } 199 200 void 201 extintr_disestablish(void *cookie) 202 { 203 struct intrhand *ih = (struct intrhand *)cookie; 204 struct intrhand **p, *q; 205 struct extintr_handler *eih; 206 int irq; 207 int s; 208 209 KDASSERT(ih != NULL); 210 211 s = _cpu_intr_suspend(); 212 213 irq = ih->ih_irq; 214 eih = &extintr_handler[irq]; 215 216 /* 217 * Remove the handler from the chain. 218 * This is O(n^2), too. 219 */ 220 for (p = &eih->eih_ih; (q = *p) != NULL && q != ih; p = &q->ih_next) 221 continue; 222 if (q == NULL) 223 panic("extintr_disestablish: handler not registered"); 224 225 *p = q->ih_next; 226 227 evcnt_detach(&ih->ih_evcnt); 228 229 free((void *)ih, M_DEVBUF); 230 231 if (--eih->eih_nih == 0) { 232 uint8_t reg; 233 234 intc_intr_disestablish(eih->eih_func); 235 eih->eih_func = NULL; 236 237 /* Mask interrupt */ 238 switch (irq) { 239 case 1: case 2: 240 reg = _reg_read_1(EXTINTR_MASK4); 241 reg &= ~(1 << (2 - irq)); 242 _reg_write_1(EXTINTR_MASK4, reg); 243 break; 244 245 case 3: case 4: case 5: case 6: 246 reg = _reg_read_1(EXTINTR_MASK3); 247 reg &= ~(1 << (6 - irq)); 248 _reg_write_1(EXTINTR_MASK3, reg); 249 break; 250 251 case 7: case 8: case 9: case 10: 252 reg = _reg_read_1(EXTINTR_MASK2); 253 reg &= ~(1 << (10 - irq)); 254 _reg_write_1(EXTINTR_MASK2, reg); 255 break; 256 257 case 11: case 12: case 13: case 14: 258 reg = _reg_read_1(EXTINTR_MASK1); 259 reg &= ~(1 << (14 - irq)); 260 _reg_write_1(EXTINTR_MASK1, reg); 261 break; 262 263 default: 264 panic("unknown irq%d\n", irq); 265 /*NOTREACHED*/ 266 break; 267 } 268 } 269 270 splx(s); 271 } 272 273 static int 274 extintr_intr_handler(void *arg) 275 { 276 struct extintr_handler *eih = arg; 277 struct intrhand *ih; 278 int r; 279 280 if (__predict_true(eih != NULL)) { 281 for (ih = eih->eih_ih; ih != NULL; ih = ih->ih_next) { 282 if (__predict_true(ih->ih_enable)) { 283 r = (*ih->ih_fun)(ih->ih_arg); 284 if (__predict_true(r != 0)) { 285 ih->ih_evcnt.ev_count++; 286 } 287 } 288 } 289 return 1; 290 } 291 return 0; 292 } 293
Indexes created Tue Oct 07 21:09:53 GMT 2025