locore.S revision 1.5
1 /* $NetBSD: locore.S,v 1.5 2002/05/09 12:34:21 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1997 5 * Charles M. Hannum. All rights reserved. 6 * Copyright (c) 1990 The Regents of the University of California. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to Berkeley by 10 * William Jolitz. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the University of 23 * California, Berkeley and its contributors. 24 * 4. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * @(#)locore.s 7.3 (Berkeley) 5/13/91 41 */ 42 43 #include "opt_cputype.h" 44 #include "opt_memsize.h" 45 #include "assym.h" 46 47 #if defined(SH3) && defined(SH4) 48 #error "evbsh3 port don't support SH3,SH4 common kernel." 49 #endif 50 51 #include <sh3/asm.h> 52 #include <sh3/exception.h> 53 #include <sh3/locore.h> 54 #include <sh3/mmu_sh3.h> 55 #include <sh3/mmu_sh4.h> 56 #include <sh3/cache_sh3.h> 57 #include <sh3/cache_sh4.h> 58 59 #define INIT_STACK \ 60 ((IOM_RAM_BEGIN + IOM_RAM_SIZE - 0x00001000) | 0x80000000) 61 62 NENTRY(start) 63 /* Set SP to initial position */ 64 mov.l XLtmpstk, r15 65 66 /* Mask all interrupt */ 67 __INTR_MASK(r0, r1) 68 69 /* Set Register Bank to Bank 0 */ 70 mov.l SR_init, r0 71 ldc r0, sr 72 73 /* MMU off */ 74 xor r0, r0 75 MOV (MMUCR, r2) 76 mov.l r0, @r2 77 78 bra start1 79 nop 80 .align 2 81 SR_init: .long 0x500000F0 82 REG_SYMBOL(MMUCR) 83 start1: 84 85 #ifdef ROMIMAGE 86 /* Initialize BUS State Control Regs. */ 87 mov.l _ROM_START, r3 88 mov.l XL_ram_start, r4 89 mov.l @r4, r4 90 sub r3, r4 91 /* Set Bus State Controler */ 92 mov.l XLInitializeBsc, r0 93 sub r4, r0 94 jsr @r0 95 nop 96 97 /* Move kernel image from ROM area to RAM area */ 98 mov.l ___end, r0 99 mov.l ___start, r1 100 mov.l _KERNBASE, r2 101 sub r2, r0 102 sub r2, r1 103 sub r1, r0 104 add #4, r0 /* size of bytes to be copied */ 105 shlr2 r0 /* number of long word */ 106 mov.l _ROM_START, r3 107 add r3, r1 /* src address */ 108 mov.l ___start, r3 109 sub r2, r3 110 mov.l XL_ram_start, r4 111 mov.l @r4, r4 112 add r4, r3 /* dest address */ 113 1: 114 mov.l @r1+, r4 115 mov.l r4, @r3 116 add #4, r3 117 dt r0 /* decrement and Test */ 118 bf 1b 119 /* kernel image copy end */ 120 121 mov.l LXstart_in_RAM, r0 122 jmp @r0 /* jump to RAM area */ 123 nop 124 125 .align 2 126 LXstart_in_RAM: 127 .long start_in_RAM 128 XL_ram_start: 129 .long _C_LABEL(ram_start) 130 #else /* ROMIMAGE */ 131 #ifndef DONT_INIT_BSC 132 /* Set Bus State Controler */ 133 mov.l XLInitializeBsc, r0 134 jsr @r0 135 nop 136 #endif /* !DONT_INIT_BSC */ 137 #endif /* ROMIMAGE */ 138 139 start_in_RAM: 140 mova 1f, r0 141 mov r0, r4 142 mov.l XLinitSH3, r0 143 jsr @r0 /* call initSH3() */ 144 nop 145 146 .align 2 147 1: 148 149 #ifdef SH4 150 /* CCR must be accessed from P2 area */ 151 mova cache_on, r0 152 mov r0, r5 153 mov.l XLtoP2, r1 154 add r1, r5 155 mova main_label, r0 156 mov r0, r2 157 MOV (CCR, r3) 158 mov.l XL_CCRVAL, r4 159 jmp @r5 160 nop 161 162 .align 2 163 cache_on: 164 mov.l r4, @r3 /* Write to CCR */ 165 nop 166 nop 167 nop 168 nop 169 nop 170 nop 171 nop 172 nop 173 jmp @r2 174 nop 175 176 .align 2 177 main_label: 178 #endif /* SH4 */ 179 mov.l XLmain, r0 180 jsr @r0 /* call main() */ 181 nop 182 183 .align 2 184 185 #ifndef DONT_INIT_BSC 186 XLInitializeBsc:.long _C_LABEL(InitializeBsc) 187 #endif /* DONT_INIT_BSC */ 188 ___start: .long start 189 ___etext: .long _etext 190 ___end: .long _end 191 XLtmpstk: .long INIT_STACK 192 _KERNBASE: .long 0x8c000000 193 _ROM_START: .long IOM_ROM_BEGIN 194 XLinitSH3: .long _C_LABEL(initSH3) 195 XLmain: .long _C_LABEL(main) 196 XLtoP2: .long 0x20000000 197 REG_SYMBOL(CCR) 198 #ifdef SH4 199 XL_CCRVAL: .long 0x0909 /* Operand cache ON */ 200 #endif /* SH4 */ 201 202 load_and_reset: 203 mov.l XL_start_address, r0 204 mov r0, r8 205 mov.l @r4+, r1 /* r1 = osimage size */ 206 mov.l @r4+, r2 /* r2 = check sum */ 207 shlr2 r1 /* r1 = osimage size in dword */ 208 1: 209 mov.l @r4+, r3 210 mov.l r3, @r0 211 add #4, r0 212 dt r1 213 bf 1b 214 215 jmp @r8 /* jump to start address */ 216 nop 217 218 .align 2 219 XL_start_address: 220 .long IOM_RAM_BEGIN + 0x00010000 221 load_and_reset_end: 222 223 ENTRY(XLoadAndReset) 224 __INTR_MASK(r0, r1) 225 /* copy trampoline code to RAM area top */ 226 mov.l XL_load_and_reset, r0 227 mov.l XL_load_and_reset_end, r1 228 mov.l XL_load_trampoline_addr, r2 229 mov r2, r8 230 sub r0, r1 /* r1 = bytes to be copied */ 231 1: mov.b @r0+, r3 232 mov.b r3, @r2 233 add #1, r2 234 dt r1 235 bf 1b 236 237 jmp @r8 /* jump to trampoline code */ 238 nop 239 240 .align 2 241 XL_load_trampoline_addr: 242 .long IOM_RAM_BEGIN + 0x00008000 243 XL_load_and_reset: 244 .long load_and_reset 245 XL_load_and_reset_end: 246 .long load_and_reset_end 247 .data 248 .align 2 249 .globl _C_LABEL(intrcnt), _C_LABEL(eintrcnt) 250 .globl _C_LABEL(intrnames), _C_LABEL(eintrnames) 251 _C_LABEL(intrcnt): 252 _C_LABEL(eintrcnt): 253 _C_LABEL(intrnames): 254 _C_LABEL(eintrnames): 255
Indexes created Sun Oct 19 16:10:00 GMT 2025