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locore.S revision 1.6
      1 /*	$NetBSD: locore.S,v 1.6 2003/08/07 16:27:24 agc Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1990 The Regents of the University of California.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to Berkeley by
      8  * William Jolitz.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. Neither the name of the University nor the names of its contributors
     19  *    may be used to endorse or promote products derived from this software
     20  *    without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  * SUCH DAMAGE.
     33  *
     34  *	@(#)locore.s	7.3 (Berkeley) 5/13/91
     35  */
     36 
     37 /*-
     38  * Copyright (c) 1993, 1994, 1995, 1997
     39  *	Charles M. Hannum.  All rights reserved.
     40  *
     41  * This code is derived from software contributed to Berkeley by
     42  * William Jolitz.
     43  *
     44  * Redistribution and use in source and binary forms, with or without
     45  * modification, are permitted provided that the following conditions
     46  * are met:
     47  * 1. Redistributions of source code must retain the above copyright
     48  *    notice, this list of conditions and the following disclaimer.
     49  * 2. Redistributions in binary form must reproduce the above copyright
     50  *    notice, this list of conditions and the following disclaimer in the
     51  *    documentation and/or other materials provided with the distribution.
     52  * 3. All advertising materials mentioning features or use of this software
     53  *    must display the following acknowledgement:
     54  *	This product includes software developed by the University of
     55  *	California, Berkeley and its contributors.
     56  * 4. Neither the name of the University nor the names of its contributors
     57  *    may be used to endorse or promote products derived from this software
     58  *    without specific prior written permission.
     59  *
     60  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     61  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     62  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     63  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     64  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     65  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     66  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     67  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     68  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     69  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     70  * SUCH DAMAGE.
     71  *
     72  *	@(#)locore.s	7.3 (Berkeley) 5/13/91
     73  */
     74 
     75 #include "opt_cputype.h"
     76 #include "opt_memsize.h"
     77 #include "assym.h"
     78 
     79 #if defined(SH3) && defined(SH4)
     80 #error "evbsh3 port don't support SH3,SH4 common kernel."
     81 #endif
     82 
     83 #include <sh3/asm.h>
     84 #include <sh3/exception.h>
     85 #include <sh3/locore.h>
     86 #include <sh3/mmu_sh3.h>
     87 #include <sh3/mmu_sh4.h>
     88 #include <sh3/cache_sh3.h>
     89 #include <sh3/cache_sh4.h>
     90 
     91 #define	INIT_STACK							\
     92 	((IOM_RAM_BEGIN + IOM_RAM_SIZE - 0x00001000) | 0x80000000)
     93 
     94 NENTRY(start)
     95 	/* Set SP to initial position */
     96 	mov.l	XLtmpstk, r15
     97 
     98 	/* Mask all interrupt */
     99 	__INTR_MASK(r0, r1)
    100 
    101 	/* Set Register Bank to Bank 0 */
    102 	mov.l	SR_init, r0
    103 	ldc	r0, sr
    104 
    105 	/* MMU off */
    106 	xor	r0, r0
    107 	MOV	(MMUCR, r2)
    108 	mov.l	r0, @r2
    109 
    110 	bra	start1
    111 	nop
    112 	.align	2
    113 SR_init:	.long	0x500000F0
    114 REG_SYMBOL(MMUCR)
    115 start1:
    116 
    117 #ifdef ROMIMAGE
    118 	/* Initialize BUS State Control Regs. */
    119 	mov.l	_ROM_START, r3
    120 	mov.l	XL_ram_start, r4
    121 	mov.l	@r4, r4
    122 	sub	r3, r4
    123 	/* Set Bus State Controler */
    124 	mov.l	XLInitializeBsc, r0
    125 	sub	r4, r0
    126 	jsr	@r0
    127 	nop
    128 
    129 	/* Move kernel image from ROM area to RAM area */
    130 	mov.l	___end, r0
    131 	mov.l	___start, r1
    132 	mov.l	_KERNBASE, r2
    133 	sub	r2, r0
    134 	sub	r2, r1
    135 	sub	r1, r0
    136 	add	#4, r0		/* size of bytes to be copied */
    137 	shlr2	r0		/* number of long word */
    138 	mov.l	_ROM_START, r3
    139 	add	r3, r1		/* src address */
    140 	mov.l	___start, r3
    141 	sub	r2, r3
    142 	mov.l	XL_ram_start, r4
    143 	mov.l	@r4, r4
    144 	add	r4, r3		/* dest address */
    145 1:
    146 	mov.l	@r1+, r4
    147 	mov.l	r4, @r3
    148 	add	#4, r3
    149 	dt	r0		/* decrement and Test */
    150 	bf	1b
    151 	/* kernel image copy end */
    152 
    153 	mov.l	LXstart_in_RAM, r0
    154 	jmp	@r0		/* jump to RAM area */
    155 	nop
    156 
    157 	.align	2
    158 LXstart_in_RAM:
    159 	.long	start_in_RAM
    160 XL_ram_start:
    161 	.long	_C_LABEL(ram_start)
    162 #else /* ROMIMAGE */
    163 #ifndef	DONT_INIT_BSC
    164 	/* Set Bus State Controler */
    165 	mov.l	XLInitializeBsc, r0
    166 	jsr	@r0
    167 	nop
    168 #endif /* !DONT_INIT_BSC */
    169 #endif /* ROMIMAGE */
    170 
    171 start_in_RAM:
    172 	mova	1f, r0
    173 	mov	r0, r4
    174 	mov.l	XLinitSH3, r0
    175 	jsr	@r0		/* call initSH3() */
    176 	nop
    177 
    178 	.align	2
    179 1:
    180 
    181 #ifdef SH4
    182 	/* CCR must be accessed from P2 area */
    183 	mova	cache_on, r0
    184 	mov	r0, r5
    185 	mov.l	XLtoP2, r1
    186 	add	r1, r5
    187 	mova	main_label, r0
    188 	mov	r0, r2
    189 	MOV	(CCR, r3)
    190 	mov.l	XL_CCRVAL, r4
    191 	jmp	@r5
    192 	nop
    193 
    194 	.align	2
    195 cache_on:
    196 	mov.l	r4, @r3 /* Write to CCR */
    197 	nop
    198 	nop
    199 	nop
    200 	nop
    201 	nop
    202 	nop
    203 	nop
    204 	nop
    205 	jmp @r2
    206 	nop
    207 
    208 	.align	2
    209 main_label:
    210 #endif /* SH4 */
    211 	mov.l	XLmain, r0
    212 	jsr	@r0		/* call main() */
    213 	nop
    214 
    215 		.align	2
    216 
    217 #ifndef	DONT_INIT_BSC
    218 XLInitializeBsc:.long	_C_LABEL(InitializeBsc)
    219 #endif /* DONT_INIT_BSC */
    220 ___start:	.long	start
    221 ___etext:	.long	_etext
    222 ___end:		.long	_end
    223 XLtmpstk:	.long	INIT_STACK
    224 _KERNBASE:	.long	0x8c000000
    225 _ROM_START:	.long	IOM_ROM_BEGIN
    226 XLinitSH3:	.long	_C_LABEL(initSH3)
    227 XLmain:		.long	_C_LABEL(main)
    228 XLtoP2:		.long	0x20000000
    229 REG_SYMBOL(CCR)
    230 #ifdef SH4
    231 XL_CCRVAL:	.long	0x0909 /* Operand cache ON */
    232 #endif /* SH4 */
    233 
    234 load_and_reset:
    235 	mov.l	XL_start_address, r0
    236 	mov	r0, r8
    237 	mov.l	@r4+, r1	/* r1 = osimage size */
    238 	mov.l	@r4+, r2	/* r2 = check sum */
    239 	shlr2	r1		/* r1 = osimage size in dword */
    240 1:
    241 	mov.l	@r4+, r3
    242 	mov.l	r3, @r0
    243 	add	#4, r0
    244 	dt	r1
    245 	bf	1b
    246 
    247 	jmp	@r8		/* jump to start address */
    248 	nop
    249 
    250 	.align	2
    251 XL_start_address:
    252 	.long	IOM_RAM_BEGIN + 0x00010000
    253 load_and_reset_end:
    254 
    255 ENTRY(XLoadAndReset)
    256 	__INTR_MASK(r0, r1)
    257 	/* copy trampoline code to RAM area top */
    258 	mov.l	XL_load_and_reset, r0
    259 	mov.l	XL_load_and_reset_end, r1
    260 	mov.l	XL_load_trampoline_addr, r2
    261 	mov	r2, r8
    262 	sub	r0, r1		/* r1 = bytes to be copied */
    263 1:	mov.b	@r0+, r3
    264 	mov.b	r3, @r2
    265 	add	#1, r2
    266 	dt	r1
    267 	bf	1b
    268 
    269 	jmp	@r8		/* jump to trampoline code */
    270 	nop
    271 
    272 	.align	2
    273 XL_load_trampoline_addr:
    274 	.long	IOM_RAM_BEGIN + 0x00008000
    275 XL_load_and_reset:
    276 	.long	load_and_reset
    277 XL_load_and_reset_end:
    278 	.long	load_and_reset_end
    279 	.data
    280 	.align	2
    281 	.globl	_C_LABEL(intrcnt), _C_LABEL(eintrcnt)
    282 	.globl	_C_LABEL(intrnames), _C_LABEL(eintrnames)
    283 _C_LABEL(intrcnt):
    284 _C_LABEL(eintrcnt):
    285 _C_LABEL(intrnames):
    286 _C_LABEL(eintrnames):
    287