bus_defs.h revision 1.1.54.1 1 /* $NetBSD: bus_defs.h,v 1.1.54.1 2020/04/13 08:03:49 martin Exp $ */
2
3 /*-
4 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
35 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 * 1. Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * 2. Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in the
44 * documentation and/or other materials provided with the distribution.
45 * 3. All advertising materials mentioning features or use of this software
46 * must display the following acknowledgement:
47 * This product includes software developed by Christopher G. Demetriou
48 * for the NetBSD Project.
49 * 4. The name of the author may not be used to endorse or promote products
50 * derived from this software without specific prior written permission
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 */
63
64 #ifndef _EVBSH3_BUS_DEFS_H_
65 #define _EVBSH3_BUS_DEFS_H_
66
67 #ifdef _KERNEL
68 /*
69 * Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled.
70 */
71 #if defined(DEBUG) && !defined(BUS_SPACE_DEBUG)
72 #define BUS_SPACE_DEBUG
73 #endif
74
75 #ifdef BUS_SPACE_DEBUG
76 #include <sys/systm.h> /* for printf() prototype */
77 /*
78 * Macros for checking the aligned-ness of pointers passed to bus
79 * space ops. Strict alignment is required by the Alpha architecture,
80 * and a trap will occur if unaligned access is performed. These
81 * may aid in the debugging of a broken device driver by displaying
82 * useful information about the problem.
83 */
84 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \
85 ((((u_long)(p)) & (sizeof(t)-1)) == 0)
86
87 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \
88 ({ \
89 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \
90 printf("%s 0x%lx not aligned to %lu bytes %s:%d\n", \
91 d, (u_long)(p), (u_long)sizeof(t), __FILE__, __LINE__); \
92 } \
93 (void) 0; \
94 })
95
96 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
97 #else
98 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) (void) 0
99 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
100 #endif /* BUS_SPACE_DEBUG */
101 #endif /* _KERNEL */
102
103 typedef u_long bus_addr_t;
104 typedef u_long bus_size_t;
105
106 #define PRIxBUSADDR "lx"
107 #define PRIxBUSSIZE "lx"
108 #define PRIuBUSSIZE "lu"
109
110 typedef struct _bus_space *bus_space_tag_t;
111 typedef u_long bus_space_handle_t;
112
113 #define PRIxBSH "lx"
114
115 struct _bus_space {
116 /* cookie */
117 void *bs_cookie;
118
119 /* mapping/unmapping */
120 int (*bs_map)(void *, bus_addr_t, bus_size_t,
121 int, bus_space_handle_t *);
122 void (*bs_unmap)(void *, bus_space_handle_t,
123 bus_size_t);
124 int (*bs_subregion)(void *, bus_space_handle_t,
125 bus_size_t, bus_size_t, bus_space_handle_t *);
126
127 /* allocation/deallocation */
128 int (*bs_alloc)(void *, bus_addr_t, bus_addr_t,
129 bus_size_t, bus_size_t, bus_size_t, int,
130 bus_addr_t *, bus_space_handle_t *);
131 void (*bs_free)(void *, bus_space_handle_t,
132 bus_size_t);
133
134 /* get kernel virtual address */
135 void * (*bs_vaddr)(void *, bus_space_handle_t);
136
137 /* read (single) */
138 uint8_t (*bs_r_1)(void *, bus_space_handle_t,
139 bus_size_t);
140 uint16_t (*bs_r_2)(void *, bus_space_handle_t,
141 bus_size_t);
142 uint32_t (*bs_r_4)(void *, bus_space_handle_t,
143 bus_size_t);
144 uint64_t (*bs_r_8)(void *, bus_space_handle_t,
145 bus_size_t);
146
147 /* read multiple */
148 void (*bs_rm_1)(void *, bus_space_handle_t,
149 bus_size_t, uint8_t *, bus_size_t);
150 void (*bs_rm_2)(void *, bus_space_handle_t,
151 bus_size_t, uint16_t *, bus_size_t);
152 void (*bs_rm_4)(void *, bus_space_handle_t,
153 bus_size_t, uint32_t *, bus_size_t);
154 void (*bs_rm_8)(void *, bus_space_handle_t,
155 bus_size_t, uint64_t *, bus_size_t);
156
157 /* read region */
158 void (*bs_rr_1)(void *, bus_space_handle_t,
159 bus_size_t, uint8_t *, bus_size_t);
160 void (*bs_rr_2)(void *, bus_space_handle_t,
161 bus_size_t, uint16_t *, bus_size_t);
162 void (*bs_rr_4)(void *, bus_space_handle_t,
163 bus_size_t, uint32_t *, bus_size_t);
164 void (*bs_rr_8)(void *, bus_space_handle_t,
165 bus_size_t, uint64_t *, bus_size_t);
166
167 /* read stream (single) */
168 uint8_t (*bs_rs_1)(void *, bus_space_handle_t,
169 bus_size_t);
170 uint16_t (*bs_rs_2)(void *, bus_space_handle_t,
171 bus_size_t);
172 uint32_t (*bs_rs_4)(void *, bus_space_handle_t,
173 bus_size_t);
174 uint64_t (*bs_rs_8)(void *, bus_space_handle_t,
175 bus_size_t);
176
177 /* read multiple stream */
178 void (*bs_rms_1)(void *, bus_space_handle_t,
179 bus_size_t, uint8_t *, bus_size_t);
180 void (*bs_rms_2)(void *, bus_space_handle_t,
181 bus_size_t, uint16_t *, bus_size_t);
182 void (*bs_rms_4)(void *, bus_space_handle_t,
183 bus_size_t, uint32_t *, bus_size_t);
184 void (*bs_rms_8)(void *, bus_space_handle_t,
185 bus_size_t, uint64_t *, bus_size_t);
186
187 /* read region stream */
188 void (*bs_rrs_1)(void *, bus_space_handle_t,
189 bus_size_t, uint8_t *, bus_size_t);
190 void (*bs_rrs_2)(void *, bus_space_handle_t,
191 bus_size_t, uint16_t *, bus_size_t);
192 void (*bs_rrs_4)(void *, bus_space_handle_t,
193 bus_size_t, uint32_t *, bus_size_t);
194 void (*bs_rrs_8)(void *, bus_space_handle_t,
195 bus_size_t, uint64_t *, bus_size_t);
196
197 /* write (single) */
198 void (*bs_w_1)(void *, bus_space_handle_t,
199 bus_size_t, uint8_t);
200 void (*bs_w_2)(void *, bus_space_handle_t,
201 bus_size_t, uint16_t);
202 void (*bs_w_4)(void *, bus_space_handle_t,
203 bus_size_t, uint32_t);
204 void (*bs_w_8)(void *, bus_space_handle_t,
205 bus_size_t, uint64_t);
206
207 /* write multiple */
208 void (*bs_wm_1)(void *, bus_space_handle_t,
209 bus_size_t, const uint8_t *, bus_size_t);
210 void (*bs_wm_2)(void *, bus_space_handle_t,
211 bus_size_t, const uint16_t *, bus_size_t);
212 void (*bs_wm_4)(void *, bus_space_handle_t,
213 bus_size_t, const uint32_t *, bus_size_t);
214 void (*bs_wm_8)(void *, bus_space_handle_t,
215 bus_size_t, const uint64_t *, bus_size_t);
216
217 /* write region */
218 void (*bs_wr_1)(void *, bus_space_handle_t,
219 bus_size_t, const uint8_t *, bus_size_t);
220 void (*bs_wr_2)(void *, bus_space_handle_t,
221 bus_size_t, const uint16_t *, bus_size_t);
222 void (*bs_wr_4)(void *, bus_space_handle_t,
223 bus_size_t, const uint32_t *, bus_size_t);
224 void (*bs_wr_8)(void *, bus_space_handle_t,
225 bus_size_t, const uint64_t *, bus_size_t);
226
227 /* write stream (single) */
228 void (*bs_ws_1)(void *, bus_space_handle_t,
229 bus_size_t, uint8_t);
230 void (*bs_ws_2)(void *, bus_space_handle_t,
231 bus_size_t, uint16_t);
232 void (*bs_ws_4)(void *, bus_space_handle_t,
233 bus_size_t, uint32_t);
234 void (*bs_ws_8)(void *, bus_space_handle_t,
235 bus_size_t, uint64_t);
236
237 /* write multiple stream */
238 void (*bs_wms_1)(void *, bus_space_handle_t,
239 bus_size_t, const uint8_t *, bus_size_t);
240 void (*bs_wms_2)(void *, bus_space_handle_t,
241 bus_size_t, const uint16_t *, bus_size_t);
242 void (*bs_wms_4)(void *, bus_space_handle_t,
243 bus_size_t, const uint32_t *, bus_size_t);
244 void (*bs_wms_8)(void *, bus_space_handle_t,
245 bus_size_t, const uint64_t *, bus_size_t);
246
247 /* write region stream */
248 void (*bs_wrs_1)(void *, bus_space_handle_t,
249 bus_size_t, const uint8_t *, bus_size_t);
250 void (*bs_wrs_2)(void *, bus_space_handle_t,
251 bus_size_t, const uint16_t *, bus_size_t);
252 void (*bs_wrs_4)(void *, bus_space_handle_t,
253 bus_size_t, const uint32_t *, bus_size_t);
254 void (*bs_wrs_8)(void *, bus_space_handle_t,
255 bus_size_t, const uint64_t *, bus_size_t);
256
257 /* set multiple */
258 void (*bs_sm_1)(void *, bus_space_handle_t,
259 bus_size_t, uint8_t, bus_size_t);
260 void (*bs_sm_2)(void *, bus_space_handle_t,
261 bus_size_t, uint16_t, bus_size_t);
262 void (*bs_sm_4)(void *, bus_space_handle_t,
263 bus_size_t, uint32_t, bus_size_t);
264 void (*bs_sm_8)(void *, bus_space_handle_t,
265 bus_size_t, uint64_t, bus_size_t);
266
267 /* set region */
268 void (*bs_sr_1)(void *, bus_space_handle_t,
269 bus_size_t, uint8_t, bus_size_t);
270 void (*bs_sr_2)(void *, bus_space_handle_t,
271 bus_size_t, uint16_t, bus_size_t);
272 void (*bs_sr_4)(void *, bus_space_handle_t,
273 bus_size_t, uint32_t, bus_size_t);
274 void (*bs_sr_8)(void *, bus_space_handle_t,
275 bus_size_t, uint64_t, bus_size_t);
276
277 /* copy */
278 void (*bs_c_1)(void *, bus_space_handle_t, bus_size_t,
279 bus_space_handle_t, bus_size_t, bus_size_t);
280 void (*bs_c_2)(void *, bus_space_handle_t, bus_size_t,
281 bus_space_handle_t, bus_size_t, bus_size_t);
282 void (*bs_c_4)(void *, bus_space_handle_t, bus_size_t,
283 bus_space_handle_t, bus_size_t, bus_size_t);
284 void (*bs_c_8)(void *, bus_space_handle_t, bus_size_t,
285 bus_space_handle_t, bus_size_t, bus_size_t);
286 };
287
288 #ifdef _KERNEL
289
290 extern struct _bus_space evbsh3_bus_space;
291
292 #endif /* _KERNEL */
293
294 #define BUS_SPACE_MAP_CACHEABLE 0x01
295 #define BUS_SPACE_MAP_LINEAR 0x02
296 #define BUS_SPACE_MAP_PREFETCHABLE 0x04
297
298 #ifdef _KERNEL
299
300 #define BUS_SPACE_BARRIER_READ 0x01
301 #define BUS_SPACE_BARRIER_WRITE 0x02
302
303 /*
304 * Bus stream operations--defined in terms of non-stream counterparts
305 */
306 #define __BUS_SPACE_HAS_STREAM_METHODS
307
308 #endif /* _KERNEL */
309
310 /*
311 * Flags used in various bus DMA methods.
312 */
313 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
314 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
315 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
316 #define BUS_DMA_COHERENT 0x004 /* map memory to not require sync */
317 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
318 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
319 #define BUS_DMA_BUS2 0x020
320 #define BUS_DMA_BUS3 0x040
321 #define BUS_DMA_BUS4 0x080
322 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
323 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
324 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
325
326 /* Forwards needed by prototypes below. */
327 struct mbuf;
328 struct uio;
329
330 /*
331 * Operations performed by bus_dmamap_sync().
332 */
333 #define BUS_DMASYNC_PREREAD 0x01
334 #define BUS_DMASYNC_POSTREAD 0x02
335 #define BUS_DMASYNC_PREWRITE 0x04
336 #define BUS_DMASYNC_POSTWRITE 0x08
337
338 typedef struct _bus_dma_tag *bus_dma_tag_t;
339 typedef struct _bus_dmamap *bus_dmamap_t;
340
341 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
342
343 /*
344 * bus_dma_segment_t
345 *
346 * Describes a single contiguous DMA transaction. Values
347 * are suitable for programming into DMA registers.
348 */
349 struct _bus_dma_segment {
350 bus_addr_t ds_addr; /* DMA address */
351 bus_size_t ds_len; /* length of transfer */
352
353 /* private section */
354 bus_addr_t _ds_vaddr; /* virtual address */
355 };
356 typedef struct _bus_dma_segment bus_dma_segment_t;
357
358 /*
359 * bus_dma_tag_t
360 *
361 * A machine-dependent opaque type describing the implementation of
362 * DMA for a given bus.
363 */
364
365 struct _bus_dma_tag {
366 void *_cookie; /* cookie used in the guts */
367
368 /*
369 * DMA mapping methods.
370 */
371 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
372 bus_size_t, bus_size_t, int, bus_dmamap_t *);
373 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
374 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
375 bus_size_t, struct proc *, int);
376 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
377 struct mbuf *, int);
378 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
379 struct uio *, int);
380 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
381 bus_dma_segment_t *, int, bus_size_t, int);
382 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
383 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
384 bus_addr_t, bus_size_t, int);
385
386 /*
387 * DMA memory utility functions.
388 */
389 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
390 bus_size_t, bus_dma_segment_t *, int, int *, int);
391 void (*_dmamem_free)(bus_dma_tag_t,
392 bus_dma_segment_t *, int);
393 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
394 int, size_t, void **, int);
395 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
396 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
397 int, off_t, int, int);
398 };
399
400 /*
401 * bus_dmamap_t
402 *
403 * Describes a DMA mapping.
404 */
405 struct _bus_dmamap {
406 /*
407 * PRIVATE MEMBERS: not for use my machine-independent code.
408 */
409 bus_size_t _dm_size; /* largest DMA transfer mappable */
410 int _dm_segcnt; /* number of segs this map can map */
411 bus_size_t _dm_maxsegsz; /* largest possible segment */
412 bus_size_t _dm_boundary; /* don't cross this */
413 int _dm_flags; /* misc. flags */
414
415 void *_dm_cookie; /* cookie for bus-specific functions */
416
417 /*
418 * PUBLIC MEMBERS: these are used by machine-independent code.
419 */
420 bus_size_t dm_mapsize; /* size of the mapping */
421 int dm_nsegs; /* # valid segments in mapping */
422 bus_dma_segment_t dm_segs[1]; /* segments; variable length */
423 };
424
425 #endif /* _EVBSH3_BUS_DEFS_H_ */
426