ssumci.c revision 1.1.2.2
1 1.1.2.2 uebayasi /* $NetBSD: ssumci.c,v 1.1.2.2 2010/04/30 14:39:21 uebayasi Exp $ */ 2 1.1.2.2 uebayasi 3 1.1.2.2 uebayasi /*- 4 1.1.2.2 uebayasi * Copyright (c) 2010 NONAKA Kimihiro <nonaka (at) netbsd.org> 5 1.1.2.2 uebayasi * All rights reserved. 6 1.1.2.2 uebayasi * 7 1.1.2.2 uebayasi * Redistribution and use in source and binary forms, with or without 8 1.1.2.2 uebayasi * modification, are permitted provided that the following conditions 9 1.1.2.2 uebayasi * are met: 10 1.1.2.2 uebayasi * 1. Redistributions of source code must retain the above copyright 11 1.1.2.2 uebayasi * notice, this list of conditions and the following disclaimer. 12 1.1.2.2 uebayasi * 2. Redistributions in binary form must reproduce the above copyright 13 1.1.2.2 uebayasi * notice, this list of conditions and the following disclaimer in the 14 1.1.2.2 uebayasi * documentation and/or other materials provided with the distribution. 15 1.1.2.2 uebayasi * 16 1.1.2.2 uebayasi * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 1.1.2.2 uebayasi * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 1.1.2.2 uebayasi * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 1.1.2.2 uebayasi * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 1.1.2.2 uebayasi * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 1.1.2.2 uebayasi * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 1.1.2.2 uebayasi * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 1.1.2.2 uebayasi * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 1.1.2.2 uebayasi * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.1.2.2 uebayasi * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.1.2.2 uebayasi * SUCH DAMAGE. 27 1.1.2.2 uebayasi */ 28 1.1.2.2 uebayasi 29 1.1.2.2 uebayasi /* 30 1.1.2.2 uebayasi * driver to access MMC/SD card 31 1.1.2.2 uebayasi */ 32 1.1.2.2 uebayasi 33 1.1.2.2 uebayasi #include <sys/cdefs.h> 34 1.1.2.2 uebayasi __KERNEL_RCSID(0, "$NetBSD: ssumci.c,v 1.1.2.2 2010/04/30 14:39:21 uebayasi Exp $"); 35 1.1.2.2 uebayasi 36 1.1.2.2 uebayasi #include <sys/param.h> 37 1.1.2.2 uebayasi #include <sys/device.h> 38 1.1.2.2 uebayasi #include <sys/systm.h> 39 1.1.2.2 uebayasi #include <sys/malloc.h> 40 1.1.2.2 uebayasi #include <sys/kernel.h> 41 1.1.2.2 uebayasi #include <sys/proc.h> 42 1.1.2.2 uebayasi #include <sys/bus.h> 43 1.1.2.2 uebayasi #include <sys/intr.h> 44 1.1.2.2 uebayasi 45 1.1.2.2 uebayasi #include <sh3/devreg.h> 46 1.1.2.2 uebayasi #include <sh3/pfcreg.h> 47 1.1.2.2 uebayasi #include <sh3/scireg.h> 48 1.1.2.2 uebayasi 49 1.1.2.2 uebayasi #include <dev/sdmmc/sdmmcvar.h> 50 1.1.2.2 uebayasi #include <dev/sdmmc/sdmmcchip.h> 51 1.1.2.2 uebayasi 52 1.1.2.2 uebayasi #include <machine/autoconf.h> 53 1.1.2.2 uebayasi 54 1.1.2.2 uebayasi #include <evbsh3/t_sh7706lan/t_sh7706lanvar.h> 55 1.1.2.2 uebayasi 56 1.1.2.2 uebayasi #ifdef SSUMCI_DEBUG 57 1.1.2.2 uebayasi int ssumci_debug = 1; 58 1.1.2.2 uebayasi #define DPRINTF(n,s) do { if ((n) <= ssumci_debug) printf s; } while (0) 59 1.1.2.2 uebayasi #else 60 1.1.2.2 uebayasi #define DPRINTF(n,s) do {} while (0) 61 1.1.2.2 uebayasi #endif 62 1.1.2.2 uebayasi 63 1.1.2.2 uebayasi static int ssumci_host_reset(sdmmc_chipset_handle_t); 64 1.1.2.2 uebayasi static uint32_t ssumci_host_ocr(sdmmc_chipset_handle_t); 65 1.1.2.2 uebayasi static int ssumci_host_maxblklen(sdmmc_chipset_handle_t); 66 1.1.2.2 uebayasi static int ssumci_card_detect(sdmmc_chipset_handle_t); 67 1.1.2.2 uebayasi static int ssumci_write_protect(sdmmc_chipset_handle_t); 68 1.1.2.2 uebayasi static int ssumci_bus_power(sdmmc_chipset_handle_t, uint32_t); 69 1.1.2.2 uebayasi static int ssumci_bus_clock(sdmmc_chipset_handle_t, int); 70 1.1.2.2 uebayasi static int ssumci_bus_width(sdmmc_chipset_handle_t, int); 71 1.1.2.2 uebayasi static void ssumci_exec_command(sdmmc_chipset_handle_t, 72 1.1.2.2 uebayasi struct sdmmc_command *); 73 1.1.2.2 uebayasi 74 1.1.2.2 uebayasi static struct sdmmc_chip_functions ssumci_chip_functions = { 75 1.1.2.2 uebayasi /* host controller reset */ 76 1.1.2.2 uebayasi .host_reset = ssumci_host_reset, 77 1.1.2.2 uebayasi 78 1.1.2.2 uebayasi /* host controller capabilities */ 79 1.1.2.2 uebayasi .host_ocr = ssumci_host_ocr, 80 1.1.2.2 uebayasi .host_maxblklen = ssumci_host_maxblklen, 81 1.1.2.2 uebayasi 82 1.1.2.2 uebayasi /* card detection */ 83 1.1.2.2 uebayasi .card_detect = ssumci_card_detect, 84 1.1.2.2 uebayasi 85 1.1.2.2 uebayasi /* write protect */ 86 1.1.2.2 uebayasi .write_protect = ssumci_write_protect, 87 1.1.2.2 uebayasi 88 1.1.2.2 uebayasi /* bus power, clock frequency, width */ 89 1.1.2.2 uebayasi .bus_power = ssumci_bus_power, 90 1.1.2.2 uebayasi .bus_clock = ssumci_bus_clock, 91 1.1.2.2 uebayasi .bus_width = ssumci_bus_width, 92 1.1.2.2 uebayasi 93 1.1.2.2 uebayasi /* command execution */ 94 1.1.2.2 uebayasi .exec_command = ssumci_exec_command, 95 1.1.2.2 uebayasi 96 1.1.2.2 uebayasi /* card interrupt */ 97 1.1.2.2 uebayasi .card_enable_intr = NULL, 98 1.1.2.2 uebayasi .card_intr_ack = NULL, 99 1.1.2.2 uebayasi }; 100 1.1.2.2 uebayasi 101 1.1.2.2 uebayasi static void ssumci_spi_initialize(sdmmc_chipset_handle_t); 102 1.1.2.2 uebayasi 103 1.1.2.2 uebayasi static struct sdmmc_spi_chip_functions ssumci_spi_chip_functions = { 104 1.1.2.2 uebayasi .initialize = ssumci_spi_initialize, 105 1.1.2.2 uebayasi }; 106 1.1.2.2 uebayasi 107 1.1.2.2 uebayasi #define CSR_SET_1(reg,set,mask) \ 108 1.1.2.2 uebayasi do { \ 109 1.1.2.2 uebayasi uint8_t _r; \ 110 1.1.2.2 uebayasi _r = _reg_read_1((reg)); \ 111 1.1.2.2 uebayasi _r &= ~(mask); \ 112 1.1.2.2 uebayasi _r |= (set); \ 113 1.1.2.2 uebayasi _reg_write_1((reg), _r); \ 114 1.1.2.2 uebayasi } while (/*CONSTCOND*/0) 115 1.1.2.2 uebayasi 116 1.1.2.2 uebayasi #define CSR_SET_2(reg,set,mask) \ 117 1.1.2.2 uebayasi do { \ 118 1.1.2.2 uebayasi uint16_t _r; \ 119 1.1.2.2 uebayasi _r = _reg_read_2((reg)); \ 120 1.1.2.2 uebayasi _r &= ~(mask); \ 121 1.1.2.2 uebayasi _r |= (set); \ 122 1.1.2.2 uebayasi _reg_write_2((reg), _r); \ 123 1.1.2.2 uebayasi } while (/*CONSTCOND*/0) 124 1.1.2.2 uebayasi 125 1.1.2.2 uebayasi #define CSR_CLR_1(reg,clr) \ 126 1.1.2.2 uebayasi do { \ 127 1.1.2.2 uebayasi uint8_t _r; \ 128 1.1.2.2 uebayasi _r = _reg_read_1((reg)); \ 129 1.1.2.2 uebayasi _r &= ~(clr); \ 130 1.1.2.2 uebayasi _reg_write_1((reg), _r); \ 131 1.1.2.2 uebayasi } while (/*CONSTCOND*/0) 132 1.1.2.2 uebayasi 133 1.1.2.2 uebayasi #define CSR_CLR_2(reg,clr) \ 134 1.1.2.2 uebayasi do { \ 135 1.1.2.2 uebayasi uint16_t _r; \ 136 1.1.2.2 uebayasi _r = _reg_read_2((reg)); \ 137 1.1.2.2 uebayasi _r &= ~(clr); \ 138 1.1.2.2 uebayasi _reg_write_2((reg), _r); \ 139 1.1.2.2 uebayasi } while (/*CONSTCOND*/0) 140 1.1.2.2 uebayasi 141 1.1.2.2 uebayasi #define SCPCR_CLK_MASK 0x000C 142 1.1.2.2 uebayasi #define SCPCR_CLK_IN 0x000C 143 1.1.2.2 uebayasi #define SCPCR_CLK_OUT 0x0004 144 1.1.2.2 uebayasi #define SCPDR_CLK 0x02 145 1.1.2.2 uebayasi #define SCPCR_DAT_MASK 0x0003 146 1.1.2.2 uebayasi #define SCPCR_DAT_IN 0x0003 147 1.1.2.2 uebayasi #define SCPCR_DAT_OUT 0x0001 148 1.1.2.2 uebayasi #define SCPDR_DAT 0x01 149 1.1.2.2 uebayasi #define SCPCR_CMD_MASK 0x0030 150 1.1.2.2 uebayasi #define SCPCR_CMD_IN 0x0030 151 1.1.2.2 uebayasi #define SCPCR_CMD_OUT 0x0010 152 1.1.2.2 uebayasi #define SCPDR_CMD 0x04 153 1.1.2.2 uebayasi #define SCPCR_CS_MASK 0x000C 154 1.1.2.2 uebayasi #define SCPCR_CS_OUT 0x0004 155 1.1.2.2 uebayasi #define SCPDR_CS 0x08 156 1.1.2.2 uebayasi #define SCPCR_EJECT 0x00C0 157 1.1.2.2 uebayasi #define SCPDR_EJECT 0x08 158 1.1.2.2 uebayasi 159 1.1.2.2 uebayasi #define MMC_TIME_OVER 20000 160 1.1.2.2 uebayasi 161 1.1.2.2 uebayasi struct ssumci_softc { 162 1.1.2.2 uebayasi device_t sc_dev; 163 1.1.2.2 uebayasi device_t sc_sdmmc; 164 1.1.2.2 uebayasi }; 165 1.1.2.2 uebayasi 166 1.1.2.2 uebayasi static int ssumci_match(device_t, cfdata_t, void *); 167 1.1.2.2 uebayasi static void ssumci_attach(device_t, device_t, void *); 168 1.1.2.2 uebayasi 169 1.1.2.2 uebayasi CFATTACH_DECL_NEW(ssumci, sizeof(struct ssumci_softc), 170 1.1.2.2 uebayasi ssumci_match, ssumci_attach, NULL, NULL); 171 1.1.2.2 uebayasi 172 1.1.2.2 uebayasi static void ssumci_cmd_cfgread(struct ssumci_softc *, struct sdmmc_command *); 173 1.1.2.2 uebayasi static void ssumci_cmd_read(struct ssumci_softc *, struct sdmmc_command *); 174 1.1.2.2 uebayasi static void ssumci_cmd_write(struct ssumci_softc *, struct sdmmc_command *); 175 1.1.2.2 uebayasi 176 1.1.2.2 uebayasi #define SSUMCI_SPIDR 0xb0008000 177 1.1.2.2 uebayasi #define SSUMCI_SPISR 0xb0008002 178 1.1.2.2 uebayasi #define SSUMCI_SPIBR 0xb0008004 179 1.1.2.2 uebayasi 180 1.1.2.2 uebayasi static inline void 181 1.1.2.2 uebayasi ssumci_wait(void) 182 1.1.2.2 uebayasi { 183 1.1.2.2 uebayasi 184 1.1.2.2 uebayasi while (_reg_read_1(SSUMCI_SPISR) == 0x00) 185 1.1.2.2 uebayasi continue; 186 1.1.2.2 uebayasi } 187 1.1.2.2 uebayasi 188 1.1.2.2 uebayasi static inline uint8_t 189 1.1.2.2 uebayasi ssumci_getc(void) 190 1.1.2.2 uebayasi { 191 1.1.2.2 uebayasi 192 1.1.2.2 uebayasi ssumci_wait(); 193 1.1.2.2 uebayasi return _reg_read_1(SSUMCI_SPIBR); 194 1.1.2.2 uebayasi } 195 1.1.2.2 uebayasi 196 1.1.2.2 uebayasi static inline void 197 1.1.2.2 uebayasi ssumci_putc(uint8_t v) 198 1.1.2.2 uebayasi { 199 1.1.2.2 uebayasi 200 1.1.2.2 uebayasi _reg_write_1(SSUMCI_SPIDR, v); 201 1.1.2.2 uebayasi ssumci_wait(); 202 1.1.2.2 uebayasi } 203 1.1.2.2 uebayasi 204 1.1.2.2 uebayasi /*ARGSUSED*/ 205 1.1.2.2 uebayasi static int 206 1.1.2.2 uebayasi ssumci_match(device_t parent, cfdata_t cf, void *aux) 207 1.1.2.2 uebayasi { 208 1.1.2.2 uebayasi struct mainbus_attach_args *maa = (struct mainbus_attach_args *)aux; 209 1.1.2.2 uebayasi 210 1.1.2.2 uebayasi if (strcmp(maa->ma_name, "ssumci") != 0) 211 1.1.2.2 uebayasi return 0; 212 1.1.2.2 uebayasi if (!IS_SH7706LSR) 213 1.1.2.2 uebayasi return 0; 214 1.1.2.2 uebayasi return 1; 215 1.1.2.2 uebayasi } 216 1.1.2.2 uebayasi 217 1.1.2.2 uebayasi /*ARGSUSED*/ 218 1.1.2.2 uebayasi static void 219 1.1.2.2 uebayasi ssumci_attach(device_t parent, device_t self, void *aux) 220 1.1.2.2 uebayasi { 221 1.1.2.2 uebayasi struct ssumci_softc *sc = device_private(self); 222 1.1.2.2 uebayasi struct sdmmcbus_attach_args saa; 223 1.1.2.2 uebayasi 224 1.1.2.2 uebayasi sc->sc_dev = self; 225 1.1.2.2 uebayasi 226 1.1.2.2 uebayasi aprint_naive("\n"); 227 1.1.2.2 uebayasi aprint_normal(": SPI MMC controller\n"); 228 1.1.2.2 uebayasi 229 1.1.2.2 uebayasi /* setup */ 230 1.1.2.2 uebayasi CSR_SET_2(SH7709_SCPCR, SCPCR_CS_OUT, SCPCR_CS_MASK); 231 1.1.2.2 uebayasi 232 1.1.2.2 uebayasi /* 233 1.1.2.2 uebayasi * Attach the generic SD/MMC bus driver. (The bus driver must 234 1.1.2.2 uebayasi * not invoke any chipset functions before it is attached.) 235 1.1.2.2 uebayasi */ 236 1.1.2.2 uebayasi memset(&saa, 0, sizeof(saa)); 237 1.1.2.2 uebayasi saa.saa_busname = "sdmmc"; 238 1.1.2.2 uebayasi saa.saa_sct = &ssumci_chip_functions; 239 1.1.2.2 uebayasi saa.saa_spi_sct = &ssumci_spi_chip_functions; 240 1.1.2.2 uebayasi saa.saa_sch = sc; 241 1.1.2.2 uebayasi saa.saa_clkmin = 400; 242 1.1.2.2 uebayasi saa.saa_clkmax = 400; 243 1.1.2.2 uebayasi saa.saa_caps = SMC_CAPS_SPI_MODE 244 1.1.2.2 uebayasi | SMC_CAPS_SINGLE_ONLY 245 1.1.2.2 uebayasi | SMC_CAPS_POLL_CARD_DET; 246 1.1.2.2 uebayasi 247 1.1.2.2 uebayasi sc->sc_sdmmc = config_found(sc->sc_dev, &saa, NULL); 248 1.1.2.2 uebayasi if (sc->sc_sdmmc == NULL) 249 1.1.2.2 uebayasi aprint_error_dev(sc->sc_dev, "couldn't attach bus\n"); 250 1.1.2.2 uebayasi } 251 1.1.2.2 uebayasi 252 1.1.2.2 uebayasi /* 253 1.1.2.2 uebayasi * Reset the host controller. Called during initialization, when 254 1.1.2.2 uebayasi * cards are removed, upon resume, and during error recovery. 255 1.1.2.2 uebayasi */ 256 1.1.2.2 uebayasi /*ARGSUSED*/ 257 1.1.2.2 uebayasi static int 258 1.1.2.2 uebayasi ssumci_host_reset(sdmmc_chipset_handle_t sch) 259 1.1.2.2 uebayasi { 260 1.1.2.2 uebayasi 261 1.1.2.2 uebayasi return 0; 262 1.1.2.2 uebayasi } 263 1.1.2.2 uebayasi 264 1.1.2.2 uebayasi /*ARGSUSED*/ 265 1.1.2.2 uebayasi static uint32_t 266 1.1.2.2 uebayasi ssumci_host_ocr(sdmmc_chipset_handle_t sch) 267 1.1.2.2 uebayasi { 268 1.1.2.2 uebayasi 269 1.1.2.2 uebayasi return MMC_OCR_3_2V_3_3V|MMC_OCR_3_3V_3_4V; 270 1.1.2.2 uebayasi } 271 1.1.2.2 uebayasi 272 1.1.2.2 uebayasi /*ARGSUSED*/ 273 1.1.2.2 uebayasi static int 274 1.1.2.2 uebayasi ssumci_host_maxblklen(sdmmc_chipset_handle_t sch) 275 1.1.2.2 uebayasi { 276 1.1.2.2 uebayasi 277 1.1.2.2 uebayasi return 512; 278 1.1.2.2 uebayasi } 279 1.1.2.2 uebayasi 280 1.1.2.2 uebayasi /*ARGSUSED*/ 281 1.1.2.2 uebayasi static int 282 1.1.2.2 uebayasi ssumci_card_detect(sdmmc_chipset_handle_t sch) 283 1.1.2.2 uebayasi { 284 1.1.2.2 uebayasi uint8_t reg; 285 1.1.2.2 uebayasi int s; 286 1.1.2.2 uebayasi 287 1.1.2.2 uebayasi s = splsdmmc(); 288 1.1.2.2 uebayasi CSR_SET_2(SH7709_SCPCR, SCPCR_EJECT, 0); 289 1.1.2.2 uebayasi reg = _reg_read_1(SH7709_SCPDR); 290 1.1.2.2 uebayasi splx(s); 291 1.1.2.2 uebayasi 292 1.1.2.2 uebayasi return !(reg & SCPDR_EJECT); 293 1.1.2.2 uebayasi } 294 1.1.2.2 uebayasi 295 1.1.2.2 uebayasi /*ARGSUSED*/ 296 1.1.2.2 uebayasi static int 297 1.1.2.2 uebayasi ssumci_write_protect(sdmmc_chipset_handle_t sch) 298 1.1.2.2 uebayasi { 299 1.1.2.2 uebayasi 300 1.1.2.2 uebayasi return 0; /* non-protect */ 301 1.1.2.2 uebayasi } 302 1.1.2.2 uebayasi 303 1.1.2.2 uebayasi /* 304 1.1.2.2 uebayasi * Set or change SD bus voltage and enable or disable SD bus power. 305 1.1.2.2 uebayasi * Return zero on success. 306 1.1.2.2 uebayasi */ 307 1.1.2.2 uebayasi /*ARGSUSED*/ 308 1.1.2.2 uebayasi static int 309 1.1.2.2 uebayasi ssumci_bus_power(sdmmc_chipset_handle_t sch, uint32_t ocr) 310 1.1.2.2 uebayasi { 311 1.1.2.2 uebayasi 312 1.1.2.2 uebayasi if ((ocr & (MMC_OCR_3_2V_3_3V|MMC_OCR_3_3V_3_4V)) == 0) 313 1.1.2.2 uebayasi return 1; 314 1.1.2.2 uebayasi 315 1.1.2.2 uebayasi /*XXX???*/ 316 1.1.2.2 uebayasi return 0; 317 1.1.2.2 uebayasi } 318 1.1.2.2 uebayasi 319 1.1.2.2 uebayasi /* 320 1.1.2.2 uebayasi * Set or change MMCLK frequency or disable the MMC clock. 321 1.1.2.2 uebayasi * Return zero on success. 322 1.1.2.2 uebayasi */ 323 1.1.2.2 uebayasi /*ARGSUSED*/ 324 1.1.2.2 uebayasi static int 325 1.1.2.2 uebayasi ssumci_bus_clock(sdmmc_chipset_handle_t sch, int freq) 326 1.1.2.2 uebayasi { 327 1.1.2.2 uebayasi 328 1.1.2.2 uebayasi return 0; 329 1.1.2.2 uebayasi } 330 1.1.2.2 uebayasi 331 1.1.2.2 uebayasi /*ARGSUSED*/ 332 1.1.2.2 uebayasi static int 333 1.1.2.2 uebayasi ssumci_bus_width(sdmmc_chipset_handle_t sch, int width) 334 1.1.2.2 uebayasi { 335 1.1.2.2 uebayasi 336 1.1.2.2 uebayasi if (width != 1) 337 1.1.2.2 uebayasi return 1; 338 1.1.2.2 uebayasi return 0; 339 1.1.2.2 uebayasi } 340 1.1.2.2 uebayasi 341 1.1.2.2 uebayasi /*ARGSUSED*/ 342 1.1.2.2 uebayasi static void 343 1.1.2.2 uebayasi ssumci_spi_initialize(sdmmc_chipset_handle_t sch) 344 1.1.2.2 uebayasi { 345 1.1.2.2 uebayasi int i, s; 346 1.1.2.2 uebayasi 347 1.1.2.2 uebayasi s = splsdmmc(); 348 1.1.2.2 uebayasi CSR_SET_1(SH7709_SCPDR, SCPDR_CS, 0); 349 1.1.2.2 uebayasi for (i = 0; i < 10; i++) { 350 1.1.2.2 uebayasi ssumci_putc(0xff); 351 1.1.2.2 uebayasi } 352 1.1.2.2 uebayasi CSR_CLR_1(SH7709_SCPDR, SCPDR_CS); 353 1.1.2.2 uebayasi splx(s); 354 1.1.2.2 uebayasi } 355 1.1.2.2 uebayasi 356 1.1.2.2 uebayasi static void 357 1.1.2.2 uebayasi ssumci_exec_command(sdmmc_chipset_handle_t sch, struct sdmmc_command *cmd) 358 1.1.2.2 uebayasi { 359 1.1.2.2 uebayasi struct ssumci_softc *sc = (struct ssumci_softc *)sch; 360 1.1.2.2 uebayasi uint16_t resp; 361 1.1.2.2 uebayasi int timo; 362 1.1.2.2 uebayasi int s; 363 1.1.2.2 uebayasi 364 1.1.2.2 uebayasi DPRINTF(1,("%s: start cmd %d arg=%#x data=%p dlen=%d flags=%#x\n", 365 1.1.2.2 uebayasi device_xname(sc->sc_dev), cmd->c_opcode, cmd->c_arg, cmd->c_data, 366 1.1.2.2 uebayasi cmd->c_datalen, cmd->c_flags)); 367 1.1.2.2 uebayasi 368 1.1.2.2 uebayasi s = splsdmmc(); 369 1.1.2.2 uebayasi 370 1.1.2.2 uebayasi ssumci_putc(0xff); 371 1.1.2.2 uebayasi ssumci_putc(0x40 | (cmd->c_opcode & 0x3f)); 372 1.1.2.2 uebayasi ssumci_putc((cmd->c_arg >> 24) & 0xff); 373 1.1.2.2 uebayasi ssumci_putc((cmd->c_arg >> 16) & 0xff); 374 1.1.2.2 uebayasi ssumci_putc((cmd->c_arg >> 8) & 0xff); 375 1.1.2.2 uebayasi ssumci_putc((cmd->c_arg >> 0) & 0xff); 376 1.1.2.2 uebayasi ssumci_putc((cmd->c_opcode == MMC_GO_IDLE_STATE) ? 0x95 : 377 1.1.2.2 uebayasi (cmd->c_opcode == SD_SEND_IF_COND) ? 0x87 : 0); /* CRC */ 378 1.1.2.2 uebayasi 379 1.1.2.2 uebayasi for (timo = MMC_TIME_OVER; timo > 0; timo--) { 380 1.1.2.2 uebayasi resp = ssumci_getc(); 381 1.1.2.2 uebayasi if (!(resp & 0x80) && timo <= (MMC_TIME_OVER - 2)) 382 1.1.2.2 uebayasi break; 383 1.1.2.2 uebayasi } 384 1.1.2.2 uebayasi if (timo == 0) { 385 1.1.2.2 uebayasi DPRINTF(1,(sc->sc_dev, "response timeout\n")); 386 1.1.2.2 uebayasi cmd->c_error = ETIMEDOUT; 387 1.1.2.2 uebayasi goto out; 388 1.1.2.2 uebayasi } 389 1.1.2.2 uebayasi 390 1.1.2.2 uebayasi if (ISSET(cmd->c_flags, SCF_RSP_SPI_S2)) { 391 1.1.2.2 uebayasi resp |= (uint16_t) ssumci_getc() << 8; 392 1.1.2.2 uebayasi } else if (ISSET(cmd->c_flags, SCF_RSP_SPI_B4)) { 393 1.1.2.2 uebayasi cmd->c_resp[1] = (uint32_t) ssumci_getc() << 24; 394 1.1.2.2 uebayasi cmd->c_resp[1] |= (uint32_t) ssumci_getc() << 16; 395 1.1.2.2 uebayasi cmd->c_resp[1] |= (uint32_t) ssumci_getc() << 8; 396 1.1.2.2 uebayasi cmd->c_resp[1] |= (uint32_t) ssumci_getc(); 397 1.1.2.2 uebayasi DPRINTF(1, ("R3 resp: %#x\n", cmd->c_resp[1])); 398 1.1.2.2 uebayasi } 399 1.1.2.2 uebayasi cmd->c_resp[0] = resp; 400 1.1.2.2 uebayasi if (resp != 0 && resp != R1_SPI_IDLE) { 401 1.1.2.2 uebayasi DPRINTF(1,("response error: %#x\n", resp)); 402 1.1.2.2 uebayasi cmd->c_error = EIO; 403 1.1.2.2 uebayasi goto out; 404 1.1.2.2 uebayasi } 405 1.1.2.2 uebayasi DPRINTF(1, ("R1 resp: %#x\n", resp)); 406 1.1.2.2 uebayasi 407 1.1.2.2 uebayasi if (cmd->c_datalen > 0) { 408 1.1.2.2 uebayasi if (ISSET(cmd->c_flags, SCF_CMD_READ)) { 409 1.1.2.2 uebayasi /* XXX: swap in this place? */ 410 1.1.2.2 uebayasi if (cmd->c_opcode == MMC_SEND_CID || 411 1.1.2.2 uebayasi cmd->c_opcode == MMC_SEND_CSD) { 412 1.1.2.2 uebayasi sdmmc_response res; 413 1.1.2.2 uebayasi uint32_t *p = cmd->c_data; 414 1.1.2.2 uebayasi 415 1.1.2.2 uebayasi ssumci_cmd_cfgread(sc, cmd); 416 1.1.2.2 uebayasi res[0] = be32toh(p[3]); 417 1.1.2.2 uebayasi res[1] = be32toh(p[2]); 418 1.1.2.2 uebayasi res[2] = be32toh(p[1]); 419 1.1.2.2 uebayasi res[3] = be32toh(p[0]); 420 1.1.2.2 uebayasi memcpy(p, &res, sizeof(res)); 421 1.1.2.2 uebayasi } else { 422 1.1.2.2 uebayasi ssumci_cmd_read(sc, cmd); 423 1.1.2.2 uebayasi } 424 1.1.2.2 uebayasi } else { 425 1.1.2.2 uebayasi ssumci_cmd_write(sc, cmd); 426 1.1.2.2 uebayasi } 427 1.1.2.2 uebayasi } else { 428 1.1.2.2 uebayasi ssumci_wait(); 429 1.1.2.2 uebayasi } 430 1.1.2.2 uebayasi 431 1.1.2.2 uebayasi out: 432 1.1.2.2 uebayasi SET(cmd->c_flags, SCF_ITSDONE); 433 1.1.2.2 uebayasi splx(s); 434 1.1.2.2 uebayasi 435 1.1.2.2 uebayasi DPRINTF(1,("%s: cmd %d done (flags=%#x error=%d)\n", 436 1.1.2.2 uebayasi device_xname(sc->sc_dev), cmd->c_opcode, cmd->c_flags, cmd->c_error)); 437 1.1.2.2 uebayasi } 438 1.1.2.2 uebayasi 439 1.1.2.2 uebayasi static void 440 1.1.2.2 uebayasi ssumci_cmd_cfgread(struct ssumci_softc *sc, struct sdmmc_command *cmd) 441 1.1.2.2 uebayasi { 442 1.1.2.2 uebayasi u_char *data = cmd->c_data; 443 1.1.2.2 uebayasi int timo; 444 1.1.2.2 uebayasi int c; 445 1.1.2.2 uebayasi int i; 446 1.1.2.2 uebayasi 447 1.1.2.2 uebayasi /* wait data token */ 448 1.1.2.2 uebayasi for (timo = MMC_TIME_OVER; timo > 0; timo--) { 449 1.1.2.2 uebayasi c = ssumci_getc(); 450 1.1.2.2 uebayasi if (c != 0xff) 451 1.1.2.2 uebayasi break; 452 1.1.2.2 uebayasi } 453 1.1.2.2 uebayasi if (timo == 0) { 454 1.1.2.2 uebayasi aprint_error_dev(sc->sc_dev, "cfg read timeout\n"); 455 1.1.2.2 uebayasi cmd->c_error = ETIMEDOUT; 456 1.1.2.2 uebayasi return; 457 1.1.2.2 uebayasi } 458 1.1.2.2 uebayasi if (c != 0xfe) { 459 1.1.2.2 uebayasi aprint_error_dev(sc->sc_dev, "cfg read error (data=%#x)\n", c); 460 1.1.2.2 uebayasi cmd->c_error = EIO; 461 1.1.2.2 uebayasi return; 462 1.1.2.2 uebayasi } 463 1.1.2.2 uebayasi 464 1.1.2.2 uebayasi /* data read */ 465 1.1.2.2 uebayasi data[0] = '\0'; /* XXXFIXME!!! */ 466 1.1.2.2 uebayasi for (i = 1 /* XXXFIXME!!!*/ ; i < cmd->c_datalen; i++) { 467 1.1.2.2 uebayasi data[i] = ssumci_getc(); 468 1.1.2.2 uebayasi } 469 1.1.2.2 uebayasi 470 1.1.2.2 uebayasi (void) ssumci_getc(); 471 1.1.2.2 uebayasi (void) ssumci_getc(); 472 1.1.2.2 uebayasi ssumci_wait(); 473 1.1.2.2 uebayasi 474 1.1.2.2 uebayasi #ifdef SSUMCI_DEBUG 475 1.1.2.2 uebayasi sdmmc_dump_data(NULL, cmd->c_data, cmd->c_datalen); 476 1.1.2.2 uebayasi #endif 477 1.1.2.2 uebayasi } 478 1.1.2.2 uebayasi 479 1.1.2.2 uebayasi static void 480 1.1.2.2 uebayasi ssumci_cmd_read(struct ssumci_softc *sc, struct sdmmc_command *cmd) 481 1.1.2.2 uebayasi { 482 1.1.2.2 uebayasi u_char *data = cmd->c_data; 483 1.1.2.2 uebayasi int timo; 484 1.1.2.2 uebayasi int c; 485 1.1.2.2 uebayasi int i; 486 1.1.2.2 uebayasi 487 1.1.2.2 uebayasi /* wait data token */ 488 1.1.2.2 uebayasi for (timo = MMC_TIME_OVER; timo > 0; timo--) { 489 1.1.2.2 uebayasi c = ssumci_getc(); 490 1.1.2.2 uebayasi if (c != 0xff) 491 1.1.2.2 uebayasi break; 492 1.1.2.2 uebayasi } 493 1.1.2.2 uebayasi if (timo == 0) { 494 1.1.2.2 uebayasi aprint_error_dev(sc->sc_dev, "read timeout\n"); 495 1.1.2.2 uebayasi cmd->c_error = ETIMEDOUT; 496 1.1.2.2 uebayasi return; 497 1.1.2.2 uebayasi } 498 1.1.2.2 uebayasi if (c != 0xfe) { 499 1.1.2.2 uebayasi aprint_error_dev(sc->sc_dev, "read error (data=%#x)\n", c); 500 1.1.2.2 uebayasi cmd->c_error = EIO; 501 1.1.2.2 uebayasi return; 502 1.1.2.2 uebayasi } 503 1.1.2.2 uebayasi 504 1.1.2.2 uebayasi /* data read */ 505 1.1.2.2 uebayasi for (i = 0; i < cmd->c_datalen; i++) { 506 1.1.2.2 uebayasi data[i] = ssumci_getc(); 507 1.1.2.2 uebayasi } 508 1.1.2.2 uebayasi 509 1.1.2.2 uebayasi /* ignore CRC */ 510 1.1.2.2 uebayasi (void) ssumci_getc(); 511 1.1.2.2 uebayasi (void) ssumci_getc(); 512 1.1.2.2 uebayasi ssumci_wait(); 513 1.1.2.2 uebayasi 514 1.1.2.2 uebayasi #ifdef SSUMCI_DEBUG 515 1.1.2.2 uebayasi sdmmc_dump_data(NULL, cmd->c_data, cmd->c_datalen); 516 1.1.2.2 uebayasi #endif 517 1.1.2.2 uebayasi } 518 1.1.2.2 uebayasi 519 1.1.2.2 uebayasi static void 520 1.1.2.2 uebayasi ssumci_cmd_write(struct ssumci_softc *sc, struct sdmmc_command *cmd) 521 1.1.2.2 uebayasi { 522 1.1.2.2 uebayasi u_char *data = cmd->c_data; 523 1.1.2.2 uebayasi int timo; 524 1.1.2.2 uebayasi int c; 525 1.1.2.2 uebayasi int i; 526 1.1.2.2 uebayasi 527 1.1.2.2 uebayasi ssumci_wait(); 528 1.1.2.2 uebayasi ssumci_putc(0xfe); 529 1.1.2.2 uebayasi 530 1.1.2.2 uebayasi /* data write */ 531 1.1.2.2 uebayasi for (i = 0; i < cmd->c_datalen; i++) { 532 1.1.2.2 uebayasi ssumci_putc(data[i]); 533 1.1.2.2 uebayasi } 534 1.1.2.2 uebayasi 535 1.1.2.2 uebayasi /* dummy CRC */ 536 1.1.2.2 uebayasi ssumci_putc(0); 537 1.1.2.2 uebayasi ssumci_putc(0); 538 1.1.2.2 uebayasi ssumci_putc(0xff); 539 1.1.2.2 uebayasi if ((_reg_read_1(SSUMCI_SPIDR) & 0x0f) != 5) { 540 1.1.2.2 uebayasi aprint_error_dev(sc->sc_dev, "write error\n"); 541 1.1.2.2 uebayasi cmd->c_error = EIO; 542 1.1.2.2 uebayasi return; 543 1.1.2.2 uebayasi } 544 1.1.2.2 uebayasi 545 1.1.2.2 uebayasi for (timo = 0x7fffffff; timo > 0; timo--) { 546 1.1.2.2 uebayasi ssumci_putc(0xff); 547 1.1.2.2 uebayasi c = _reg_read_1(SSUMCI_SPIDR); 548 1.1.2.2 uebayasi if (c == 0xff) 549 1.1.2.2 uebayasi break; 550 1.1.2.2 uebayasi } 551 1.1.2.2 uebayasi if (timo == 0) { 552 1.1.2.2 uebayasi aprint_error_dev(sc->sc_dev, "write timeout\n"); 553 1.1.2.2 uebayasi cmd->c_error = ETIMEDOUT; 554 1.1.2.2 uebayasi } 555 1.1.2.2 uebayasi } 556
Indexes created Tue Oct 14 11:09:46 GMT 2025