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intr.h revision 1.4.10.1 
      1 /*	$NetBSD: intr.h,v 1.4.10.1 2007/06/26 18:12:24 garbled Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2000, 2001, 2004 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *	This product includes software developed by the NetBSD
     21  *	Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 #ifndef _EWS4800MIPS_INTR_H_
     40 #define	_EWS4800MIPS_INTR_H_
     41 
     42 #include <sys/device.h>
     43 #include <sys/lock.h>
     44 #include <sys/queue.h>
     45 
     46 #define IPL_NONE	0	/* disable only this interrupt */
     47 #define IPL_SOFT	1	/* generic software interrupts (SI 0) */
     48 #define IPL_SOFTCLOCK	2	/* clock software interrupts (SI 0) */
     49 #define IPL_SOFTNET	3	/* network software interrupts (SI 1) */
     50 #define IPL_SOFTSERIAL	4	/* serial software interrupts (SI 1) */
     51 #define IPL_BIO		5	/* disable block I/O interrupts */
     52 #define IPL_NET		6	/* disable network interrupts */
     53 #define IPL_TTY		7	/* disable terminal interrupts */
     54 #define	IPL_LPT		IPL_TTY
     55 #define	IPL_VM		IPL_TTY
     56 #define IPL_SERIAL	7	/* disable serial interrupts */
     57 #define IPL_CLOCK	8	/* disable clock interrupts */
     58 #define	IPL_STATCLOCK	IPL_CLOCK
     59 #define	IPL_SCHED	IPL_CLOCK
     60 #define IPL_HIGH	8	/* disable all interrupts */
     61 #define	IPL_LOCK	IPL_HIGH
     62 
     63 #define _IPL_N		9
     64 
     65 #define _IPL_SI0_FIRST	IPL_SOFT
     66 #define _IPL_SI0_LAST	IPL_SOFTCLOCK
     67 
     68 #define _IPL_SI1_FIRST	IPL_SOFTNET
     69 #define _IPL_SI1_LAST	IPL_SOFTSERIAL
     70 
     71 #define	SI_SOFT		0
     72 #define	SI_SOFTCLOCK	1
     73 #define	SI_SOFTNET	2
     74 #define	SI_SOFTSERIAL	3
     75 
     76 #define	SI_NQUEUES	4
     77 
     78 #define	SI_QUEUENAMES {							\
     79 	"misc",								\
     80 	"clock",							\
     81 	"net",								\
     82 	"serial",							\
     83 }
     84 
     85 #define IST_UNUSABLE	-1	/* interrupt cannot be used */
     86 #define IST_NONE	0	/* none (dummy) */
     87 #define IST_PULSE	1	/* pulsed */
     88 #define IST_EDGE	2	/* edge-triggered */
     89 #define IST_LEVEL	3	/* level-triggered */
     90 
     91 #include <mips/locore.h>
     92 
     93 extern const uint32_t *ipl_sr_bits;
     94 
     95 #define spl0()		(void) _spllower(0)
     96 #define splx(s)		(void) _splset(s)
     97 
     98 typedef int ipl_t;
     99 typedef struct {
    100 	ipl_t _sr;
    101 } ipl_cookie_t;
    102 
    103 static inline ipl_cookie_t
    104 makeiplcookie(ipl_t ipl)
    105 {
    106 
    107 	return (ipl_cookie_t){._sr = ipl_sr_bits[ipl]};
    108 }
    109 
    110 static inline int
    111 splraiseipl(ipl_cookie_t icookie)
    112 {
    113 
    114 	return _splraise(icookie._sr);
    115 }
    116 
    117 #include <sys/spl.h>
    118 
    119 void intr_init(void);
    120 void intr_establish(int, int (*)(void *), void *);
    121 void intr_disestablish(void *);
    122 
    123 #include <mips/softintr.h>
    124 
    125 #endif /* !_EWS4800MIPS_INTR_H_ */
    126