sbd_tr2a.h revision 1.1
1 /* $NetBSD: sbd_tr2a.h,v 1.1 2005/12/29 15:20:09 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #ifndef _SBD_TR2A_PRIVATE 40 #error "Don't inlucde this file except for TR2A implemetation" 41 #endif /* !_SBD_TR2A_PRIVATE */ 42 43 #ifndef _EWS4800MIPS_SBD_TR2A_H_ 44 #define _EWS4800MIPS_SBD_TR2A_H_ 45 /* 46 * EWS4800/360 (TR2A) specific system board definition 47 */ 48 /* 49 * [interrupt overview] 50 * 51 * +-----+ 52 * | CPU | 53 * +--+--+ 54 * | 55 * +----+----+-+--+----+----+ 56 * INT5 INT4 INT3 INT2 INT1 INT0 57 * | | | | | | 58 * +-+----+----+----+----+----+-+ 59 * | INTC | 60 * | mask: 0xbe000008 | 61 * | status: 0xbe000004 | 62 * | clear: 0xbe000000 | +-------------------+ 63 * +-+----+----+----+----+----+-+ | APbus | 64 * | | | | +----+---------+Lo | 65 * CLOCK---+ | +----+---------+---------+Hi | 66 * 0xbe4a0008 | | | | | 67 * (0x80) +-+---------+---------+-+ +-------------------+ 68 * | ASObus | 69 * | mask: 0xbe40a00c | 70 * | status: 0xbe40a010 | 71 * | DMA int:0xbe408000 | 72 * +-+---------+---------+-+ 73 * | | | 74 * 0xbe440000 ZS-+ | | 75 * 0xbe480000 KBMS | | 76 * | | 77 * 0xbe500000 SCSI-A-------+ | 78 * 0xbe510000 SCSI-B-------+ | 79 * 0xbe400000 LANCE--------+ | 80 * | 81 * NMI-------------------------+ 82 * 83 * [INTC interrupt mask] 0xbe000008 84 * 0x80000000 INT5 85 * 0x04000000 INT4 86 * 0x00200000 INT3 87 * 0x00010000 INT2 88 * 0x00000800 INT1 89 * 0x00000020 INT0 90 * 91 * [ASObus interrupt mask] 0xbe40a00c 92 * TR2A 93 * 0x00800000 INT4 - 94 * 0x00400000 INT4 - 95 * 0x00300010 INT4 ZS 96 * 0x00000040 INT4 KBMS 97 * 0x00000020 INT4 - 98 * 0x00000100 INT2 simd2 A 99 * 0x00000200 INT2 simd2 B 100 * 0x00000001 INT2 limd2 101 * 0x00008000 INT0 NMI 102 * 0x00000008 INT0 - 103 * 0x00000004 INT0 - 104 * 0x00f0837d 0x00300351 105 */ 106 107 /* ROM */ 108 #define TR2A_ROM_FONT_ADDR 0xbfc0ec00 109 #define TR2A_SCSIROM_ADDR 0xbfc80000 110 #define TR2A_GAROM_ADDR 0xbfc82000 111 112 #define TR2A_ROM_KEYMAP_NORMAL ((uint8_t *)0xbfc39140) 113 #define TR2A_ROM_KEYMAP_SHIFTED ((uint8_t *)0xbfc38e40) 114 #define TR2A_ROM_KEYMAP_CONTROL ((uint8_t *)0xbfc38ec0) 115 #define TR2A_ROM_KEYMAP_CAPSLOCK ((uint8_t *)0xbfc39040) 116 117 /* System board I/O devices */ 118 #define TR2A_IOBASE_ADDR 0xbe000000 119 #define TR2A_LANCE_BASE 0xbe400000 /* Ether AM79C90 */ 120 #define TR2A_SIO_BASE 0xbe440000 /* SIO1 85230 */ 121 #define TR2A_KBMS_BASE 0xbe480000 /* SIO0 85230 */ 122 #define TR2A_NVSRAM_BASE 0xbe490000 /* NVSRAM */ 123 #define TR2A_SCSIA_BASE 0xbe500000 /* SCSI-A NCR53C710 */ 124 #define TR2A_SCSIB_BASE 0xbe510000 /* SCSI-B NCR53C710 */ 125 #if 0 126 #define TR2A_FDC_BASE 0xbe420000 127 #define TR2A_LPT_BASE 0xbe430000 128 #define TR2A_APBUS_INTC_MASK 0xbe806000 129 #define TR2A_VMECHK 0xbe000040 130 #define TR2A_CLK 0xbe000024 131 #endif 132 133 /* APbus */ 134 #define TR2A_APBUS_ADDR 0xe0000000 135 #define TR2A_APBUS_SIZE 0x18000000 136 137 /* NVSRAM */ 138 #define TR2A_NVSRAM_ADDR 0xbe490000 139 #define NVSRAM_SIGNATURE 0xbe490000 140 #define NVSRAM_MACHINEID 0xbe490010 141 #define NVSRAM_ETHERADDR 0xbe491008 142 #define NVSRAM_TF_PROGRESS 0xbe493010 143 #define NVSRAM_TF_ERROR 0xbe493028 144 #define NVSRAM_BOOTDEV ((uint8_t *)0xbe493030) 145 #define NVSRAM_CONSTYPE ((uint8_t *)0xbe4932a0) 146 #define NVSRAM_BOOTUNIT 0xbe493414 147 #define NVSRAM_SBDINIT_0 0xbe493450 148 #define NVSRAM_SBDINIT_1 0xbe493454 149 #define NVSRAM_SBDINIT_2 0xbe493458 150 #define NVSRAM_SBDINIT_3 0xbe49345c 151 152 /* Frame buffer */ 153 #define TR2A_GAFB_ADDR 0xf0000000 154 #define TR2A_GAFB_SIZE 0x04000000 155 #define TR2A_GAREG_ADDR 0xf5f00000 156 #define TR2A_GAREG_SIZE 0x00001000 157 158 #define SOFTRESET_REG ((volatile uint8_t *)0xba000004) 159 #define SOFTRESET_FLAG ((volatile uint32_t *)0xbe000064) 160 161 #define CLOCK_REG ((volatile uint8_t *)0xbe4a0008) 162 #define POWEROFF_REG ((volatile uint8_t *)0xbe4a0030) 163 #define LED_TF_REG ((volatile uint8_t *)0xbe4a0040) 164 #define LED_TF_ON 1 165 #define LED_TF_OFF 0 166 #define TF_ERROR_CODE ((volatile uint8_t *)0xbe4a0044) 167 #define BUZZER_REG ((volatile uint8_t *)0xbe4a0050) 168 169 /* Keyboard/Mouse Z85230 */ 170 #define KBD_STATUS ((volatile uint8_t *)0xbe480000) 171 #define KBD_DATA ((volatile uint8_t *)0xbe480004) 172 173 /* RTC */ 174 #define RTC_MK48T18_ADDR ((volatile uint8_t *)0xbe493fe0) 175 #define RTC_MK48T18_NVSRAM_ADDR 0xbe490000 176 177 /* INTC */ 178 #define INTC_CLEAR_REG ((volatile uint32_t *)0xbe000000) 179 #define INTC_STATUS_REG ((volatile uint32_t *)0xbe000004) 180 #define INTC_MASK_REG ((volatile uint32_t *)0xbe000008) 181 #define INTC_INT5 0x80000000 182 #define INTC_INT4 0x04000000 183 #define INTC_INT3 0x00200000 184 #define INTC_INT2 0x00010000 185 #define INTC_INT1 0x00000800 186 #define INTC_INT0 0x00000020 187 188 /* ASO */ 189 #define ASO_DMAINT_STATUS_REG ((volatile uint32_t *)0xbe408000) 190 #define ASO_INT_MASK_REG ((volatile uint32_t *)0xbe40a00c) 191 #define ASO_INT_STATUS_REG ((volatile uint32_t *)0xbe40a010) 192 193 #define TR2A_ASO_INTMASK_ALL 0x00f0837d 194 195 /* Graphic adapter */ 196 #include <machine/gareg.h> 197 198 #endif /* !_EWS4800MIPS_SBD_TR2_H_ */ 199
Indexes created Tue Sep 30 11:09:46 GMT 2025