sbdvar.h revision 1.1 1 /* $NetBSD: sbdvar.h,v 1.1 2005/12/29 15:20:09 tsutsui Exp $ */
2
3 /*-
4 * Copyright (c) 2004, 2005 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #ifndef _EWS4800MIPS_SBDVAR_H_
40 #define _EWS4800MIPS_SBDVAR_H_
41
42 #include <sys/kcore.h> /* phys_ram_seg_t */
43
44 #include <machine/autoconf.h> /* mainbus_attach_args */
45 #include <machine/vmparam.h> /* VM_PHYSSEG_MAX */
46 #include <machine/sbd.h> /* enum sbd_machine_type */
47 #include <machine/sbdiovar.h> /* sbdio_attach_args */
48
49 /* Software representation of system board */
50 struct sbd {
51 /* Machine identification */
52 enum sbd_machine_type machine;
53 char name[32];
54 int cpu_clock;
55
56 /* mainbus node table */
57 const char **mainbusdevs;
58
59 /* System Board I/O device table */
60 const struct sbdiodevdesc *sbdiodevs;
61
62 /* Memory */
63 phys_ram_seg_t mem_clseters[VM_PHYSSEG_MAX];
64 size_t mem_size; /* total size of memory */
65
66 void (*mem_init)(void *, void *);
67
68 /* Cache configuration (determine L2-cache size) */
69 void (*cache_config)(void);
70
71 /* Write buffer */
72 void (*wbflush)(void);
73
74 /* Interrupt services */
75 void (*intr_init)(void);
76 void *(*intr_establish)(int, int (*)(void *), void *);
77 void (*intr_disestablish)(void *);
78 void (*intr)(uint32_t, uint32_t, uint32_t, uint32_t);
79
80 /* Interval timer helper routines */
81 void (*initclocks)(void);
82 u_long (*readclock)(void);
83
84 /* Miscellaneous */
85 void (*consinit)(void);
86 int (*ipl_bootdev)(void);
87 void (*reboot)(void);
88 void (*poweroff)(void);
89 void (*ether_addr)(uint8_t *);
90 };
91
92 #define SBD_DECL(x) \
93 void x ## _cache_config(void); \
94 void x ## _wbflush(void); \
95 void x ## _mem_init(void *, void *); \
96 void x ## _intr_init(void); \
97 void * x ## _intr_establish(int, int (*)(void *), void *); \
98 void x ## _intr_disestablish(void *); \
99 void x ## _intr(uint32_t, uint32_t, uint32_t, uint32_t); \
100 void x ## _initclocks(void); \
101 u_long x ## _readclock(void); \
102 void x ## _consinit(void); \
103 int x ## _ipl_bootdev(void); \
104 void x ## _reboot(void); \
105 void x ## _poweroff(void); \
106 void x ## _ether_addr(uint8_t *); \
107 extern const uint32_t x ## _sr_bits[]
108
109 #define _SBD_OPS_SET(m, x) platform . x = m ## _ ## x
110
111 #define _SBD_OPS_REGISTER_ALL(m) \
112 _SBD_OPS_SET(m, cache_config); \
113 _SBD_OPS_SET(m, wbflush); \
114 _SBD_OPS_SET(m, mem_init); \
115 _SBD_OPS_SET(m, intr_init); \
116 _SBD_OPS_SET(m, intr_establish); \
117 _SBD_OPS_SET(m, intr_disestablish); \
118 _SBD_OPS_SET(m, intr); \
119 _SBD_OPS_SET(m, initclocks); \
120 _SBD_OPS_SET(m, readclock); \
121 _SBD_OPS_SET(m, consinit); \
122 _SBD_OPS_SET(m, ipl_bootdev); \
123 _SBD_OPS_SET(m, reboot); \
124 _SBD_OPS_SET(m, poweroff); \
125 _SBD_OPS_SET(m, ether_addr); \
126
127
128 extern struct sbd platform;
129
130 extern int mem_cluster_cnt;
131 extern phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
132
133 void sbd_init(void);
134 void sbd_set_mainfo(uint32_t);
135
136 void sbd_memcluster_init(uint32_t);
137 void sbd_memcluster_setup(void *, void *);
138 void sbd_memcluster_check(void);
139
140 void tr2_init(void);
141 void tr2a_init(void);
142
143 #endif /* !_EWS4800MIPS_SBDVAR_H_ */
144
145