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start.S revision 1.1
      1 /*	$NetBSD: start.S,v 1.1 2005/12/29 15:20:09 tsutsui Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2004 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by UCHIYAMA Yasushi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 #include <mips/regdef.h>
     40 
     41 	.set	noreorder
     42 	.set	mips3
     43 	.align	2
     44 	.text
     45 /*
     46  * Entry point.
     47  */
     48 	.globl	start
     49 start:
     50 	nop
     51 	nop
     52 	nop
     53 	nop
     54 	la	sp, _ftext
     55 
     56 	mfc0	t0, $12
     57 	lui	t1, 0x0040	/* BEV : use IPL's exception vector. */
     58 	and	t0, t0, t1
     59 	mtc0	t0, $12
     60 	nop
     61 	la	t0, main
     62 	move	a1, v0
     63 	jr	t0
     64 	 move	a2, v1		/* v1 = mainfo */
     65 1:	b	1b
     66 	 nop
     67 	/* NOTREACHED */
     68 
     69 #if 0 /* ROM putc test */
     70 	li	a0, 50		/* x-pos */
     71 2:	li	a2, 90		/* 'Z' */
     72 	lui	v0, 0xbfc0
     73 	ori	v0, 0xff60
     74 	li	a1, 50		/* y-pos */
     75 	jal	v0
     76 	 nop
     77 	b	2b
     78 	 addiu	a0, a0, 12
     79 	/* NOTREACHED */
     80 #endif
     81 #if 0 /* Frame buffer (TLB kseg2 mapped by IPL) test */
     82 	move	a3, zero
     83 	xori	a3, a3, 0x00
     84 3:	sll	v0, a3, 0x18
     85 	sra	a2, v0, 0x18
     86 	lui	a0, 0xf000
     87 	move	v1, zero
     88 	lui	a1, 0x1
     89 	ori	a1, a1, 0xffff
     90 2:	sb	a2, 0(a0)
     91 	addiu	v1, v1, 1
     92 	slt	v0, a1, v1
     93 	addiu	a0, a0, 1
     94 	beqz	v0, 2b
     95 	 nop
     96 	xori	a3, a3, 0xff
     97 	j	3b
     98 	 nop
     99 	/* NOTREACHED */
    100 #endif
    101 
    102 /*
    103  * void tlb_read(int index, void *)
    104  */
    105 	.global	tlb_read
    106 	.ent	tlb_read
    107 tlb_read:
    108 	mtc0	a0, $0		/* Index Register */
    109 	nop; nop; nop; nop;
    110 	tlbr
    111 	nop; nop; nop; nop;
    112 	mfc0	t0, $5		/* PageMask */
    113 	nop; nop; nop; nop;
    114 	mfc0	t1, $10		/* EntryHi */
    115 	nop; nop; nop; nop;
    116 	mfc0	t2, $2		/* EntryLo0 */
    117 	nop; nop; nop; nop;
    118 	mfc0	t3, $3		/* EntryLo1 */
    119 	nop; nop; nop; nop;
    120 	sw	t0,  0(a1)
    121 	sw	t1,  4(a1)
    122 	sw	t2,  8(a1)
    123 	sw	t3, 12(a1)
    124 	jr	ra
    125 	 nop
    126 	.end	tlb_read
    127