start.S revision 1.1.76.1 1 /* $NetBSD: start.S,v 1.1.76.1 2008/06/02 13:22:06 mjf Exp $ */
2
3 /*-
4 * Copyright (c) 2004 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <mips/regdef.h>
33
34 .set noreorder
35 .set mips3
36 .align 2
37 .text
38 /*
39 * Entry point.
40 */
41 .globl start
42 start:
43 nop
44 nop
45 nop
46 nop
47 la sp, _ftext
48
49 mfc0 t0, $12
50 lui t1, 0x0040 /* BEV : use IPL's exception vector. */
51 and t0, t0, t1
52 mtc0 t0, $12
53 nop
54 la t0, main
55 move a1, v0
56 jr t0
57 move a2, v1 /* v1 = mainfo */
58 1: b 1b
59 nop
60 /* NOTREACHED */
61
62 #if 0 /* ROM putc test */
63 li a0, 50 /* x-pos */
64 2: li a2, 90 /* 'Z' */
65 lui v0, 0xbfc0
66 ori v0, 0xff60
67 li a1, 50 /* y-pos */
68 jal v0
69 nop
70 b 2b
71 addiu a0, a0, 12
72 /* NOTREACHED */
73 #endif
74 #if 0 /* Frame buffer (TLB kseg2 mapped by IPL) test */
75 move a3, zero
76 xori a3, a3, 0x00
77 3: sll v0, a3, 0x18
78 sra a2, v0, 0x18
79 lui a0, 0xf000
80 move v1, zero
81 lui a1, 0x1
82 ori a1, a1, 0xffff
83 2: sb a2, 0(a0)
84 addiu v1, v1, 1
85 slt v0, a1, v1
86 addiu a0, a0, 1
87 beqz v0, 2b
88 nop
89 xori a3, a3, 0xff
90 j 3b
91 nop
92 /* NOTREACHED */
93 #endif
94
95 /*
96 * void tlb_read(int index, void *)
97 */
98 .global tlb_read
99 .ent tlb_read
100 tlb_read:
101 mtc0 a0, $0 /* Index Register */
102 nop; nop; nop; nop;
103 tlbr
104 nop; nop; nop; nop;
105 mfc0 t0, $5 /* PageMask */
106 nop; nop; nop; nop;
107 mfc0 t1, $10 /* EntryHi */
108 nop; nop; nop; nop;
109 mfc0 t2, $2 /* EntryLo0 */
110 nop; nop; nop; nop;
111 mfc0 t3, $3 /* EntryLo1 */
112 nop; nop; nop; nop;
113 sw t0, 0(a1)
114 sw t1, 4(a1)
115 sw t2, 8(a1)
116 sw t3, 12(a1)
117 jr ra
118 nop
119 .end tlb_read
120