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dcm.c revision 1.11
      1   1.1      cgd /*
      2   1.1      cgd  * Copyright (c) 1988 University of Utah.
      3   1.1      cgd  * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
      4   1.1      cgd  * All rights reserved.
      5   1.1      cgd  *
      6   1.1      cgd  * This code is derived from software contributed to Berkeley by
      7   1.1      cgd  * the Systems Programming Group of the University of Utah Computer
      8   1.1      cgd  * Science Department.
      9   1.1      cgd  *
     10   1.1      cgd  * Redistribution and use in source and binary forms, with or without
     11   1.1      cgd  * modification, are permitted provided that the following conditions
     12   1.1      cgd  * are met:
     13   1.1      cgd  * 1. Redistributions of source code must retain the above copyright
     14   1.1      cgd  *    notice, this list of conditions and the following disclaimer.
     15   1.1      cgd  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1      cgd  *    notice, this list of conditions and the following disclaimer in the
     17   1.1      cgd  *    documentation and/or other materials provided with the distribution.
     18   1.1      cgd  * 3. All advertising materials mentioning features or use of this software
     19   1.1      cgd  *    must display the following acknowledgement:
     20   1.1      cgd  *	This product includes software developed by the University of
     21   1.1      cgd  *	California, Berkeley and its contributors.
     22   1.1      cgd  * 4. Neither the name of the University nor the names of its contributors
     23   1.1      cgd  *    may be used to endorse or promote products derived from this software
     24   1.1      cgd  *    without specific prior written permission.
     25   1.1      cgd  *
     26   1.1      cgd  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     27   1.1      cgd  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     28   1.1      cgd  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     29   1.1      cgd  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     30   1.1      cgd  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     31   1.1      cgd  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     32   1.1      cgd  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     33   1.1      cgd  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     34   1.1      cgd  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     35   1.1      cgd  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     36   1.1      cgd  * SUCH DAMAGE.
     37   1.1      cgd  *
     38   1.8  mycroft  *	from: Utah Hdr: dcm.c 1.26 91/01/21
     39   1.2      cgd  *	from: @(#)dcm.c	7.14 (Berkeley) 6/27/91
     40  1.11  mycroft  *	$Id: dcm.c,v 1.11 1994/02/06 00:44:34 mycroft Exp $
     41   1.1      cgd  */
     42   1.1      cgd 
     43   1.1      cgd /*
     44   1.1      cgd  * TODO:
     45   1.1      cgd  *	Timeouts
     46   1.1      cgd  *	Test console support.
     47   1.1      cgd  */
     48   1.1      cgd 
     49   1.1      cgd #include "dcm.h"
     50   1.1      cgd #if NDCM > 0
     51   1.1      cgd /*
     52   1.1      cgd  *  98642/MUX
     53   1.1      cgd  */
     54   1.1      cgd #include "sys/param.h"
     55   1.1      cgd #include "sys/systm.h"
     56   1.1      cgd #include "sys/ioctl.h"
     57   1.1      cgd #include "sys/tty.h"
     58   1.1      cgd #include "sys/proc.h"
     59   1.1      cgd #include "sys/conf.h"
     60   1.1      cgd #include "sys/file.h"
     61   1.1      cgd #include "sys/uio.h"
     62   1.1      cgd #include "sys/kernel.h"
     63   1.1      cgd #include "sys/syslog.h"
     64   1.1      cgd #include "sys/time.h"
     65   1.1      cgd 
     66   1.1      cgd #include "device.h"
     67   1.1      cgd #include "dcmreg.h"
     68   1.1      cgd #include "machine/cpu.h"
     69   1.1      cgd #include "../hp300/isr.h"
     70   1.1      cgd 
     71   1.1      cgd #ifndef DEFAULT_BAUD_RATE
     72   1.1      cgd #define DEFAULT_BAUD_RATE 9600
     73   1.1      cgd #endif
     74   1.1      cgd 
     75   1.9  deraadt int	dcmprobe(), dcmintr(), dcmparam();
     76   1.9  deraadt void	dcmstart();
     77   1.1      cgd 
     78   1.1      cgd struct	driver dcmdriver = {
     79   1.1      cgd 	dcmprobe, "dcm",
     80   1.1      cgd };
     81   1.1      cgd 
     82   1.1      cgd #define NDCMLINE (NDCM*4)
     83   1.1      cgd 
     84   1.4  deraadt struct	tty *dcm_tty[NDCMLINE];
     85   1.1      cgd struct	modemreg *dcm_modem[NDCMLINE];
     86   1.1      cgd char	mcndlast[NDCMLINE];	/* XXX last modem status for line */
     87   1.1      cgd int	ndcm = NDCMLINE;
     88   1.1      cgd 
     89   1.1      cgd int	dcm_active;
     90   1.1      cgd int	dcmsoftCAR[NDCM];
     91   1.1      cgd struct	dcmdevice *dcm_addr[NDCM];
     92   1.1      cgd struct	isr dcmisr[NDCM];
     93   1.1      cgd 
     94   1.1      cgd struct speedtab dcmspeedtab[] = {
     95   1.1      cgd 	0,	BR_0,
     96   1.1      cgd 	50,	BR_50,
     97   1.1      cgd 	75,	BR_75,
     98   1.1      cgd 	110,	BR_110,
     99   1.1      cgd 	134,	BR_134,
    100   1.1      cgd 	150,	BR_150,
    101   1.1      cgd 	300,	BR_300,
    102   1.1      cgd 	600,	BR_600,
    103   1.1      cgd 	1200,	BR_1200,
    104   1.1      cgd 	1800,	BR_1800,
    105   1.1      cgd 	2400,	BR_2400,
    106   1.1      cgd 	4800,	BR_4800,
    107   1.1      cgd 	9600,	BR_9600,
    108   1.1      cgd 	19200,	BR_19200,
    109   1.1      cgd 	38400,	BR_38400,
    110   1.1      cgd 	-1,	-1
    111   1.1      cgd };
    112   1.1      cgd 
    113   1.1      cgd /* u-sec per character based on baudrate (assumes 1 start/8 data/1 stop bit) */
    114   1.1      cgd #define	DCM_USPERCH(s)	(10000000 / (s))
    115   1.1      cgd 
    116   1.1      cgd /*
    117   1.1      cgd  * Per board interrupt scheme.  16.7ms is the polling interrupt rate
    118   1.1      cgd  * (16.7ms is about 550 baud, 38.4k is 72 chars in 16.7ms).
    119   1.1      cgd  */
    120   1.1      cgd #define DIS_TIMER	0
    121   1.1      cgd #define DIS_PERCHAR	1
    122   1.1      cgd #define DIS_RESET	2
    123   1.1      cgd 
    124   1.1      cgd int	dcmistype = -1;		/* -1 == dynamic, 0 == timer, 1 == perchar */
    125   1.1      cgd int     dcminterval = 5;	/* interval (secs) between checks */
    126   1.1      cgd struct	dcmischeme {
    127   1.1      cgd 	int	dis_perchar;	/* non-zero if interrupting per char */
    128   1.1      cgd 	long	dis_time;	/* last time examined */
    129   1.1      cgd 	int	dis_intr;	/* recv interrupts during last interval */
    130   1.1      cgd 	int	dis_char;	/* characters read during last interval */
    131   1.1      cgd } dcmischeme[NDCM];
    132   1.1      cgd 
    133   1.1      cgd /*
    134   1.1      cgd  * Console support
    135   1.1      cgd  */
    136   1.1      cgd #ifdef DCMCONSOLE
    137   1.1      cgd int	dcmconsole = DCMCONSOLE;
    138   1.1      cgd #else
    139   1.1      cgd int	dcmconsole = -1;
    140   1.1      cgd #endif
    141   1.1      cgd int	dcmconsinit;
    142   1.1      cgd int	dcmdefaultrate = DEFAULT_BAUD_RATE;
    143   1.1      cgd int	dcmconbrdbusy = 0;
    144   1.1      cgd int	dcmmajor;
    145   1.1      cgd extern	struct tty *constty;
    146   1.1      cgd 
    147   1.1      cgd #ifdef KGDB
    148   1.1      cgd /*
    149   1.1      cgd  * Kernel GDB support
    150   1.1      cgd  */
    151   1.1      cgd #include "machine/remote-sl.h"
    152   1.1      cgd 
    153   1.1      cgd extern dev_t kgdb_dev;
    154   1.1      cgd extern int kgdb_rate;
    155   1.1      cgd extern int kgdb_debug_init;
    156   1.1      cgd #endif
    157   1.1      cgd 
    158   1.1      cgd /* #define IOSTATS */
    159   1.1      cgd 
    160   1.1      cgd #ifdef DEBUG
    161   1.1      cgd int	dcmdebug = 0x0;
    162   1.1      cgd #define DDB_SIOERR	0x01
    163   1.1      cgd #define DDB_PARAM	0x02
    164   1.1      cgd #define DDB_INPUT	0x04
    165   1.1      cgd #define DDB_OUTPUT	0x08
    166   1.1      cgd #define DDB_INTR	0x10
    167   1.1      cgd #define DDB_IOCTL	0x20
    168   1.1      cgd #define DDB_INTSCHM	0x40
    169   1.1      cgd #define DDB_MODEM	0x80
    170   1.1      cgd #define DDB_OPENCLOSE	0x100
    171   1.1      cgd #endif
    172   1.1      cgd 
    173   1.1      cgd #ifdef IOSTATS
    174   1.1      cgd #define	DCMRBSIZE	94
    175   1.1      cgd #define DCMXBSIZE	24
    176   1.1      cgd 
    177   1.1      cgd struct	dcmstats {
    178   1.1      cgd 	long	xints;		    /* # of xmit ints */
    179   1.1      cgd 	long	xchars;		    /* # of xmit chars */
    180   1.1      cgd 	long	xempty;		    /* times outq is empty in dcmstart */
    181   1.1      cgd 	long	xrestarts;	    /* times completed while xmitting */
    182   1.1      cgd 	long	rints;		    /* # of recv ints */
    183   1.1      cgd 	long	rchars;		    /* # of recv chars */
    184   1.1      cgd 	long	xsilo[DCMXBSIZE+2]; /* times this many chars xmit on one int */
    185   1.1      cgd 	long	rsilo[DCMRBSIZE+2]; /* times this many chars read on one int */
    186   1.1      cgd } dcmstats[NDCM];
    187   1.1      cgd #endif
    188   1.1      cgd 
    189   1.1      cgd #define UNIT(x)		minor(x)
    190   1.1      cgd #define	BOARD(x)	(((x) >> 2) & 0x3f)
    191   1.1      cgd #define PORT(x)		((x) & 3)
    192   1.1      cgd #define MKUNIT(b,p)	(((b) << 2) | (p))
    193   1.1      cgd 
    194   1.1      cgd /*
    195   1.1      cgd  * Conversion from "HP DCE" to almost-normal DCE: on the 638 8-port mux,
    196   1.1      cgd  * the distribution panel uses "HP DCE" conventions.  If requested via
    197   1.1      cgd  * the device flags, we swap the inputs to something closer to normal DCE,
    198   1.1      cgd  * allowing a straight-through cable to a DTE or a reversed cable
    199   1.1      cgd  * to a DCE (reversing 2-3, 4-5, 8-20 and leaving 6 unconnected;
    200   1.1      cgd  * this gets "DCD" on pin 20 and "CTS" on 4, but doesn't connect
    201   1.1      cgd  * DSR or make RTS work, though).  The following gives the full
    202   1.1      cgd  * details of a cable from this mux panel to a modem:
    203   1.1      cgd  *
    204   1.1      cgd  *		     HP		    modem
    205   1.1      cgd  *		name	pin	pin	name
    206   1.1      cgd  * HP inputs:
    207   1.1      cgd  *		"Rx"	 2	 3	Tx
    208   1.1      cgd  *		CTS	 4	 5	CTS	(only needed for CCTS_OFLOW)
    209   1.1      cgd  *		DCD	20	 8	DCD
    210   1.1      cgd  *		"DSR"	 9	 6	DSR	(unneeded)
    211   1.1      cgd  *		RI	22	22	RI	(unneeded)
    212   1.1      cgd  *
    213   1.1      cgd  * HP outputs:
    214   1.1      cgd  *		"Tx"	 3	 2	Rx
    215   1.1      cgd  *		"DTR"	 6	not connected
    216   1.1      cgd  *		"RTS"	 8	20	DTR
    217   1.1      cgd  *		"SR"	23	 4	RTS	(often not needed)
    218   1.1      cgd  */
    219   1.1      cgd #define	FLAG_STDDCE	0x10	/* map inputs if this bit is set in flags */
    220   1.1      cgd #define hp2dce_in(ibits)	(iconv[(ibits) & 0xf])
    221   1.1      cgd static char iconv[16] = {
    222   1.1      cgd 	0,		MI_DM,		MI_CTS,		MI_CTS|MI_DM,
    223   1.1      cgd 	MI_CD,		MI_CD|MI_DM,	MI_CD|MI_CTS,	MI_CD|MI_CTS|MI_DM,
    224   1.1      cgd 	MI_RI,		MI_RI|MI_DM,	MI_RI|MI_CTS,	MI_RI|MI_CTS|MI_DM,
    225   1.1      cgd 	MI_RI|MI_CD,	MI_RI|MI_CD|MI_DM, MI_RI|MI_CD|MI_CTS,
    226   1.1      cgd 	MI_RI|MI_CD|MI_CTS|MI_DM
    227   1.1      cgd };
    228   1.1      cgd 
    229   1.1      cgd dcmprobe(hd)
    230   1.1      cgd 	register struct hp_device *hd;
    231   1.1      cgd {
    232   1.1      cgd 	register struct dcmdevice *dcm;
    233   1.1      cgd 	register int i;
    234   1.1      cgd 	register int timo = 0;
    235   1.1      cgd 	int s, brd, isconsole, mbits;
    236   1.1      cgd 
    237   1.1      cgd 	dcm = (struct dcmdevice *)hd->hp_addr;
    238   1.1      cgd 	if ((dcm->dcm_rsid & 0x1f) != DCMID)
    239   1.1      cgd 		return (0);
    240   1.1      cgd 	brd = hd->hp_unit;
    241   1.1      cgd 	isconsole = (brd == BOARD(dcmconsole));
    242   1.1      cgd 	/*
    243   1.1      cgd 	 * XXX selected console device (CONSUNIT) as determined by
    244   1.1      cgd 	 * dcmcnprobe does not agree with logical numbering imposed
    245   1.1      cgd 	 * by the config file (i.e. lowest address DCM is not unit
    246   1.1      cgd 	 * CONSUNIT).  Don't recognize this card.
    247   1.1      cgd 	 */
    248   1.1      cgd 	if (isconsole && dcm != dcm_addr[BOARD(dcmconsole)])
    249   1.1      cgd 		return (0);
    250   1.1      cgd 
    251   1.1      cgd 	/*
    252   1.1      cgd 	 * Empirically derived self-test magic
    253   1.1      cgd 	 */
    254   1.1      cgd 	s = spltty();
    255   1.1      cgd 	dcm->dcm_rsid = DCMRS;
    256   1.1      cgd 	DELAY(50000);	/* 5000 is not long enough */
    257   1.1      cgd 	dcm->dcm_rsid = 0;
    258   1.1      cgd 	dcm->dcm_ic = IC_IE;
    259   1.1      cgd 	dcm->dcm_cr = CR_SELFT;
    260   1.1      cgd 	while ((dcm->dcm_ic & IC_IR) == 0)
    261   1.1      cgd 		if (++timo == 20000)
    262   1.1      cgd 			return (0);
    263   1.1      cgd 	DELAY(50000)	/* XXX why is this needed ???? */
    264   1.1      cgd 	while ((dcm->dcm_iir & IIR_SELFT) == 0)
    265   1.1      cgd 		if (++timo == 400000)
    266   1.1      cgd 			return (0);
    267   1.1      cgd 	DELAY(50000)	/* XXX why is this needed ???? */
    268   1.1      cgd 	if (dcm->dcm_stcon != ST_OK) {
    269   1.1      cgd 		if (!isconsole)
    270   1.1      cgd 			printf("dcm%d: self test failed: %x\n",
    271   1.1      cgd 			       brd, dcm->dcm_stcon);
    272   1.1      cgd 		return (0);
    273   1.1      cgd 	}
    274   1.1      cgd 	dcm->dcm_ic = IC_ID;
    275   1.1      cgd 	splx(s);
    276   1.1      cgd 
    277   1.1      cgd 	hd->hp_ipl = DCMIPL(dcm->dcm_ic);
    278   1.1      cgd 	dcm_addr[brd] = dcm;
    279   1.1      cgd 	dcm_active |= 1 << brd;
    280   1.1      cgd 	dcmsoftCAR[brd] = hd->hp_flags;
    281   1.1      cgd 	dcmisr[brd].isr_ipl = hd->hp_ipl;
    282   1.1      cgd 	dcmisr[brd].isr_arg = brd;
    283   1.1      cgd 	dcmisr[brd].isr_intr = dcmintr;
    284   1.1      cgd 	isrlink(&dcmisr[brd]);
    285   1.1      cgd #ifdef KGDB
    286   1.1      cgd 	if (major(kgdb_dev) == dcmmajor && BOARD(kgdb_dev) == brd) {
    287   1.1      cgd 		if (dcmconsole == UNIT(kgdb_dev))
    288   1.1      cgd 			kgdb_dev = NODEV; /* can't debug over console port */
    289   1.1      cgd #ifndef KGDB_CHEAT
    290   1.1      cgd 		/*
    291   1.1      cgd 		 * The following could potentially be replaced
    292   1.1      cgd 		 * by the corresponding code in dcmcnprobe.
    293   1.1      cgd 		 */
    294   1.1      cgd 		else {
    295   1.1      cgd 			(void) dcminit(kgdb_dev, kgdb_rate);
    296   1.1      cgd 			if (kgdb_debug_init) {
    297   1.1      cgd 				printf("dcm%d: ", UNIT(kgdb_dev));
    298   1.1      cgd 				kgdb_connect(1);
    299   1.1      cgd 			} else
    300   1.1      cgd 				printf("dcm%d: kgdb enabled\n", UNIT(kgdb_dev));
    301   1.1      cgd 		}
    302   1.1      cgd 		/* end could be replaced */
    303   1.1      cgd #endif
    304   1.1      cgd 	}
    305   1.1      cgd #endif
    306   1.1      cgd 	if (dcmistype == DIS_TIMER)
    307   1.1      cgd 		dcmsetischeme(brd, DIS_RESET|DIS_TIMER);
    308   1.1      cgd 	else
    309   1.1      cgd 		dcmsetischeme(brd, DIS_RESET|DIS_PERCHAR);
    310   1.1      cgd 
    311   1.1      cgd 	/* load pointers to modem control */
    312   1.1      cgd 	dcm_modem[MKUNIT(brd, 0)] = &dcm->dcm_modem0;
    313   1.1      cgd 	dcm_modem[MKUNIT(brd, 1)] = &dcm->dcm_modem1;
    314   1.1      cgd 	dcm_modem[MKUNIT(brd, 2)] = &dcm->dcm_modem2;
    315   1.1      cgd 	dcm_modem[MKUNIT(brd, 3)] = &dcm->dcm_modem3;
    316   1.1      cgd 	/* set DCD (modem) and CTS (flow control) on all ports */
    317   1.1      cgd 	if (dcmsoftCAR[brd] & FLAG_STDDCE)
    318   1.1      cgd 		mbits = hp2dce_in(MI_CD|MI_CTS);
    319   1.1      cgd 	else
    320   1.1      cgd 		mbits = MI_CD|MI_CTS;
    321   1.1      cgd 	for (i = 0; i < 4; i++)
    322   1.1      cgd 		dcm_modem[MKUNIT(brd, i)]->mdmmsk = mbits;
    323   1.1      cgd 
    324   1.1      cgd 	dcm->dcm_ic = IC_IE;		/* turn all interrupts on */
    325   1.1      cgd 	/*
    326   1.1      cgd 	 * Need to reset baud rate, etc. of next print so reset dcmconsole.
    327   1.1      cgd 	 * Also make sure console is always "hardwired"
    328   1.1      cgd 	 */
    329   1.1      cgd 	if (isconsole) {
    330   1.1      cgd 		dcmconsinit = 0;
    331   1.1      cgd 		dcmsoftCAR[brd] |= (1 << PORT(dcmconsole));
    332   1.1      cgd 	}
    333   1.1      cgd 	return (1);
    334   1.1      cgd }
    335   1.1      cgd 
    336   1.1      cgd /* ARGSUSED */
    337   1.1      cgd #ifdef __STDC__
    338   1.1      cgd dcmopen(dev_t dev, int flag, int mode, struct proc *p)
    339   1.1      cgd #else
    340   1.1      cgd dcmopen(dev, flag, mode, p)
    341   1.1      cgd 	dev_t dev;
    342   1.1      cgd 	int flag, mode;
    343   1.1      cgd 	struct proc *p;
    344   1.1      cgd #endif
    345   1.1      cgd {
    346   1.1      cgd 	register struct tty *tp;
    347   1.1      cgd 	register int unit, brd;
    348   1.1      cgd 	int error = 0, mbits;
    349   1.1      cgd 
    350   1.1      cgd 	unit = UNIT(dev);
    351   1.1      cgd 	brd = BOARD(unit);
    352   1.1      cgd 	if (unit >= NDCMLINE || (dcm_active & (1 << brd)) == 0)
    353   1.1      cgd 		return (ENXIO);
    354   1.7  mycroft 	if(!dcm_tty[unit])
    355   1.7  mycroft 		tp = dcm_tty[unit] = ttymalloc();
    356   1.7  mycroft 	else
    357   1.4  deraadt 		tp = dcm_tty[unit];
    358   1.1      cgd 	tp->t_oproc = dcmstart;
    359   1.1      cgd 	tp->t_param = dcmparam;
    360   1.1      cgd 	tp->t_dev = dev;
    361   1.1      cgd 	if ((tp->t_state & TS_ISOPEN) == 0) {
    362   1.1      cgd 		tp->t_state |= TS_WOPEN;
    363   1.1      cgd 		ttychars(tp);
    364   1.1      cgd 		if (tp->t_ispeed == 0) {
    365   1.1      cgd 			tp->t_iflag = TTYDEF_IFLAG;
    366   1.1      cgd 			tp->t_oflag = TTYDEF_OFLAG;
    367   1.1      cgd 			tp->t_cflag = TTYDEF_CFLAG;
    368   1.1      cgd 			tp->t_lflag = TTYDEF_LFLAG;
    369   1.1      cgd 			tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
    370   1.1      cgd 		}
    371   1.1      cgd 		(void) dcmparam(tp, &tp->t_termios);
    372   1.1      cgd 		ttsetwater(tp);
    373   1.1      cgd 	} else if (tp->t_state&TS_XCLUDE && p->p_ucred->cr_uid != 0)
    374   1.1      cgd 		return (EBUSY);
    375   1.1      cgd 	mbits = MO_ON;
    376   1.1      cgd 	if (dcmsoftCAR[brd] & FLAG_STDDCE)
    377   1.1      cgd 		mbits |= MO_SR;		/* pin 23, could be used as RTS */
    378   1.1      cgd 	(void) dcmmctl(dev, mbits, DMSET);	/* enable port */
    379   1.1      cgd 	if ((dcmsoftCAR[brd] & (1 << PORT(unit))) ||
    380   1.1      cgd 	    (dcmmctl(dev, MO_OFF, DMGET) & MI_CD))
    381   1.1      cgd 		tp->t_state |= TS_CARR_ON;
    382   1.1      cgd #ifdef DEBUG
    383   1.1      cgd 	if (dcmdebug & DDB_MODEM)
    384   1.1      cgd 		printf("dcm%d: dcmopen port %d softcarr %c\n",
    385   1.1      cgd 		       brd, unit, (tp->t_state & TS_CARR_ON) ? '1' : '0');
    386   1.1      cgd #endif
    387   1.1      cgd 	(void) spltty();
    388   1.1      cgd 	while ((flag&O_NONBLOCK) == 0 && (tp->t_cflag&CLOCAL) == 0 &&
    389   1.1      cgd 	    (tp->t_state & TS_CARR_ON) == 0) {
    390   1.1      cgd 		tp->t_state |= TS_WOPEN;
    391   1.7  mycroft 		if (error = ttysleep(tp, (caddr_t)&tp->t_rawq, TTIPRI | PCATCH,
    392   1.1      cgd 		    ttopen, 0))
    393   1.1      cgd 			break;
    394   1.1      cgd 	}
    395   1.1      cgd 	(void) spl0();
    396   1.1      cgd 
    397   1.1      cgd #ifdef DEBUG
    398   1.1      cgd 	if (dcmdebug & DDB_OPENCLOSE)
    399   1.1      cgd 		printf("dcmopen: u %x st %x fl %x\n",
    400   1.1      cgd 			unit, tp->t_state, tp->t_flags);
    401   1.1      cgd #endif
    402   1.1      cgd 	if (error == 0)
    403   1.1      cgd 		error = (*linesw[tp->t_line].l_open)(dev, tp);
    404   1.1      cgd 	return (error);
    405   1.1      cgd }
    406   1.1      cgd 
    407   1.1      cgd /*ARGSUSED*/
    408   1.1      cgd dcmclose(dev, flag, mode, p)
    409   1.1      cgd 	dev_t dev;
    410   1.1      cgd 	int flag, mode;
    411   1.1      cgd 	struct proc *p;
    412   1.1      cgd {
    413   1.1      cgd 	register struct tty *tp;
    414   1.1      cgd 	int unit;
    415   1.1      cgd 
    416   1.1      cgd 	unit = UNIT(dev);
    417   1.4  deraadt 	tp = dcm_tty[unit];
    418   1.1      cgd 	(*linesw[tp->t_line].l_close)(tp, flag);
    419   1.1      cgd 	if (tp->t_cflag&HUPCL || tp->t_state&TS_WOPEN ||
    420   1.1      cgd 	    (tp->t_state&TS_ISOPEN) == 0)
    421   1.1      cgd 		(void) dcmmctl(dev, MO_OFF, DMSET);
    422   1.1      cgd #ifdef DEBUG
    423   1.1      cgd 	if (dcmdebug & DDB_OPENCLOSE)
    424   1.1      cgd 		printf("dcmclose: u %x st %x fl %x\n",
    425   1.1      cgd 			unit, tp->t_state, tp->t_flags);
    426   1.1      cgd #endif
    427   1.1      cgd 	ttyclose(tp);
    428   1.7  mycroft 	ttyfree(tp);
    429   1.4  deraadt 	dcm_tty[unit] = (struct tty *)NULL;
    430   1.1      cgd 	return (0);
    431   1.1      cgd }
    432   1.1      cgd 
    433   1.1      cgd dcmread(dev, uio, flag)
    434   1.1      cgd 	dev_t dev;
    435   1.1      cgd 	struct uio *uio;
    436   1.1      cgd {
    437   1.1      cgd 	register struct tty *tp;
    438   1.1      cgd 
    439   1.4  deraadt 	tp = dcm_tty[UNIT(dev)];
    440   1.1      cgd 	return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
    441   1.1      cgd }
    442   1.1      cgd 
    443   1.1      cgd dcmwrite(dev, uio, flag)
    444   1.1      cgd 	dev_t dev;
    445   1.1      cgd 	struct uio *uio;
    446   1.1      cgd {
    447   1.1      cgd 	int unit = UNIT(dev);
    448   1.1      cgd 	register struct tty *tp;
    449   1.1      cgd 
    450   1.4  deraadt 	tp = dcm_tty[unit];
    451   1.1      cgd 	/*
    452   1.1      cgd 	 * XXX we disallow virtual consoles if the physical console is
    453   1.1      cgd 	 * a serial port.  This is in case there is a display attached that
    454   1.1      cgd 	 * is not the console.  In that situation we don't need/want the X
    455   1.1      cgd 	 * server taking over the console.
    456   1.1      cgd 	 */
    457   1.1      cgd 	if (constty && unit == dcmconsole)
    458   1.1      cgd 		constty = NULL;
    459   1.1      cgd 	return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
    460   1.1      cgd }
    461   1.1      cgd 
    462   1.1      cgd dcmintr(brd)
    463   1.1      cgd 	register int brd;
    464   1.1      cgd {
    465   1.1      cgd 	register struct dcmdevice *dcm = dcm_addr[brd];
    466   1.1      cgd 	register struct dcmischeme *dis;
    467   1.1      cgd 	register int unit = MKUNIT(brd, 0);
    468   1.1      cgd 	register int code, i;
    469   1.1      cgd 	int pcnd[4], mcode, mcnd[4];
    470   1.1      cgd 
    471   1.1      cgd 	/*
    472   1.1      cgd 	 * Do all guarded register accesses right off to minimize
    473   1.1      cgd 	 * block out of hardware.
    474   1.1      cgd 	 */
    475   1.1      cgd 	SEM_LOCK(dcm);
    476   1.1      cgd 	if ((dcm->dcm_ic & IC_IR) == 0) {
    477   1.1      cgd 		SEM_UNLOCK(dcm);
    478   1.1      cgd 		return (0);
    479   1.1      cgd 	}
    480   1.1      cgd 	for (i = 0; i < 4; i++) {
    481   1.1      cgd 		pcnd[i] = dcm->dcm_icrtab[i].dcm_data;
    482   1.1      cgd 		dcm->dcm_icrtab[i].dcm_data = 0;
    483   1.1      cgd 		code = dcm_modem[unit+i]->mdmin;
    484   1.1      cgd 		if (dcmsoftCAR[brd] & FLAG_STDDCE)
    485   1.1      cgd 			code = hp2dce_in(code);
    486   1.1      cgd 		mcnd[i] = code;
    487   1.1      cgd 	}
    488   1.1      cgd 	code = dcm->dcm_iir & IIR_MASK;
    489   1.1      cgd 	dcm->dcm_iir = 0;	/* XXX doc claims read clears interrupt?! */
    490   1.1      cgd 	mcode = dcm->dcm_modemintr;
    491   1.1      cgd 	dcm->dcm_modemintr = 0;
    492   1.1      cgd 	SEM_UNLOCK(dcm);
    493   1.1      cgd 
    494   1.1      cgd #ifdef DEBUG
    495   1.1      cgd 	if (dcmdebug & DDB_INTR) {
    496   1.1      cgd 		printf("dcmintr(%d): iir %x pc %x/%x/%x/%x ",
    497   1.1      cgd 		       brd, code, pcnd[0], pcnd[1], pcnd[2], pcnd[3]);
    498   1.1      cgd 		printf("miir %x mc %x/%x/%x/%x\n",
    499   1.1      cgd 		       mcode, mcnd[0], mcnd[1], mcnd[2], mcnd[3]);
    500   1.1      cgd 	}
    501   1.1      cgd #endif
    502   1.1      cgd 	if (code & IIR_TIMEO)
    503   1.1      cgd 		dcmrint(brd, dcm);
    504   1.1      cgd 	if (code & IIR_PORT0)
    505   1.1      cgd 		dcmpint(unit+0, pcnd[0], dcm);
    506   1.1      cgd 	if (code & IIR_PORT1)
    507   1.1      cgd 		dcmpint(unit+1, pcnd[1], dcm);
    508   1.1      cgd 	if (code & IIR_PORT2)
    509   1.1      cgd 		dcmpint(unit+2, pcnd[2], dcm);
    510   1.1      cgd 	if (code & IIR_PORT3)
    511   1.1      cgd 		dcmpint(unit+3, pcnd[3], dcm);
    512   1.1      cgd 	if (code & IIR_MODM) {
    513   1.1      cgd 		if (mcode == 0 || mcode & 0x1)	/* mcode==0 -> 98642 board */
    514   1.1      cgd 			dcmmint(unit+0, mcnd[0], dcm);
    515   1.1      cgd 		if (mcode & 0x2)
    516   1.1      cgd 			dcmmint(unit+1, mcnd[1], dcm);
    517   1.1      cgd 		if (mcode & 0x4)
    518   1.1      cgd 			dcmmint(unit+2, mcnd[2], dcm);
    519   1.1      cgd 		if (mcode & 0x8)
    520   1.1      cgd 			dcmmint(unit+3, mcnd[3], dcm);
    521   1.1      cgd 	}
    522   1.1      cgd 
    523   1.1      cgd 	dis = &dcmischeme[brd];
    524   1.1      cgd 	/*
    525   1.1      cgd 	 * Chalk up a receiver interrupt if the timer running or one of
    526   1.1      cgd 	 * the ports reports a special character interrupt.
    527   1.1      cgd 	 */
    528   1.1      cgd 	if ((code & IIR_TIMEO) ||
    529   1.1      cgd 	    ((pcnd[0]|pcnd[1]|pcnd[2]|pcnd[3]) & IT_SPEC))
    530   1.1      cgd 		dis->dis_intr++;
    531   1.1      cgd 	/*
    532   1.1      cgd 	 * See if it is time to check/change the interrupt rate.
    533   1.1      cgd 	 */
    534   1.1      cgd 	if (dcmistype < 0 &&
    535   1.1      cgd 	    (i = time.tv_sec - dis->dis_time) >= dcminterval) {
    536   1.1      cgd 		/*
    537   1.1      cgd 		 * If currently per-character and averaged over 70 interrupts
    538   1.1      cgd 		 * per-second (66 is threshold of 600 baud) in last interval,
    539   1.1      cgd 		 * switch to timer mode.
    540   1.1      cgd 		 *
    541   1.1      cgd 		 * XXX decay counts ala load average to avoid spikes?
    542   1.1      cgd 		 */
    543   1.1      cgd 		if (dis->dis_perchar && dis->dis_intr > 70 * i)
    544   1.1      cgd 			dcmsetischeme(brd, DIS_TIMER);
    545   1.1      cgd 		/*
    546   1.1      cgd 		 * If currently using timer and had more interrupts than
    547   1.1      cgd 		 * received characters in the last interval, switch back
    548   1.1      cgd 		 * to per-character.  Note that after changing to per-char
    549   1.1      cgd 		 * we must process any characters already in the queue
    550   1.1      cgd 		 * since they may have arrived before the bitmap was setup.
    551   1.1      cgd 		 *
    552   1.1      cgd 		 * XXX decay counts?
    553   1.1      cgd 		 */
    554   1.1      cgd 		else if (!dis->dis_perchar && dis->dis_intr > dis->dis_char) {
    555   1.1      cgd 			dcmsetischeme(brd, DIS_PERCHAR);
    556   1.1      cgd 			dcmrint(brd, dcm);
    557   1.1      cgd 		}
    558   1.1      cgd 		dis->dis_intr = dis->dis_char = 0;
    559   1.1      cgd 		dis->dis_time = time.tv_sec;
    560   1.1      cgd 	}
    561   1.1      cgd 	return (1);
    562   1.1      cgd }
    563   1.1      cgd 
    564   1.1      cgd /*
    565   1.1      cgd  *  Port interrupt.  Can be two things:
    566   1.1      cgd  *	First, it might be a special character (exception interrupt);
    567   1.1      cgd  *	Second, it may be a buffer empty (transmit interrupt);
    568   1.1      cgd  */
    569   1.1      cgd dcmpint(unit, code, dcm)
    570   1.1      cgd 	int unit, code;
    571   1.1      cgd 	struct dcmdevice *dcm;
    572   1.1      cgd {
    573   1.4  deraadt 	struct tty *tp = dcm_tty[unit];
    574   1.1      cgd 
    575   1.1      cgd 	if (code & IT_SPEC)
    576   1.1      cgd 		dcmreadbuf(unit, dcm, tp);
    577   1.1      cgd 	if (code & IT_TX)
    578   1.1      cgd 		dcmxint(unit, dcm, tp);
    579   1.1      cgd }
    580   1.1      cgd 
    581   1.1      cgd dcmrint(brd, dcm)
    582   1.1      cgd 	int brd;
    583   1.1      cgd 	register struct dcmdevice *dcm;
    584   1.1      cgd {
    585   1.1      cgd 	register int i, unit;
    586   1.1      cgd 	register struct tty *tp;
    587   1.1      cgd 
    588   1.1      cgd 	unit = MKUNIT(brd, 0);
    589   1.4  deraadt 	tp = dcm_tty[unit];
    590   1.1      cgd 	for (i = 0; i < 4; i++, tp++, unit++)
    591   1.1      cgd 		dcmreadbuf(unit, dcm, tp);
    592   1.1      cgd }
    593   1.1      cgd 
    594   1.1      cgd dcmreadbuf(unit, dcm, tp)
    595   1.1      cgd 	int unit;
    596   1.1      cgd 	register struct dcmdevice *dcm;
    597   1.1      cgd 	register struct tty *tp;
    598   1.1      cgd {
    599   1.1      cgd 	int port = PORT(unit);
    600   1.1      cgd 	register struct dcmpreg *pp = dcm_preg(dcm, port);
    601   1.1      cgd 	register struct dcmrfifo *fifo;
    602   1.1      cgd 	register int c, stat;
    603   1.1      cgd 	register unsigned head;
    604   1.1      cgd 	int nch = 0;
    605   1.1      cgd #ifdef IOSTATS
    606   1.1      cgd 	struct dcmstats *dsp = &dcmstats[BOARD(unit)];
    607   1.1      cgd 
    608   1.1      cgd 	dsp->rints++;
    609   1.1      cgd #endif
    610   1.1      cgd 	if ((tp->t_state & TS_ISOPEN) == 0) {
    611   1.1      cgd #ifdef KGDB
    612   1.1      cgd 		if ((makedev(dcmmajor, unit) == kgdb_dev) &&
    613   1.1      cgd 		    (head = pp->r_head & RX_MASK) != (pp->r_tail & RX_MASK) &&
    614   1.1      cgd 		    dcm->dcm_rfifos[3-port][head>>1].data_char == FRAME_END) {
    615   1.1      cgd 			pp->r_head = (head + 2) & RX_MASK;
    616   1.1      cgd 			kgdb_connect(0);	/* trap into kgdb */
    617   1.1      cgd 			return;
    618   1.1      cgd 		}
    619   1.1      cgd #endif /* KGDB */
    620   1.1      cgd 		pp->r_head = pp->r_tail & RX_MASK;
    621   1.1      cgd 		return;
    622   1.1      cgd 	}
    623   1.1      cgd 
    624   1.1      cgd 	head = pp->r_head & RX_MASK;
    625   1.1      cgd 	fifo = &dcm->dcm_rfifos[3-port][head>>1];
    626   1.1      cgd 	/*
    627   1.1      cgd 	 * XXX upper bound on how many chars we will take in one swallow?
    628   1.1      cgd 	 */
    629   1.1      cgd 	while (head != (pp->r_tail & RX_MASK)) {
    630   1.1      cgd 		/*
    631   1.1      cgd 		 * Get character/status and update head pointer as fast
    632   1.1      cgd 		 * as possible to make room for more characters.
    633   1.1      cgd 		 */
    634   1.1      cgd 		c = fifo->data_char;
    635   1.1      cgd 		stat = fifo->data_stat;
    636   1.1      cgd 		head = (head + 2) & RX_MASK;
    637   1.1      cgd 		pp->r_head = head;
    638   1.1      cgd 		fifo = head ? fifo+1 : &dcm->dcm_rfifos[3-port][0];
    639   1.1      cgd 		nch++;
    640   1.1      cgd 
    641   1.1      cgd #ifdef DEBUG
    642   1.1      cgd 		if (dcmdebug & DDB_INPUT)
    643   1.1      cgd 			printf("dcmreadbuf(%d): c%x('%c') s%x f%x h%x t%x\n",
    644   1.1      cgd 			       unit, c&0xFF, c, stat&0xFF,
    645   1.1      cgd 			       tp->t_flags, head, pp->r_tail);
    646   1.1      cgd #endif
    647   1.1      cgd 		/*
    648   1.1      cgd 		 * Check for and handle errors
    649   1.1      cgd 		 */
    650   1.1      cgd 		if (stat & RD_MASK) {
    651   1.1      cgd #ifdef DEBUG
    652   1.1      cgd 			if (dcmdebug & (DDB_INPUT|DDB_SIOERR))
    653   1.1      cgd 				printf("dcmreadbuf(%d): err: c%x('%c') s%x\n",
    654   1.1      cgd 				       unit, stat, c&0xFF, c);
    655   1.1      cgd #endif
    656   1.1      cgd 			if (stat & (RD_BD | RD_FE))
    657   1.1      cgd 				c |= TTY_FE;
    658   1.1      cgd 			else if (stat & RD_PE)
    659   1.1      cgd 				c |= TTY_PE;
    660   1.1      cgd 			else if (stat & RD_OVF)
    661   1.1      cgd 				log(LOG_WARNING,
    662   1.1      cgd 				    "dcm%d: silo overflow\n", unit);
    663   1.1      cgd 			else if (stat & RD_OE)
    664   1.1      cgd 				log(LOG_WARNING,
    665   1.1      cgd 				    "dcm%d: uart overflow\n", unit);
    666   1.1      cgd 		}
    667   1.1      cgd 		(*linesw[tp->t_line].l_rint)(c, tp);
    668   1.1      cgd 	}
    669   1.1      cgd 	dcmischeme[BOARD(unit)].dis_char += nch;
    670   1.1      cgd #ifdef IOSTATS
    671   1.1      cgd 	dsp->rchars += nch;
    672   1.1      cgd 	if (nch <= DCMRBSIZE)
    673   1.1      cgd 		dsp->rsilo[nch]++;
    674   1.1      cgd 	else
    675   1.1      cgd 		dsp->rsilo[DCMRBSIZE+1]++;
    676   1.1      cgd #endif
    677   1.1      cgd }
    678   1.1      cgd 
    679   1.1      cgd dcmxint(unit, dcm, tp)
    680   1.1      cgd 	int unit;
    681   1.1      cgd 	struct dcmdevice *dcm;
    682   1.1      cgd 	register struct tty *tp;
    683   1.1      cgd {
    684   1.1      cgd 	tp->t_state &= ~TS_BUSY;
    685   1.1      cgd 	if (tp->t_state & TS_FLUSH)
    686   1.1      cgd 		tp->t_state &= ~TS_FLUSH;
    687   1.1      cgd 	(*linesw[tp->t_line].l_start)(tp);
    688   1.1      cgd }
    689   1.1      cgd 
    690   1.1      cgd dcmmint(unit, mcnd, dcm)
    691   1.1      cgd 	register int unit;
    692   1.1      cgd 	register struct dcmdevice *dcm;
    693   1.1      cgd         int mcnd;
    694   1.1      cgd {
    695   1.1      cgd 	register struct tty *tp;
    696   1.1      cgd 	int delta;
    697   1.1      cgd 
    698   1.1      cgd #ifdef DEBUG
    699   1.1      cgd 	if (dcmdebug & DDB_MODEM)
    700   1.1      cgd 		printf("dcmmint: port %d mcnd %x mcndlast %x\n",
    701   1.1      cgd 		       unit, mcnd, mcndlast[unit]);
    702   1.1      cgd #endif
    703   1.4  deraadt 	tp = dcm_tty[unit];
    704   1.1      cgd 	delta = mcnd ^ mcndlast[unit];
    705   1.1      cgd 	mcndlast[unit] = mcnd;
    706   1.1      cgd 	if ((delta & MI_CTS) && (tp->t_state & TS_ISOPEN) &&
    707   1.1      cgd 	    (tp->t_flags & CCTS_OFLOW)) {
    708   1.1      cgd 		if (mcnd & MI_CTS) {
    709   1.1      cgd 			tp->t_state &= ~TS_TTSTOP;
    710   1.1      cgd 			ttstart(tp);
    711   1.1      cgd 		} else
    712   1.1      cgd 			tp->t_state |= TS_TTSTOP;	/* inline dcmstop */
    713   1.1      cgd 	}
    714   1.1      cgd 	if (delta & MI_CD) {
    715   1.1      cgd 		if (mcnd & MI_CD)
    716   1.1      cgd 			(void)(*linesw[tp->t_line].l_modem)(tp, 1);
    717   1.1      cgd 		else if ((dcmsoftCAR[BOARD(unit)] & (1 << PORT(unit))) == 0 &&
    718   1.1      cgd 		    (*linesw[tp->t_line].l_modem)(tp, 0) == 0) {
    719   1.1      cgd 			dcm_modem[unit]->mdmout = MO_OFF;
    720   1.1      cgd 			SEM_LOCK(dcm);
    721   1.1      cgd 			dcm->dcm_modemchng |= 1<<(unit & 3);
    722   1.1      cgd 			dcm->dcm_cr |= CR_MODM;
    723   1.1      cgd 			SEM_UNLOCK(dcm);
    724   1.1      cgd 			DELAY(10); /* time to change lines */
    725   1.1      cgd 		}
    726   1.1      cgd 	}
    727   1.1      cgd }
    728   1.1      cgd 
    729   1.1      cgd dcmioctl(dev, cmd, data, flag)
    730   1.1      cgd 	dev_t dev;
    731   1.1      cgd 	caddr_t data;
    732   1.1      cgd {
    733   1.1      cgd 	register struct tty *tp;
    734   1.1      cgd 	register int unit = UNIT(dev);
    735   1.1      cgd 	register struct dcmdevice *dcm;
    736   1.1      cgd 	register int port;
    737   1.1      cgd 	int error, s;
    738   1.1      cgd 
    739   1.1      cgd #ifdef DEBUG
    740   1.1      cgd 	if (dcmdebug & DDB_IOCTL)
    741   1.1      cgd 		printf("dcmioctl: unit %d cmd %x data %x flag %x\n",
    742   1.1      cgd 		       unit, cmd, *data, flag);
    743   1.1      cgd #endif
    744   1.4  deraadt 	tp = dcm_tty[unit];
    745   1.1      cgd 	error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag);
    746   1.1      cgd 	if (error >= 0)
    747   1.1      cgd 		return (error);
    748   1.1      cgd 	error = ttioctl(tp, cmd, data, flag);
    749   1.1      cgd 	if (error >= 0)
    750   1.1      cgd 		return (error);
    751   1.1      cgd 
    752   1.1      cgd 	port = PORT(unit);
    753   1.1      cgd 	dcm = dcm_addr[BOARD(unit)];
    754   1.1      cgd 	switch (cmd) {
    755   1.1      cgd 	case TIOCSBRK:
    756   1.1      cgd 		/*
    757   1.1      cgd 		 * Wait for transmitter buffer to empty
    758   1.1      cgd 		 */
    759   1.1      cgd 		s = spltty();
    760   1.1      cgd 		while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
    761   1.1      cgd 			DELAY(DCM_USPERCH(tp->t_ospeed));
    762   1.1      cgd 		SEM_LOCK(dcm);
    763   1.1      cgd 		dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
    764   1.1      cgd 		dcm->dcm_cr |= (1 << port);	/* start break */
    765   1.1      cgd 		SEM_UNLOCK(dcm);
    766   1.1      cgd 		splx(s);
    767   1.1      cgd 		break;
    768   1.1      cgd 
    769   1.1      cgd 	case TIOCCBRK:
    770   1.1      cgd 		SEM_LOCK(dcm);
    771   1.1      cgd 		dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
    772   1.1      cgd 		dcm->dcm_cr |= (1 << port);	/* end break */
    773   1.1      cgd 		SEM_UNLOCK(dcm);
    774   1.1      cgd 		break;
    775   1.1      cgd 
    776   1.1      cgd 	case TIOCSDTR:
    777   1.1      cgd 		(void) dcmmctl(dev, MO_ON, DMBIS);
    778   1.1      cgd 		break;
    779   1.1      cgd 
    780   1.1      cgd 	case TIOCCDTR:
    781   1.1      cgd 		(void) dcmmctl(dev, MO_ON, DMBIC);
    782   1.1      cgd 		break;
    783   1.1      cgd 
    784   1.1      cgd 	case TIOCMSET:
    785   1.1      cgd 		(void) dcmmctl(dev, *(int *)data, DMSET);
    786   1.1      cgd 		break;
    787   1.1      cgd 
    788   1.1      cgd 	case TIOCMBIS:
    789   1.1      cgd 		(void) dcmmctl(dev, *(int *)data, DMBIS);
    790   1.1      cgd 		break;
    791   1.1      cgd 
    792   1.1      cgd 	case TIOCMBIC:
    793   1.1      cgd 		(void) dcmmctl(dev, *(int *)data, DMBIC);
    794   1.1      cgd 		break;
    795   1.1      cgd 
    796   1.1      cgd 	case TIOCMGET:
    797   1.1      cgd 		*(int *)data = dcmmctl(dev, 0, DMGET);
    798   1.1      cgd 		break;
    799   1.1      cgd 
    800   1.1      cgd 	default:
    801   1.1      cgd 		return (ENOTTY);
    802   1.1      cgd 	}
    803   1.1      cgd 	return (0);
    804   1.1      cgd }
    805   1.1      cgd 
    806   1.1      cgd dcmparam(tp, t)
    807   1.1      cgd 	register struct tty *tp;
    808   1.1      cgd 	register struct termios *t;
    809   1.1      cgd {
    810   1.1      cgd 	register struct dcmdevice *dcm;
    811   1.1      cgd 	register int port, mode, cflag = t->c_cflag;
    812   1.1      cgd 	int ospeed = ttspeedtab(t->c_ospeed, dcmspeedtab);
    813   1.1      cgd 
    814   1.1      cgd 	/* check requested parameters */
    815   1.1      cgd         if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
    816   1.1      cgd                 return (EINVAL);
    817   1.1      cgd         /* and copy to tty */
    818   1.1      cgd         tp->t_ispeed = t->c_ispeed;
    819   1.1      cgd         tp->t_ospeed = t->c_ospeed;
    820   1.1      cgd         tp->t_cflag = cflag;
    821   1.1      cgd 	if (ospeed == 0) {
    822   1.1      cgd 		(void) dcmmctl(UNIT(tp->t_dev), MO_OFF, DMSET);
    823   1.1      cgd 		return (0);
    824   1.1      cgd 	}
    825   1.1      cgd 
    826   1.1      cgd 	mode = 0;
    827   1.1      cgd 	switch (cflag&CSIZE) {
    828   1.1      cgd 	case CS5:
    829   1.1      cgd 		mode = LC_5BITS; break;
    830   1.1      cgd 	case CS6:
    831   1.1      cgd 		mode = LC_6BITS; break;
    832   1.1      cgd 	case CS7:
    833   1.1      cgd 		mode = LC_7BITS; break;
    834   1.1      cgd 	case CS8:
    835   1.1      cgd 		mode = LC_8BITS; break;
    836   1.1      cgd 	}
    837   1.1      cgd 	if (cflag&PARENB) {
    838   1.1      cgd 		if (cflag&PARODD)
    839   1.1      cgd 			mode |= LC_PODD;
    840   1.1      cgd 		else
    841   1.1      cgd 			mode |= LC_PEVEN;
    842   1.1      cgd 	}
    843   1.1      cgd 	if (cflag&CSTOPB)
    844   1.1      cgd 		mode |= LC_2STOP;
    845   1.1      cgd 	else
    846   1.1      cgd 		mode |= LC_1STOP;
    847   1.1      cgd #ifdef DEBUG
    848   1.1      cgd 	if (dcmdebug & DDB_PARAM)
    849   1.1      cgd 		printf("dcmparam(%d): cflag %x mode %x speed %d uperch %d\n",
    850   1.1      cgd 		       UNIT(tp->t_dev), cflag, mode, tp->t_ospeed,
    851   1.1      cgd 		       DCM_USPERCH(tp->t_ospeed));
    852   1.1      cgd #endif
    853   1.1      cgd 
    854   1.1      cgd 	port = PORT(tp->t_dev);
    855   1.1      cgd 	dcm = dcm_addr[BOARD(tp->t_dev)];
    856   1.1      cgd 	/*
    857   1.1      cgd 	 * Wait for transmitter buffer to empty.
    858   1.1      cgd 	 */
    859   1.1      cgd 	while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
    860   1.1      cgd 		DELAY(DCM_USPERCH(tp->t_ospeed));
    861   1.1      cgd 	/*
    862   1.1      cgd 	 * Make changes known to hardware.
    863   1.1      cgd 	 */
    864   1.1      cgd 	dcm->dcm_data[port].dcm_baud = ospeed;
    865   1.1      cgd 	dcm->dcm_data[port].dcm_conf = mode;
    866   1.1      cgd 	SEM_LOCK(dcm);
    867   1.1      cgd 	dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
    868   1.1      cgd 	dcm->dcm_cr |= (1 << port);
    869   1.1      cgd 	SEM_UNLOCK(dcm);
    870   1.1      cgd 	/*
    871   1.1      cgd 	 * Delay for config change to take place. Weighted by baud.
    872   1.1      cgd 	 * XXX why do we do this?
    873   1.1      cgd 	 */
    874   1.1      cgd 	DELAY(16 * DCM_USPERCH(tp->t_ospeed));
    875   1.1      cgd 	return (0);
    876   1.1      cgd }
    877   1.1      cgd 
    878   1.9  deraadt void
    879   1.1      cgd dcmstart(tp)
    880   1.1      cgd 	register struct tty *tp;
    881   1.1      cgd {
    882   1.1      cgd 	register struct dcmdevice *dcm;
    883   1.1      cgd 	register struct dcmpreg *pp;
    884   1.1      cgd 	register struct dcmtfifo *fifo;
    885   1.1      cgd 	register char *bp;
    886   1.1      cgd 	register unsigned tail, next;
    887   1.1      cgd 	register int port, nch;
    888   1.1      cgd 	unsigned head;
    889   1.1      cgd 	char buf[16];
    890   1.1      cgd 	int s;
    891   1.1      cgd #ifdef IOSTATS
    892   1.1      cgd 	struct dcmstats *dsp = &dcmstats[BOARD(tp->t_dev)];
    893   1.1      cgd 	int tch = 0;
    894   1.1      cgd #endif
    895   1.1      cgd 
    896   1.1      cgd 	s = spltty();
    897   1.1      cgd #ifdef IOSTATS
    898   1.1      cgd 	dsp->xints++;
    899   1.1      cgd #endif
    900   1.1      cgd #ifdef DEBUG
    901   1.1      cgd 	if (dcmdebug & DDB_OUTPUT)
    902   1.1      cgd 		printf("dcmstart(%d): state %x flags %x outcc %d\n",
    903   1.1      cgd 		       UNIT(tp->t_dev), tp->t_state, tp->t_flags,
    904   1.7  mycroft 		       tp->t_outq.c_cc);
    905   1.1      cgd #endif
    906   1.1      cgd 	if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
    907   1.1      cgd 		goto out;
    908   1.7  mycroft 	if (tp->t_outq.c_cc <= tp->t_lowat) {
    909   1.1      cgd 		if (tp->t_state&TS_ASLEEP) {
    910   1.1      cgd 			tp->t_state &= ~TS_ASLEEP;
    911   1.7  mycroft 			wakeup((caddr_t)&tp->t_outq);
    912   1.1      cgd 		}
    913   1.2      cgd 		selwakeup(&tp->t_wsel);
    914   1.1      cgd 	}
    915   1.7  mycroft 	if (tp->t_outq.c_cc == 0) {
    916   1.1      cgd #ifdef IOSTATS
    917   1.1      cgd 		dsp->xempty++;
    918   1.1      cgd #endif
    919   1.1      cgd 		goto out;
    920   1.1      cgd 	}
    921   1.1      cgd 
    922   1.1      cgd 	dcm = dcm_addr[BOARD(tp->t_dev)];
    923   1.1      cgd 	port = PORT(tp->t_dev);
    924   1.1      cgd 	pp = dcm_preg(dcm, port);
    925   1.1      cgd 	tail = pp->t_tail & TX_MASK;
    926   1.1      cgd 	next = (tail + 1) & TX_MASK;
    927   1.1      cgd 	head = pp->t_head & TX_MASK;
    928   1.1      cgd 	if (head == next)
    929   1.1      cgd 		goto out;
    930   1.1      cgd 	fifo = &dcm->dcm_tfifos[3-port][tail];
    931   1.1      cgd again:
    932   1.1      cgd 	nch = q_to_b(&tp->t_outq, buf, (head - next) & TX_MASK);
    933   1.1      cgd #ifdef IOSTATS
    934   1.1      cgd 	tch += nch;
    935   1.1      cgd #endif
    936   1.1      cgd #ifdef DEBUG
    937   1.1      cgd 	if (dcmdebug & DDB_OUTPUT)
    938   1.1      cgd 		printf("\thead %x tail %x nch %d\n", head, tail, nch);
    939   1.1      cgd #endif
    940   1.1      cgd 	/*
    941   1.1      cgd 	 * Loop transmitting all the characters we can.
    942   1.1      cgd 	 */
    943   1.1      cgd 	for (bp = buf; --nch >= 0; bp++) {
    944   1.1      cgd 		fifo->data_char = *bp;
    945   1.1      cgd 		pp->t_tail = next;
    946   1.1      cgd 		/*
    947   1.1      cgd 		 * If this is the first character,
    948   1.1      cgd 		 * get the hardware moving right now.
    949   1.1      cgd 		 */
    950   1.1      cgd 		if (bp == buf) {
    951   1.1      cgd 			tp->t_state |= TS_BUSY;
    952   1.1      cgd 			SEM_LOCK(dcm);
    953   1.1      cgd 			dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
    954   1.1      cgd 			dcm->dcm_cr |= (1 << port);
    955   1.1      cgd 			SEM_UNLOCK(dcm);
    956   1.1      cgd 		}
    957   1.1      cgd 		tail = next;
    958   1.1      cgd 		fifo = tail ? fifo+1 : &dcm->dcm_tfifos[3-port][0];
    959   1.1      cgd 		next = (next + 1) & TX_MASK;
    960   1.1      cgd 	}
    961   1.1      cgd 	/*
    962   1.1      cgd 	 * Head changed while we were loading the buffer,
    963   1.1      cgd 	 * go back and load some more if we can.
    964   1.1      cgd 	 */
    965   1.7  mycroft 	if (tp->t_outq.c_cc && head != (pp->t_head & TX_MASK)) {
    966   1.1      cgd #ifdef IOSTATS
    967   1.1      cgd 		dsp->xrestarts++;
    968   1.1      cgd #endif
    969   1.1      cgd 		head = pp->t_head & TX_MASK;
    970   1.1      cgd 		goto again;
    971   1.1      cgd 	}
    972   1.1      cgd 
    973   1.1      cgd 	/*
    974   1.1      cgd 	 * Kick it one last time in case it finished while we were
    975   1.1      cgd 	 * loading the last bunch.
    976   1.1      cgd 	 */
    977   1.1      cgd 	if (bp > &buf[1]) {
    978   1.1      cgd 		tp->t_state |= TS_BUSY;
    979   1.1      cgd 		SEM_LOCK(dcm);
    980   1.1      cgd 		dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
    981   1.1      cgd 		dcm->dcm_cr |= (1 << port);
    982   1.1      cgd 		SEM_UNLOCK(dcm);
    983   1.1      cgd 	}
    984   1.1      cgd #ifdef DEBUG
    985   1.1      cgd 	if (dcmdebug & DDB_INTR)
    986   1.7  mycroft 		printf("dcmstart(%d): head %x tail %x outqcc %d\n",
    987   1.7  mycroft 		       UNIT(tp->t_dev), head, tail, tp->t_outq.c_cc);
    988   1.1      cgd #endif
    989   1.1      cgd out:
    990   1.1      cgd #ifdef IOSTATS
    991   1.1      cgd 	dsp->xchars += tch;
    992   1.1      cgd 	if (tch <= DCMXBSIZE)
    993   1.1      cgd 		dsp->xsilo[tch]++;
    994   1.1      cgd 	else
    995   1.1      cgd 		dsp->xsilo[DCMXBSIZE+1]++;
    996   1.1      cgd #endif
    997   1.1      cgd 	splx(s);
    998   1.1      cgd }
    999   1.1      cgd 
   1000   1.1      cgd /*
   1001   1.1      cgd  * Stop output on a line.
   1002   1.1      cgd  */
   1003   1.1      cgd dcmstop(tp, flag)
   1004   1.1      cgd 	register struct tty *tp;
   1005   1.1      cgd {
   1006   1.1      cgd 	int s;
   1007   1.1      cgd 
   1008   1.1      cgd 	s = spltty();
   1009   1.1      cgd 	if (tp->t_state & TS_BUSY) {
   1010   1.1      cgd 		/* XXX is there some way to safely stop transmission? */
   1011   1.1      cgd 		if ((tp->t_state&TS_TTSTOP) == 0)
   1012   1.1      cgd 			tp->t_state |= TS_FLUSH;
   1013   1.1      cgd 	}
   1014   1.1      cgd 	splx(s);
   1015   1.1      cgd }
   1016   1.1      cgd 
   1017   1.1      cgd /*
   1018   1.1      cgd  * Modem control
   1019   1.1      cgd  */
   1020   1.1      cgd dcmmctl(dev, bits, how)
   1021   1.1      cgd 	dev_t dev;
   1022   1.1      cgd 	int bits, how;
   1023   1.1      cgd {
   1024   1.1      cgd 	register struct dcmdevice *dcm;
   1025   1.1      cgd 	int s, unit, brd, hit = 0;
   1026   1.1      cgd 
   1027   1.1      cgd 	unit = UNIT(dev);
   1028   1.1      cgd #ifdef DEBUG
   1029   1.1      cgd 	if (dcmdebug & DDB_MODEM)
   1030   1.1      cgd 		printf("dcmmctl(%d) unit %d  bits 0x%x how %x\n",
   1031   1.1      cgd 		       BOARD(unit), unit, bits, how);
   1032   1.1      cgd #endif
   1033   1.1      cgd 
   1034   1.1      cgd 	brd = BOARD(unit);
   1035   1.1      cgd 	dcm = dcm_addr[brd];
   1036   1.1      cgd 	s = spltty();
   1037   1.1      cgd 	switch (how) {
   1038   1.1      cgd 
   1039   1.1      cgd 	case DMSET:
   1040   1.1      cgd 		dcm_modem[unit]->mdmout = bits;
   1041   1.1      cgd 		hit++;
   1042   1.1      cgd 		break;
   1043   1.1      cgd 
   1044   1.1      cgd 	case DMBIS:
   1045   1.1      cgd 		dcm_modem[unit]->mdmout |= bits;
   1046   1.1      cgd 		hit++;
   1047   1.1      cgd 		break;
   1048   1.1      cgd 
   1049   1.1      cgd 	case DMBIC:
   1050   1.1      cgd 		dcm_modem[unit]->mdmout &= ~bits;
   1051   1.1      cgd 		hit++;
   1052   1.1      cgd 		break;
   1053   1.1      cgd 
   1054   1.1      cgd 	case DMGET:
   1055   1.1      cgd 		bits = dcm_modem[unit]->mdmin;
   1056   1.1      cgd 		if (dcmsoftCAR[brd] & FLAG_STDDCE)
   1057   1.1      cgd 			bits = hp2dce_in(bits);
   1058   1.1      cgd 		break;
   1059   1.1      cgd 	}
   1060   1.1      cgd 	if (hit) {
   1061   1.1      cgd 		SEM_LOCK(dcm);
   1062   1.1      cgd 		dcm->dcm_modemchng |= 1<<(unit & 3);
   1063   1.1      cgd 		dcm->dcm_cr |= CR_MODM;
   1064   1.1      cgd 		SEM_UNLOCK(dcm);
   1065   1.1      cgd 		DELAY(10); /* delay until done */
   1066   1.1      cgd 		(void) splx(s);
   1067   1.1      cgd 	}
   1068   1.1      cgd 	return (bits);
   1069   1.1      cgd }
   1070   1.1      cgd 
   1071   1.1      cgd /*
   1072   1.1      cgd  * Set board to either interrupt per-character or at a fixed interval.
   1073   1.1      cgd  */
   1074   1.1      cgd dcmsetischeme(brd, flags)
   1075   1.1      cgd 	int brd, flags;
   1076   1.1      cgd {
   1077   1.1      cgd 	register struct dcmdevice *dcm = dcm_addr[brd];
   1078   1.1      cgd 	register struct dcmischeme *dis = &dcmischeme[brd];
   1079   1.1      cgd 	register int i;
   1080   1.1      cgd 	u_char mask;
   1081   1.1      cgd 	int perchar = flags & DIS_PERCHAR;
   1082   1.1      cgd 
   1083   1.1      cgd #ifdef DEBUG
   1084   1.1      cgd 	if (dcmdebug & DDB_INTSCHM)
   1085   1.1      cgd 		printf("dcmsetischeme(%d, %d): cur %d, ints %d, chars %d\n",
   1086   1.1      cgd 		       brd, perchar, dis->dis_perchar,
   1087   1.1      cgd 		       dis->dis_intr, dis->dis_char);
   1088   1.1      cgd 	if ((flags & DIS_RESET) == 0 && perchar == dis->dis_perchar) {
   1089   1.1      cgd 		printf("dcmsetischeme(%d):  redundent request %d\n",
   1090   1.1      cgd 		       brd, perchar);
   1091   1.1      cgd 		return;
   1092   1.1      cgd 	}
   1093   1.1      cgd #endif
   1094   1.1      cgd 	/*
   1095   1.1      cgd 	 * If perchar is non-zero, we enable interrupts on all characters
   1096   1.1      cgd 	 * otherwise we disable perchar interrupts and use periodic
   1097   1.1      cgd 	 * polling interrupts.
   1098   1.1      cgd 	 */
   1099   1.1      cgd 	dis->dis_perchar = perchar;
   1100   1.1      cgd 	mask = perchar ? 0xf : 0x0;
   1101   1.1      cgd 	for (i = 0; i < 256; i++)
   1102   1.1      cgd 		dcm->dcm_bmap[i].data_data = mask;
   1103   1.1      cgd 	/*
   1104   1.1      cgd 	 * Don't slow down tandem mode, interrupt on flow control
   1105   1.1      cgd 	 * chars for any port on the board.
   1106   1.1      cgd 	 */
   1107   1.1      cgd 	if (!perchar) {
   1108   1.4  deraadt 		register struct tty *tp = dcm_tty[MKUNIT(brd, 0)];
   1109   1.1      cgd 		int c;
   1110   1.1      cgd 
   1111   1.1      cgd 		for (i = 0; i < 4; i++, tp++) {
   1112   1.1      cgd 			if ((c = tp->t_cc[VSTART]) != _POSIX_VDISABLE)
   1113   1.1      cgd 				dcm->dcm_bmap[c].data_data |= (1 << i);
   1114   1.1      cgd 			if ((c = tp->t_cc[VSTOP]) != _POSIX_VDISABLE)
   1115   1.1      cgd 				dcm->dcm_bmap[c].data_data |= (1 << i);
   1116   1.1      cgd 		}
   1117   1.1      cgd 	}
   1118   1.1      cgd 	/*
   1119   1.1      cgd 	 * Board starts with timer disabled so if first call is to
   1120   1.1      cgd 	 * set perchar mode then we don't want to toggle the timer.
   1121   1.1      cgd 	 */
   1122   1.1      cgd 	if (flags == (DIS_RESET|DIS_PERCHAR))
   1123   1.1      cgd 		return;
   1124   1.1      cgd 	/*
   1125   1.1      cgd 	 * Toggle card 16.7ms interrupts (we first make sure that card
   1126   1.1      cgd 	 * has cleared the bit so it will see the toggle).
   1127   1.1      cgd 	 */
   1128   1.1      cgd 	while (dcm->dcm_cr & CR_TIMER)
   1129   1.1      cgd 		;
   1130   1.1      cgd 	SEM_LOCK(dcm);
   1131   1.1      cgd 	dcm->dcm_cr |= CR_TIMER;
   1132   1.1      cgd 	SEM_UNLOCK(dcm);
   1133   1.1      cgd }
   1134   1.1      cgd 
   1135   1.1      cgd /*
   1136   1.1      cgd  * Following are all routines needed for DCM to act as console
   1137   1.1      cgd  */
   1138  1.11  mycroft #include <dev/cons.h>
   1139   1.1      cgd 
   1140   1.1      cgd dcmcnprobe(cp)
   1141   1.1      cgd 	struct consdev *cp;
   1142   1.1      cgd {
   1143   1.1      cgd 	register struct hp_hw *hw;
   1144   1.1      cgd 	int unit;
   1145   1.1      cgd 
   1146   1.1      cgd 	/* locate the major number */
   1147   1.1      cgd 	for (dcmmajor = 0; dcmmajor < nchrdev; dcmmajor++)
   1148   1.1      cgd 		if (cdevsw[dcmmajor].d_open == dcmopen)
   1149   1.1      cgd 			break;
   1150   1.1      cgd 
   1151   1.1      cgd 	/*
   1152   1.1      cgd 	 * Implicitly assigns the lowest select code DCM card found to be
   1153   1.1      cgd 	 * logical unit 0 (actually CONUNIT).  If your config file does
   1154   1.1      cgd 	 * anything different, you're screwed.
   1155   1.1      cgd 	 */
   1156   1.1      cgd 	for (hw = sc_table; hw->hw_type; hw++)
   1157   1.1      cgd 		if (HW_ISDEV(hw, D_COMMDCM) && !badaddr((short *)hw->hw_kva))
   1158   1.1      cgd 			break;
   1159   1.1      cgd 	if (!HW_ISDEV(hw, D_COMMDCM)) {
   1160   1.1      cgd 		cp->cn_pri = CN_DEAD;
   1161   1.1      cgd 		return;
   1162   1.1      cgd 	}
   1163   1.1      cgd 	unit = CONUNIT;
   1164   1.1      cgd 	dcm_addr[BOARD(CONUNIT)] = (struct dcmdevice *)hw->hw_kva;
   1165   1.1      cgd 
   1166   1.1      cgd 	/* initialize required fields */
   1167   1.1      cgd 	cp->cn_dev = makedev(dcmmajor, unit);
   1168   1.1      cgd 	switch (dcm_addr[BOARD(unit)]->dcm_rsid) {
   1169   1.1      cgd 	case DCMID:
   1170   1.1      cgd 		cp->cn_pri = CN_NORMAL;
   1171   1.1      cgd 		break;
   1172   1.1      cgd 	case DCMID|DCMCON:
   1173   1.1      cgd 		cp->cn_pri = CN_REMOTE;
   1174   1.1      cgd 		break;
   1175   1.1      cgd 	default:
   1176   1.1      cgd 		cp->cn_pri = CN_DEAD;
   1177   1.1      cgd 		return;
   1178   1.1      cgd 	}
   1179   1.1      cgd 	/*
   1180   1.1      cgd 	 * If dcmconsole is initialized, raise our priority.
   1181   1.1      cgd 	 */
   1182   1.1      cgd 	if (dcmconsole == UNIT(unit))
   1183   1.1      cgd 		cp->cn_pri = CN_REMOTE;
   1184   1.1      cgd #ifdef KGDB_CHEAT
   1185   1.1      cgd 	/*
   1186   1.1      cgd 	 * This doesn't currently work, at least not with ite consoles;
   1187   1.1      cgd 	 * the console hasn't been initialized yet.
   1188   1.1      cgd 	 */
   1189   1.1      cgd 	if (major(kgdb_dev) == dcmmajor && BOARD(kgdb_dev) == BOARD(unit)) {
   1190   1.1      cgd 		(void) dcminit(kgdb_dev, kgdb_rate);
   1191   1.1      cgd 		if (kgdb_debug_init) {
   1192   1.1      cgd 			/*
   1193   1.1      cgd 			 * We assume that console is ready for us...
   1194   1.1      cgd 			 * this assumes that a dca or ite console
   1195   1.1      cgd 			 * has been selected already and will init
   1196   1.1      cgd 			 * on the first putc.
   1197   1.1      cgd 			 */
   1198   1.1      cgd 			printf("dcm%d: ", UNIT(kgdb_dev));
   1199   1.1      cgd 			kgdb_connect(1);
   1200   1.1      cgd 		}
   1201   1.1      cgd 	}
   1202   1.1      cgd #endif
   1203   1.1      cgd }
   1204   1.1      cgd 
   1205   1.1      cgd dcmcninit(cp)
   1206   1.1      cgd 	struct consdev *cp;
   1207   1.1      cgd {
   1208   1.1      cgd 	dcminit(cp->cn_dev, dcmdefaultrate);
   1209   1.1      cgd 	dcmconsinit = 1;
   1210   1.1      cgd 	dcmconsole = UNIT(cp->cn_dev);
   1211   1.1      cgd }
   1212   1.1      cgd 
   1213   1.1      cgd dcminit(dev, rate)
   1214   1.1      cgd 	dev_t dev;
   1215   1.1      cgd 	int rate;
   1216   1.1      cgd {
   1217   1.1      cgd 	register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
   1218   1.1      cgd 	int s, mode, port;
   1219   1.1      cgd 
   1220   1.1      cgd 	port = PORT(dev);
   1221   1.1      cgd 	mode = LC_8BITS | LC_1STOP;
   1222   1.1      cgd 	s = splhigh();
   1223   1.1      cgd 	/*
   1224   1.1      cgd 	 * Wait for transmitter buffer to empty.
   1225   1.1      cgd 	 */
   1226   1.1      cgd 	while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
   1227   1.1      cgd 		DELAY(DCM_USPERCH(rate));
   1228   1.1      cgd 	/*
   1229   1.1      cgd 	 * Make changes known to hardware.
   1230   1.1      cgd 	 */
   1231   1.1      cgd 	dcm->dcm_data[port].dcm_baud = ttspeedtab(rate, dcmspeedtab);
   1232   1.1      cgd 	dcm->dcm_data[port].dcm_conf = mode;
   1233   1.1      cgd 	SEM_LOCK(dcm);
   1234   1.1      cgd 	dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
   1235   1.1      cgd 	dcm->dcm_cr |= (1 << port);
   1236   1.1      cgd 	SEM_UNLOCK(dcm);
   1237   1.1      cgd 	/*
   1238   1.1      cgd 	 * Delay for config change to take place. Weighted by baud.
   1239   1.1      cgd 	 * XXX why do we do this?
   1240   1.1      cgd 	 */
   1241   1.1      cgd 	DELAY(16 * DCM_USPERCH(rate));
   1242   1.1      cgd 	splx(s);
   1243   1.1      cgd }
   1244   1.1      cgd 
   1245   1.1      cgd dcmcngetc(dev)
   1246   1.1      cgd 	dev_t dev;
   1247   1.1      cgd {
   1248   1.1      cgd 	register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
   1249   1.1      cgd 	register struct dcmrfifo *fifo;
   1250   1.1      cgd 	register struct dcmpreg *pp;
   1251   1.1      cgd 	register unsigned head;
   1252   1.1      cgd 	int s, c, stat, port;
   1253   1.1      cgd 
   1254   1.1      cgd 	port = PORT(dev);
   1255   1.1      cgd 	pp = dcm_preg(dcm, port);
   1256   1.1      cgd 	s = splhigh();
   1257   1.1      cgd 	head = pp->r_head & RX_MASK;
   1258   1.1      cgd 	fifo = &dcm->dcm_rfifos[3-port][head>>1];
   1259   1.1      cgd 	while (head == (pp->r_tail & RX_MASK))
   1260   1.1      cgd 		;
   1261   1.1      cgd 	/*
   1262   1.1      cgd 	 * If board interrupts are enabled, just let our received char
   1263   1.1      cgd 	 * interrupt through in case some other port on the board was
   1264   1.1      cgd 	 * busy.  Otherwise we must clear the interrupt.
   1265   1.1      cgd 	 */
   1266   1.1      cgd 	SEM_LOCK(dcm);
   1267   1.1      cgd 	if ((dcm->dcm_ic & IC_IE) == 0)
   1268   1.1      cgd 		stat = dcm->dcm_iir;
   1269   1.1      cgd 	SEM_UNLOCK(dcm);
   1270   1.1      cgd 	c = fifo->data_char;
   1271   1.1      cgd 	stat = fifo->data_stat;
   1272   1.1      cgd 	pp->r_head = (head + 2) & RX_MASK;
   1273   1.1      cgd 	splx(s);
   1274   1.1      cgd 	return (c);
   1275   1.1      cgd }
   1276   1.1      cgd 
   1277   1.1      cgd /*
   1278   1.1      cgd  * Console kernel output character routine.
   1279   1.1      cgd  */
   1280   1.1      cgd dcmcnputc(dev, c)
   1281   1.1      cgd 	dev_t dev;
   1282   1.1      cgd 	int c;
   1283   1.1      cgd {
   1284   1.1      cgd 	register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
   1285   1.1      cgd 	register struct dcmpreg *pp;
   1286   1.1      cgd 	unsigned tail;
   1287   1.1      cgd 	int s, port, stat;
   1288   1.1      cgd 
   1289   1.1      cgd 	port = PORT(dev);
   1290   1.1      cgd 	pp = dcm_preg(dcm, port);
   1291   1.1      cgd 	s = splhigh();
   1292   1.1      cgd #ifdef KGDB
   1293   1.1      cgd 	if (dev != kgdb_dev)
   1294   1.1      cgd #endif
   1295   1.1      cgd 	if (dcmconsinit == 0) {
   1296   1.1      cgd 		(void) dcminit(dev, dcmdefaultrate);
   1297   1.1      cgd 		dcmconsinit = 1;
   1298   1.1      cgd 	}
   1299   1.1      cgd 	tail = pp->t_tail & TX_MASK;
   1300   1.1      cgd 	while (tail != (pp->t_head & TX_MASK))
   1301   1.1      cgd 		;
   1302   1.1      cgd 	dcm->dcm_tfifos[3-port][tail].data_char = c;
   1303   1.1      cgd 	pp->t_tail = tail = (tail + 1) & TX_MASK;
   1304   1.1      cgd 	SEM_LOCK(dcm);
   1305   1.1      cgd 	dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
   1306   1.1      cgd 	dcm->dcm_cr |= (1 << port);
   1307   1.1      cgd 	SEM_UNLOCK(dcm);
   1308   1.1      cgd 	while (tail != (pp->t_head & TX_MASK))
   1309   1.1      cgd 		;
   1310   1.1      cgd 	/*
   1311   1.1      cgd 	 * If board interrupts are enabled, just let our completion
   1312   1.1      cgd 	 * interrupt through in case some other port on the board
   1313   1.1      cgd 	 * was busy.  Otherwise we must clear the interrupt.
   1314   1.1      cgd 	 */
   1315   1.1      cgd 	if ((dcm->dcm_ic & IC_IE) == 0) {
   1316   1.1      cgd 		SEM_LOCK(dcm);
   1317   1.1      cgd 		stat = dcm->dcm_iir;
   1318   1.1      cgd 		SEM_UNLOCK(dcm);
   1319   1.1      cgd 	}
   1320   1.1      cgd 	splx(s);
   1321   1.1      cgd }
   1322   1.1      cgd #endif
   1323