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dcm.c revision 1.47.8.4
      1  1.47.8.4  nathanw /*	$NetBSD: dcm.c,v 1.47.8.4 2002/04/01 07:39:50 nathanw Exp $	*/
      2  1.47.8.2  nathanw 
      3  1.47.8.2  nathanw /*-
      4  1.47.8.2  nathanw  * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
      5  1.47.8.2  nathanw  * All rights reserved.
      6  1.47.8.2  nathanw  *
      7  1.47.8.2  nathanw  * This code is derived from software contributed to The NetBSD Foundation
      8  1.47.8.2  nathanw  * by Jason R. Thorpe.
      9  1.47.8.2  nathanw  *
     10  1.47.8.2  nathanw  * Redistribution and use in source and binary forms, with or without
     11  1.47.8.2  nathanw  * modification, are permitted provided that the following conditions
     12  1.47.8.2  nathanw  * are met:
     13  1.47.8.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     14  1.47.8.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     15  1.47.8.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.47.8.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     17  1.47.8.2  nathanw  *    documentation and/or other materials provided with the distribution.
     18  1.47.8.2  nathanw  * 3. All advertising materials mentioning features or use of this software
     19  1.47.8.2  nathanw  *    must display the following acknowledgement:
     20  1.47.8.2  nathanw  *	This product includes software developed by the NetBSD
     21  1.47.8.2  nathanw  *	Foundation, Inc. and its contributors.
     22  1.47.8.2  nathanw  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.47.8.2  nathanw  *    contributors may be used to endorse or promote products derived
     24  1.47.8.2  nathanw  *    from this software without specific prior written permission.
     25  1.47.8.2  nathanw  *
     26  1.47.8.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.47.8.2  nathanw  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.47.8.2  nathanw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.47.8.2  nathanw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.47.8.2  nathanw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.47.8.2  nathanw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.47.8.2  nathanw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.47.8.2  nathanw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.47.8.2  nathanw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.47.8.2  nathanw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.47.8.2  nathanw  * POSSIBILITY OF SUCH DAMAGE.
     37  1.47.8.2  nathanw  */
     38  1.47.8.2  nathanw 
     39  1.47.8.2  nathanw /*
     40  1.47.8.2  nathanw  * Copyright (c) 1988 University of Utah.
     41  1.47.8.2  nathanw  * Copyright (c) 1982, 1986, 1990, 1993
     42  1.47.8.2  nathanw  *	The Regents of the University of California.  All rights reserved.
     43  1.47.8.2  nathanw  *
     44  1.47.8.2  nathanw  * This code is derived from software contributed to Berkeley by
     45  1.47.8.2  nathanw  * the Systems Programming Group of the University of Utah Computer
     46  1.47.8.2  nathanw  * Science Department.
     47  1.47.8.2  nathanw  *
     48  1.47.8.2  nathanw  * Redistribution and use in source and binary forms, with or without
     49  1.47.8.2  nathanw  * modification, are permitted provided that the following conditions
     50  1.47.8.2  nathanw  * are met:
     51  1.47.8.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     52  1.47.8.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     53  1.47.8.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     54  1.47.8.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     55  1.47.8.2  nathanw  *    documentation and/or other materials provided with the distribution.
     56  1.47.8.2  nathanw  * 3. All advertising materials mentioning features or use of this software
     57  1.47.8.2  nathanw  *    must display the following acknowledgement:
     58  1.47.8.2  nathanw  *	This product includes software developed by the University of
     59  1.47.8.2  nathanw  *	California, Berkeley and its contributors.
     60  1.47.8.2  nathanw  * 4. Neither the name of the University nor the names of its contributors
     61  1.47.8.2  nathanw  *    may be used to endorse or promote products derived from this software
     62  1.47.8.2  nathanw  *    without specific prior written permission.
     63  1.47.8.2  nathanw  *
     64  1.47.8.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     65  1.47.8.2  nathanw  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     66  1.47.8.2  nathanw  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     67  1.47.8.2  nathanw  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     68  1.47.8.2  nathanw  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     69  1.47.8.2  nathanw  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     70  1.47.8.2  nathanw  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     71  1.47.8.2  nathanw  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     72  1.47.8.2  nathanw  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     73  1.47.8.2  nathanw  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     74  1.47.8.2  nathanw  * SUCH DAMAGE.
     75  1.47.8.2  nathanw  *
     76  1.47.8.2  nathanw  * from Utah: $Hdr: dcm.c 1.29 92/01/21$
     77  1.47.8.2  nathanw  *
     78  1.47.8.2  nathanw  *	@(#)dcm.c	8.4 (Berkeley) 1/12/94
     79  1.47.8.2  nathanw  */
     80  1.47.8.2  nathanw 
     81  1.47.8.2  nathanw /*
     82  1.47.8.2  nathanw  * TODO:
     83  1.47.8.2  nathanw  *	Timeouts
     84  1.47.8.2  nathanw  *	Test console support.
     85  1.47.8.2  nathanw  */
     86  1.47.8.2  nathanw 
     87  1.47.8.2  nathanw /*
     88  1.47.8.2  nathanw  *  98642/MUX
     89  1.47.8.2  nathanw  */
     90  1.47.8.2  nathanw 
     91  1.47.8.4  nathanw #include <sys/cdefs.h>
     92  1.47.8.4  nathanw __KERNEL_RCSID(0, "$NetBSD: dcm.c,v 1.47.8.4 2002/04/01 07:39:50 nathanw Exp $");
     93  1.47.8.4  nathanw 
     94  1.47.8.2  nathanw #include "opt_kgdb.h"
     95  1.47.8.2  nathanw 
     96  1.47.8.2  nathanw #include <sys/param.h>
     97  1.47.8.2  nathanw #include <sys/systm.h>
     98  1.47.8.2  nathanw #include <sys/ioctl.h>
     99  1.47.8.2  nathanw #include <sys/proc.h>
    100  1.47.8.2  nathanw #include <sys/tty.h>
    101  1.47.8.2  nathanw #include <sys/conf.h>
    102  1.47.8.2  nathanw #include <sys/file.h>
    103  1.47.8.2  nathanw #include <sys/uio.h>
    104  1.47.8.2  nathanw #include <sys/kernel.h>
    105  1.47.8.2  nathanw #include <sys/syslog.h>
    106  1.47.8.2  nathanw #include <sys/time.h>
    107  1.47.8.2  nathanw #include <sys/device.h>
    108  1.47.8.2  nathanw 
    109  1.47.8.2  nathanw #include <machine/autoconf.h>
    110  1.47.8.2  nathanw #include <machine/cpu.h>
    111  1.47.8.2  nathanw #include <machine/intr.h>
    112  1.47.8.2  nathanw 
    113  1.47.8.2  nathanw #include <dev/cons.h>
    114  1.47.8.2  nathanw 
    115  1.47.8.2  nathanw #include <hp300/dev/dioreg.h>
    116  1.47.8.2  nathanw #include <hp300/dev/diovar.h>
    117  1.47.8.2  nathanw #include <hp300/dev/diodevs.h>
    118  1.47.8.2  nathanw #include <hp300/dev/dcmreg.h>
    119  1.47.8.2  nathanw 
    120  1.47.8.2  nathanw #ifndef DEFAULT_BAUD_RATE
    121  1.47.8.2  nathanw #define DEFAULT_BAUD_RATE 9600
    122  1.47.8.2  nathanw #endif
    123  1.47.8.2  nathanw 
    124  1.47.8.2  nathanw struct speedtab dcmspeedtab[] = {
    125  1.47.8.2  nathanw 	{	0,	BR_0		},
    126  1.47.8.2  nathanw 	{	50,	BR_50		},
    127  1.47.8.2  nathanw 	{	75,	BR_75		},
    128  1.47.8.2  nathanw 	{	110,	BR_110		},
    129  1.47.8.2  nathanw 	{	134,	BR_134		},
    130  1.47.8.2  nathanw 	{	150,	BR_150		},
    131  1.47.8.2  nathanw 	{	300,	BR_300		},
    132  1.47.8.2  nathanw 	{	600,	BR_600		},
    133  1.47.8.2  nathanw 	{	1200,	BR_1200		},
    134  1.47.8.2  nathanw 	{	1800,	BR_1800		},
    135  1.47.8.2  nathanw 	{	2400,	BR_2400		},
    136  1.47.8.2  nathanw 	{	4800,	BR_4800		},
    137  1.47.8.2  nathanw 	{	9600,	BR_9600		},
    138  1.47.8.2  nathanw 	{	19200,	BR_19200	},
    139  1.47.8.2  nathanw 	{	38400,	BR_38400	},
    140  1.47.8.2  nathanw 	{	-1,	-1		},
    141  1.47.8.2  nathanw };
    142  1.47.8.2  nathanw 
    143  1.47.8.2  nathanw /* u-sec per character based on baudrate (assumes 1 start/8 data/1 stop bit) */
    144  1.47.8.2  nathanw #define	DCM_USPERCH(s)	(10000000 / (s))
    145  1.47.8.2  nathanw 
    146  1.47.8.2  nathanw /*
    147  1.47.8.2  nathanw  * Per board interrupt scheme.  16.7ms is the polling interrupt rate
    148  1.47.8.2  nathanw  * (16.7ms is about 550 baud, 38.4k is 72 chars in 16.7ms).
    149  1.47.8.2  nathanw  */
    150  1.47.8.2  nathanw #define DIS_TIMER	0
    151  1.47.8.2  nathanw #define DIS_PERCHAR	1
    152  1.47.8.2  nathanw #define DIS_RESET	2
    153  1.47.8.2  nathanw 
    154  1.47.8.2  nathanw int	dcmistype = -1;		/* -1 == dynamic, 0 == timer, 1 == perchar */
    155  1.47.8.2  nathanw int     dcminterval = 5;	/* interval (secs) between checks */
    156  1.47.8.2  nathanw struct	dcmischeme {
    157  1.47.8.2  nathanw 	int	dis_perchar;	/* non-zero if interrupting per char */
    158  1.47.8.2  nathanw 	long	dis_time;	/* last time examined */
    159  1.47.8.2  nathanw 	int	dis_intr;	/* recv interrupts during last interval */
    160  1.47.8.2  nathanw 	int	dis_char;	/* characters read during last interval */
    161  1.47.8.2  nathanw };
    162  1.47.8.2  nathanw 
    163  1.47.8.2  nathanw #ifdef KGDB
    164  1.47.8.2  nathanw /*
    165  1.47.8.2  nathanw  * Kernel GDB support
    166  1.47.8.2  nathanw  */
    167  1.47.8.2  nathanw #include <machine/remote-sl.h>
    168  1.47.8.2  nathanw 
    169  1.47.8.2  nathanw extern dev_t kgdb_dev;
    170  1.47.8.2  nathanw extern int kgdb_rate;
    171  1.47.8.2  nathanw extern int kgdb_debug_init;
    172  1.47.8.2  nathanw #endif
    173  1.47.8.2  nathanw 
    174  1.47.8.2  nathanw /* #define DCMSTATS */
    175  1.47.8.2  nathanw 
    176  1.47.8.2  nathanw #ifdef DEBUG
    177  1.47.8.2  nathanw int	dcmdebug = 0x0;
    178  1.47.8.2  nathanw #define DDB_SIOERR	0x01
    179  1.47.8.2  nathanw #define DDB_PARAM	0x02
    180  1.47.8.2  nathanw #define DDB_INPUT	0x04
    181  1.47.8.2  nathanw #define DDB_OUTPUT	0x08
    182  1.47.8.2  nathanw #define DDB_INTR	0x10
    183  1.47.8.2  nathanw #define DDB_IOCTL	0x20
    184  1.47.8.2  nathanw #define DDB_INTSCHM	0x40
    185  1.47.8.2  nathanw #define DDB_MODEM	0x80
    186  1.47.8.2  nathanw #define DDB_OPENCLOSE	0x100
    187  1.47.8.2  nathanw #endif
    188  1.47.8.2  nathanw 
    189  1.47.8.2  nathanw #ifdef DCMSTATS
    190  1.47.8.2  nathanw #define	DCMRBSIZE	94
    191  1.47.8.2  nathanw #define DCMXBSIZE	24
    192  1.47.8.2  nathanw 
    193  1.47.8.2  nathanw struct	dcmstats {
    194  1.47.8.2  nathanw 	long	xints;		    /* # of xmit ints */
    195  1.47.8.2  nathanw 	long	xchars;		    /* # of xmit chars */
    196  1.47.8.2  nathanw 	long	xempty;		    /* times outq is empty in dcmstart */
    197  1.47.8.2  nathanw 	long	xrestarts;	    /* times completed while xmitting */
    198  1.47.8.2  nathanw 	long	rints;		    /* # of recv ints */
    199  1.47.8.2  nathanw 	long	rchars;		    /* # of recv chars */
    200  1.47.8.2  nathanw 	long	xsilo[DCMXBSIZE+2]; /* times this many chars xmit on one int */
    201  1.47.8.2  nathanw 	long	rsilo[DCMRBSIZE+2]; /* times this many chars read on one int */
    202  1.47.8.2  nathanw };
    203  1.47.8.2  nathanw #endif
    204  1.47.8.2  nathanw 
    205  1.47.8.2  nathanw #define DCMUNIT(x)		(minor(x) & 0x7ffff)
    206  1.47.8.2  nathanw #define	DCMDIALOUT(x)		(minor(x) & 0x80000)
    207  1.47.8.2  nathanw #define	DCMBOARD(x)		(((x) >> 2) & 0x3f)
    208  1.47.8.2  nathanw #define DCMPORT(x)		((x) & 3)
    209  1.47.8.2  nathanw 
    210  1.47.8.2  nathanw /*
    211  1.47.8.2  nathanw  * Conversion from "HP DCE" to almost-normal DCE: on the 638 8-port mux,
    212  1.47.8.2  nathanw  * the distribution panel uses "HP DCE" conventions.  If requested via
    213  1.47.8.2  nathanw  * the device flags, we swap the inputs to something closer to normal DCE,
    214  1.47.8.2  nathanw  * allowing a straight-through cable to a DTE or a reversed cable
    215  1.47.8.2  nathanw  * to a DCE (reversing 2-3, 4-5, 8-20 and leaving 6 unconnected;
    216  1.47.8.2  nathanw  * this gets "DCD" on pin 20 and "CTS" on 4, but doesn't connect
    217  1.47.8.2  nathanw  * DSR or make RTS work, though).  The following gives the full
    218  1.47.8.2  nathanw  * details of a cable from this mux panel to a modem:
    219  1.47.8.2  nathanw  *
    220  1.47.8.2  nathanw  *		     HP		    modem
    221  1.47.8.2  nathanw  *		name	pin	pin	name
    222  1.47.8.2  nathanw  * HP inputs:
    223  1.47.8.2  nathanw  *		"Rx"	 2	 3	Tx
    224  1.47.8.2  nathanw  *		CTS	 4	 5	CTS	(only needed for CCTS_OFLOW)
    225  1.47.8.2  nathanw  *		DCD	20	 8	DCD
    226  1.47.8.2  nathanw  *		"DSR"	 9	 6	DSR	(unneeded)
    227  1.47.8.2  nathanw  *		RI	22	22	RI	(unneeded)
    228  1.47.8.2  nathanw  *
    229  1.47.8.2  nathanw  * HP outputs:
    230  1.47.8.2  nathanw  *		"Tx"	 3	 2	Rx
    231  1.47.8.2  nathanw  *		"DTR"	 6	not connected
    232  1.47.8.2  nathanw  *		"RTS"	 8	20	DTR
    233  1.47.8.2  nathanw  *		"SR"	23	 4	RTS	(often not needed)
    234  1.47.8.2  nathanw  */
    235  1.47.8.2  nathanw #define hp2dce_in(ibits)	(iconv[(ibits) & 0xf])
    236  1.47.8.2  nathanw static char iconv[16] = {
    237  1.47.8.2  nathanw 	0,		MI_DM,		MI_CTS,		MI_CTS|MI_DM,
    238  1.47.8.2  nathanw 	MI_CD,		MI_CD|MI_DM,	MI_CD|MI_CTS,	MI_CD|MI_CTS|MI_DM,
    239  1.47.8.2  nathanw 	MI_RI,		MI_RI|MI_DM,	MI_RI|MI_CTS,	MI_RI|MI_CTS|MI_DM,
    240  1.47.8.2  nathanw 	MI_RI|MI_CD,	MI_RI|MI_CD|MI_DM, MI_RI|MI_CD|MI_CTS,
    241  1.47.8.2  nathanw 	MI_RI|MI_CD|MI_CTS|MI_DM
    242  1.47.8.2  nathanw };
    243  1.47.8.2  nathanw 
    244  1.47.8.2  nathanw /*
    245  1.47.8.2  nathanw  * Note that 8-port boards appear as 2 4-port boards at consecutive
    246  1.47.8.2  nathanw  * select codes.
    247  1.47.8.2  nathanw  */
    248  1.47.8.2  nathanw #define	NDCMPORT	4
    249  1.47.8.2  nathanw 
    250  1.47.8.2  nathanw struct	dcm_softc {
    251  1.47.8.2  nathanw 	struct	device sc_dev;		/* generic device glue */
    252  1.47.8.2  nathanw 	struct	dcmdevice *sc_dcm;	/* pointer to hardware */
    253  1.47.8.2  nathanw 	struct	tty *sc_tty[NDCMPORT];	/* our tty instances */
    254  1.47.8.2  nathanw 	struct	modemreg *sc_modem[NDCMPORT]; /* modem control */
    255  1.47.8.2  nathanw 	char	sc_mcndlast[NDCMPORT];	/* XXX last modem status for port */
    256  1.47.8.2  nathanw 	short	sc_softCAR;		/* mask of ports with soft-carrier */
    257  1.47.8.2  nathanw 	struct	dcmischeme sc_scheme;	/* interrupt scheme for board */
    258  1.47.8.2  nathanw 
    259  1.47.8.2  nathanw 	/*
    260  1.47.8.2  nathanw 	 * Mask of soft-carrier bits in config flags.
    261  1.47.8.2  nathanw 	 */
    262  1.47.8.2  nathanw #define	DCM_SOFTCAR	0x0000000f
    263  1.47.8.2  nathanw 
    264  1.47.8.2  nathanw 	int	sc_flags;		/* misc. configuration info */
    265  1.47.8.2  nathanw 
    266  1.47.8.2  nathanw 	/*
    267  1.47.8.2  nathanw 	 * Bits for sc_flags
    268  1.47.8.2  nathanw 	 */
    269  1.47.8.2  nathanw #define	DCM_ACTIVE	0x00000001	/* indicates board is alive */
    270  1.47.8.2  nathanw #define	DCM_ISCONSOLE	0x00000002	/* indicates board is console */
    271  1.47.8.2  nathanw #define	DCM_STDDCE	0x00000010	/* re-map DCE to standard */
    272  1.47.8.2  nathanw #define	DCM_FLAGMASK	(DCM_STDDCE)	/* mask of valid bits in config flags */
    273  1.47.8.2  nathanw 
    274  1.47.8.2  nathanw #ifdef DCMSTATS
    275  1.47.8.2  nathanw 	struct	dcmstats sc_stats;	/* metrics gathering */
    276  1.47.8.2  nathanw #endif
    277  1.47.8.2  nathanw };
    278  1.47.8.2  nathanw 
    279  1.47.8.2  nathanw cdev_decl(dcm);
    280  1.47.8.2  nathanw 
    281  1.47.8.2  nathanw int	dcmintr __P((void *));
    282  1.47.8.2  nathanw void	dcmpint __P((struct dcm_softc *, int, int));
    283  1.47.8.2  nathanw void	dcmrint __P((struct dcm_softc *));
    284  1.47.8.2  nathanw void	dcmreadbuf __P((struct dcm_softc *, int));
    285  1.47.8.2  nathanw void	dcmxint __P((struct dcm_softc *, int));
    286  1.47.8.2  nathanw void	dcmmint __P((struct dcm_softc *, int, int));
    287  1.47.8.2  nathanw 
    288  1.47.8.2  nathanw int	dcmparam __P((struct tty *, struct termios *));
    289  1.47.8.2  nathanw void	dcmstart __P((struct tty *));
    290  1.47.8.2  nathanw void	dcmstop __P((struct tty *, int));
    291  1.47.8.2  nathanw int	dcmmctl __P((dev_t, int, int));
    292  1.47.8.2  nathanw void	dcmsetischeme __P((int, int));
    293  1.47.8.2  nathanw void	dcminit __P((struct dcmdevice *, int, int));
    294  1.47.8.2  nathanw 
    295  1.47.8.2  nathanw int	dcmselftest __P((struct dcm_softc *));
    296  1.47.8.2  nathanw 
    297  1.47.8.2  nathanw int	dcmcnattach __P((bus_space_tag_t, bus_addr_t, int));
    298  1.47.8.2  nathanw int	dcmcngetc __P((dev_t));
    299  1.47.8.2  nathanw void	dcmcnputc __P((dev_t, int));
    300  1.47.8.2  nathanw 
    301  1.47.8.2  nathanw int	dcmmatch __P((struct device *, struct cfdata *, void *));
    302  1.47.8.2  nathanw void	dcmattach __P((struct device *, struct device *, void *));
    303  1.47.8.2  nathanw 
    304  1.47.8.2  nathanw struct cfattach dcm_ca = {
    305  1.47.8.2  nathanw 	sizeof(struct dcm_softc), dcmmatch, dcmattach
    306  1.47.8.2  nathanw };
    307  1.47.8.2  nathanw 
    308  1.47.8.2  nathanw /*
    309  1.47.8.2  nathanw  * Stuff for DCM console support.  This could probably be done a little
    310  1.47.8.2  nathanw  * better.
    311  1.47.8.2  nathanw  */
    312  1.47.8.2  nathanw static	struct dcmdevice *dcm_cn = NULL;	/* pointer to hardware */
    313  1.47.8.2  nathanw static	int dcmconsinit;			/* has been initialized */
    314  1.47.8.2  nathanw /* static	int dcm_lastcnpri = CN_DEAD; */	/* XXX last priority */
    315  1.47.8.2  nathanw 
    316  1.47.8.2  nathanw static struct consdev dcm_cons = {
    317  1.47.8.2  nathanw        NULL, NULL, dcmcngetc, dcmcnputc, nullcnpollc, NULL, NODEV, CN_REMOTE
    318  1.47.8.2  nathanw };
    319  1.47.8.2  nathanw int	dcmconscode;
    320  1.47.8.2  nathanw int	dcmdefaultrate = DEFAULT_BAUD_RATE;
    321  1.47.8.2  nathanw int	dcmconbrdbusy = 0;
    322  1.47.8.2  nathanw int	dcmmajor;
    323  1.47.8.2  nathanw 
    324  1.47.8.2  nathanw extern struct cfdriver dcm_cd;
    325  1.47.8.2  nathanw 
    326  1.47.8.2  nathanw int
    327  1.47.8.2  nathanw dcmmatch(parent, match, aux)
    328  1.47.8.2  nathanw 	struct device *parent;
    329  1.47.8.2  nathanw 	struct cfdata *match;
    330  1.47.8.2  nathanw 	void *aux;
    331  1.47.8.2  nathanw {
    332  1.47.8.2  nathanw 	struct dio_attach_args *da = aux;
    333  1.47.8.2  nathanw 
    334  1.47.8.2  nathanw 	switch (da->da_id) {
    335  1.47.8.2  nathanw 	case DIO_DEVICE_ID_DCM:
    336  1.47.8.2  nathanw 	case DIO_DEVICE_ID_DCMREM:
    337  1.47.8.2  nathanw 		return (1);
    338  1.47.8.2  nathanw 	}
    339  1.47.8.2  nathanw 
    340  1.47.8.2  nathanw 	return (0);
    341  1.47.8.2  nathanw }
    342  1.47.8.2  nathanw 
    343  1.47.8.2  nathanw void
    344  1.47.8.2  nathanw dcmattach(parent, self, aux)
    345  1.47.8.2  nathanw 	struct device *parent, *self;
    346  1.47.8.2  nathanw 	void *aux;
    347  1.47.8.2  nathanw {
    348  1.47.8.2  nathanw 	struct dcm_softc *sc = (struct dcm_softc *)self;
    349  1.47.8.2  nathanw 	struct dio_attach_args *da = aux;
    350  1.47.8.2  nathanw 	struct dcmdevice *dcm;
    351  1.47.8.2  nathanw 	int brd = self->dv_unit;
    352  1.47.8.2  nathanw 	int scode = da->da_scode;
    353  1.47.8.2  nathanw 	int i, mbits, code, ipl;
    354  1.47.8.2  nathanw 
    355  1.47.8.2  nathanw 	sc->sc_flags = 0;
    356  1.47.8.2  nathanw 
    357  1.47.8.2  nathanw 	if (scode == dcmconscode) {
    358  1.47.8.2  nathanw 		dcm = dcm_cn;
    359  1.47.8.2  nathanw 		sc->sc_flags |= DCM_ISCONSOLE;
    360  1.47.8.2  nathanw 
    361  1.47.8.2  nathanw 		/*
    362  1.47.8.2  nathanw 		 * We didn't know which unit this would be during
    363  1.47.8.2  nathanw 		 * the console probe, so we have to fixup cn_dev here.
    364  1.47.8.2  nathanw 		 * Note that we always assume port 1 on the board.
    365  1.47.8.2  nathanw 		 */
    366  1.47.8.2  nathanw 		cn_tab->cn_dev = makedev(dcmmajor, (brd << 2) | DCMCONSPORT);
    367  1.47.8.2  nathanw 	} else {
    368  1.47.8.2  nathanw 		dcm = (struct dcmdevice *)iomap(dio_scodetopa(da->da_scode),
    369  1.47.8.2  nathanw 		    da->da_size);
    370  1.47.8.2  nathanw 		if (dcm == NULL) {
    371  1.47.8.2  nathanw 			printf("\n%s: can't map registers\n",
    372  1.47.8.2  nathanw 			    sc->sc_dev.dv_xname);
    373  1.47.8.2  nathanw 			return;
    374  1.47.8.2  nathanw 		}
    375  1.47.8.2  nathanw 	}
    376  1.47.8.2  nathanw 
    377  1.47.8.2  nathanw 	sc->sc_dcm = dcm;
    378  1.47.8.2  nathanw 
    379  1.47.8.2  nathanw 	ipl = DIO_IPL(dcm);
    380  1.47.8.2  nathanw 	printf(" ipl %d", ipl);
    381  1.47.8.2  nathanw 
    382  1.47.8.2  nathanw 	/*
    383  1.47.8.2  nathanw 	 * XXX someone _should_ fix this; the self test screws
    384  1.47.8.2  nathanw 	 * autoconfig messages.
    385  1.47.8.2  nathanw 	 */
    386  1.47.8.2  nathanw 	if ((sc->sc_flags & DCM_ISCONSOLE) && dcmselftest(sc)) {
    387  1.47.8.2  nathanw 		printf("\n%s: self-test failed\n", sc->sc_dev.dv_xname);
    388  1.47.8.2  nathanw 		return;
    389  1.47.8.2  nathanw 	}
    390  1.47.8.2  nathanw 
    391  1.47.8.2  nathanw 	/* Extract configuration info from flags. */
    392  1.47.8.2  nathanw 	sc->sc_softCAR = self->dv_cfdata->cf_flags & DCM_SOFTCAR;
    393  1.47.8.2  nathanw 	sc->sc_flags |= self->dv_cfdata->cf_flags & DCM_FLAGMASK;
    394  1.47.8.2  nathanw 
    395  1.47.8.2  nathanw 	/* Mark our unit as configured. */
    396  1.47.8.2  nathanw 	sc->sc_flags |= DCM_ACTIVE;
    397  1.47.8.2  nathanw 
    398  1.47.8.2  nathanw 	/* Establish the interrupt handler. */
    399  1.47.8.2  nathanw 	(void) dio_intr_establish(dcmintr, sc, ipl, IPL_TTY);
    400  1.47.8.2  nathanw 
    401  1.47.8.2  nathanw 	if (dcmistype == DIS_TIMER)
    402  1.47.8.2  nathanw 		dcmsetischeme(brd, DIS_RESET|DIS_TIMER);
    403  1.47.8.2  nathanw 	else
    404  1.47.8.2  nathanw 		dcmsetischeme(brd, DIS_RESET|DIS_PERCHAR);
    405  1.47.8.2  nathanw 
    406  1.47.8.2  nathanw 	/* load pointers to modem control */
    407  1.47.8.2  nathanw 	sc->sc_modem[0] = &dcm->dcm_modem0;
    408  1.47.8.2  nathanw 	sc->sc_modem[1] = &dcm->dcm_modem1;
    409  1.47.8.2  nathanw 	sc->sc_modem[2] = &dcm->dcm_modem2;
    410  1.47.8.2  nathanw 	sc->sc_modem[3] = &dcm->dcm_modem3;
    411  1.47.8.2  nathanw 
    412  1.47.8.2  nathanw 	/* set DCD (modem) and CTS (flow control) on all ports */
    413  1.47.8.2  nathanw 	if (sc->sc_flags & DCM_STDDCE)
    414  1.47.8.2  nathanw 		mbits = hp2dce_in(MI_CD|MI_CTS);
    415  1.47.8.2  nathanw 	else
    416  1.47.8.2  nathanw 		mbits = MI_CD|MI_CTS;
    417  1.47.8.2  nathanw 
    418  1.47.8.2  nathanw 	for (i = 0; i < NDCMPORT; i++)
    419  1.47.8.2  nathanw 		sc->sc_modem[i]->mdmmsk = mbits;
    420  1.47.8.2  nathanw 
    421  1.47.8.2  nathanw 	/*
    422  1.47.8.2  nathanw 	 * Get current state of mdmin register on all ports, so that
    423  1.47.8.2  nathanw 	 * deltas will work properly.
    424  1.47.8.2  nathanw 	 */
    425  1.47.8.2  nathanw 	for (i = 0; i < NDCMPORT; i++) {
    426  1.47.8.2  nathanw 		code = sc->sc_modem[i]->mdmin;
    427  1.47.8.2  nathanw 		if (sc->sc_flags & DCM_STDDCE)
    428  1.47.8.2  nathanw 			code = hp2dce_in(code);
    429  1.47.8.2  nathanw 		sc->sc_mcndlast[i] = code;
    430  1.47.8.2  nathanw 	}
    431  1.47.8.2  nathanw 
    432  1.47.8.2  nathanw 	dcm->dcm_ic = IC_IE;		/* turn all interrupts on */
    433  1.47.8.2  nathanw 
    434  1.47.8.2  nathanw 	/*
    435  1.47.8.2  nathanw 	 * Need to reset baud rate, etc. of next print so reset dcmconsinit.
    436  1.47.8.2  nathanw 	 * Also make sure console is always "hardwired"
    437  1.47.8.2  nathanw 	 */
    438  1.47.8.2  nathanw 	if (sc->sc_flags & DCM_ISCONSOLE) {
    439  1.47.8.2  nathanw 		dcmconsinit = 0;
    440  1.47.8.2  nathanw 		sc->sc_softCAR |= (1 << DCMCONSPORT);
    441  1.47.8.2  nathanw 		printf(": console on port %d\n", DCMCONSPORT);
    442  1.47.8.2  nathanw 	} else
    443  1.47.8.2  nathanw 		printf("\n");
    444  1.47.8.2  nathanw 
    445  1.47.8.2  nathanw #ifdef KGDB
    446  1.47.8.2  nathanw 	if (major(kgdb_dev) == dcmmajor &&
    447  1.47.8.2  nathanw 	    DCMBOARD(DCMUNIT(kgdb_dev)) == brd) {
    448  1.47.8.2  nathanw 		if (dcmconsole == DCMUNIT(kgdb_dev))	/* XXX fixme */
    449  1.47.8.2  nathanw 			kgdb_dev = NODEV; /* can't debug over console port */
    450  1.47.8.2  nathanw #ifndef KGDB_CHEAT
    451  1.47.8.2  nathanw 		/*
    452  1.47.8.2  nathanw 		 * The following could potentially be replaced
    453  1.47.8.2  nathanw 		 * by the corresponding code in dcmcnprobe.
    454  1.47.8.2  nathanw 		 */
    455  1.47.8.2  nathanw 		else {
    456  1.47.8.2  nathanw 			dcminit(dcm, DCMPORT(DCMUNIT(kgdb_dev)),
    457  1.47.8.2  nathanw 			    kgdb_rate);
    458  1.47.8.2  nathanw 			if (kgdb_debug_init) {
    459  1.47.8.2  nathanw 				printf("%s port %d: ", sc->sc_dev.dv_xname,
    460  1.47.8.2  nathanw 				    DCMPORT(DCMUNIT(kgdb_dev)));
    461  1.47.8.2  nathanw 				kgdb_connect(1);
    462  1.47.8.2  nathanw 			} else
    463  1.47.8.2  nathanw 				printf("%s port %d: kgdb enabled\n",
    464  1.47.8.2  nathanw 				    sc->sc_dev.dv_xname,
    465  1.47.8.2  nathanw 				    DCMPORT(DCMUNIT(kgdb_dev)));
    466  1.47.8.2  nathanw 		}
    467  1.47.8.2  nathanw 		/* end could be replaced */
    468  1.47.8.2  nathanw #endif /* KGDB_CHEAT */
    469  1.47.8.2  nathanw 	}
    470  1.47.8.2  nathanw #endif /* KGDB */
    471  1.47.8.2  nathanw }
    472  1.47.8.2  nathanw 
    473  1.47.8.2  nathanw /* ARGSUSED */
    474  1.47.8.2  nathanw int
    475  1.47.8.2  nathanw dcmopen(dev, flag, mode, p)
    476  1.47.8.2  nathanw 	dev_t dev;
    477  1.47.8.2  nathanw 	int flag, mode;
    478  1.47.8.2  nathanw 	struct proc *p;
    479  1.47.8.2  nathanw {
    480  1.47.8.2  nathanw 	struct dcm_softc *sc;
    481  1.47.8.2  nathanw 	struct tty *tp;
    482  1.47.8.2  nathanw 	int unit, brd, port;
    483  1.47.8.2  nathanw 	int error = 0, mbits, s;
    484  1.47.8.2  nathanw 
    485  1.47.8.2  nathanw 	unit = DCMUNIT(dev);
    486  1.47.8.2  nathanw 	brd = DCMBOARD(unit);
    487  1.47.8.2  nathanw 	port = DCMPORT(unit);
    488  1.47.8.2  nathanw 
    489  1.47.8.2  nathanw 	if (brd >= dcm_cd.cd_ndevs || port >= NDCMPORT ||
    490  1.47.8.2  nathanw 	    (sc = dcm_cd.cd_devs[brd]) == NULL)
    491  1.47.8.2  nathanw 		return (ENXIO);
    492  1.47.8.2  nathanw 
    493  1.47.8.2  nathanw 	if ((sc->sc_flags & DCM_ACTIVE) == 0)
    494  1.47.8.2  nathanw 		return (ENXIO);
    495  1.47.8.2  nathanw 
    496  1.47.8.2  nathanw 	if (sc->sc_tty[port] == NULL) {
    497  1.47.8.2  nathanw 		tp = sc->sc_tty[port] = ttymalloc();
    498  1.47.8.2  nathanw 		tty_attach(tp);
    499  1.47.8.2  nathanw 	} else
    500  1.47.8.2  nathanw 		tp = sc->sc_tty[port];
    501  1.47.8.2  nathanw 
    502  1.47.8.2  nathanw 	tp->t_oproc = dcmstart;
    503  1.47.8.2  nathanw 	tp->t_param = dcmparam;
    504  1.47.8.2  nathanw 	tp->t_dev = dev;
    505  1.47.8.2  nathanw 
    506  1.47.8.2  nathanw 	if ((tp->t_state & TS_ISOPEN) &&
    507  1.47.8.2  nathanw 	    (tp->t_state & TS_XCLUDE) &&
    508  1.47.8.2  nathanw 	    p->p_ucred->cr_uid != 0)
    509  1.47.8.2  nathanw 		return (EBUSY);
    510  1.47.8.2  nathanw 
    511  1.47.8.2  nathanw 	s = spltty();
    512  1.47.8.2  nathanw 
    513  1.47.8.2  nathanw 	if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
    514  1.47.8.2  nathanw 		/*
    515  1.47.8.2  nathanw 		 * Sanity clause: reset the card on first open.
    516  1.47.8.2  nathanw 		 * The card might be left in an inconsistent state
    517  1.47.8.2  nathanw 		 * if the card memory is read inadvertently.
    518  1.47.8.2  nathanw 		 */
    519  1.47.8.2  nathanw 		dcminit(sc->sc_dcm, port, dcmdefaultrate);
    520  1.47.8.2  nathanw 
    521  1.47.8.2  nathanw 		ttychars(tp);
    522  1.47.8.2  nathanw 		tp->t_iflag = TTYDEF_IFLAG;
    523  1.47.8.2  nathanw 		tp->t_oflag = TTYDEF_OFLAG;
    524  1.47.8.2  nathanw 		tp->t_cflag = TTYDEF_CFLAG;
    525  1.47.8.2  nathanw 		tp->t_lflag = TTYDEF_LFLAG;
    526  1.47.8.2  nathanw 		tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
    527  1.47.8.2  nathanw 
    528  1.47.8.2  nathanw 		(void) dcmparam(tp, &tp->t_termios);
    529  1.47.8.2  nathanw 		ttsetwater(tp);
    530  1.47.8.2  nathanw 
    531  1.47.8.2  nathanw 		/* Set modem control state. */
    532  1.47.8.2  nathanw 		mbits = MO_ON;
    533  1.47.8.2  nathanw 		if (sc->sc_flags & DCM_STDDCE)
    534  1.47.8.2  nathanw 			mbits |= MO_SR;	/* pin 23, could be used as RTS */
    535  1.47.8.2  nathanw 
    536  1.47.8.2  nathanw 		(void) dcmmctl(dev, mbits, DMSET);	/* enable port */
    537  1.47.8.2  nathanw 
    538  1.47.8.2  nathanw 		/* Set soft-carrier if so configured. */
    539  1.47.8.2  nathanw 		if ((sc->sc_softCAR & (1 << port)) ||
    540  1.47.8.2  nathanw 		    (dcmmctl(dev, MO_OFF, DMGET) & MI_CD))
    541  1.47.8.2  nathanw 			tp->t_state |= TS_CARR_ON;
    542  1.47.8.2  nathanw 	}
    543  1.47.8.2  nathanw 
    544  1.47.8.2  nathanw 	splx(s);
    545  1.47.8.2  nathanw 
    546  1.47.8.2  nathanw #ifdef DEBUG
    547  1.47.8.2  nathanw 	if (dcmdebug & DDB_MODEM)
    548  1.47.8.2  nathanw 		printf("%s: dcmopen port %d softcarr %c\n",
    549  1.47.8.2  nathanw 		       sc->sc_dev.dv_xname, port,
    550  1.47.8.2  nathanw 		       (tp->t_state & TS_CARR_ON) ? '1' : '0');
    551  1.47.8.2  nathanw #endif
    552  1.47.8.2  nathanw 
    553  1.47.8.2  nathanw 	error = ttyopen(tp, DCMDIALOUT(dev), (flag & O_NONBLOCK));
    554  1.47.8.2  nathanw 	if (error)
    555  1.47.8.2  nathanw 		goto bad;
    556  1.47.8.2  nathanw 
    557  1.47.8.2  nathanw #ifdef DEBUG
    558  1.47.8.2  nathanw 	if (dcmdebug & DDB_OPENCLOSE)
    559  1.47.8.2  nathanw 		printf("%s port %d: dcmopen: st %x fl %x\n",
    560  1.47.8.2  nathanw 			sc->sc_dev.dv_xname, port, tp->t_state, tp->t_flags);
    561  1.47.8.2  nathanw #endif
    562  1.47.8.2  nathanw 	error = (*tp->t_linesw->l_open)(dev, tp);
    563  1.47.8.2  nathanw 
    564  1.47.8.2  nathanw  bad:
    565  1.47.8.2  nathanw 	return (error);
    566  1.47.8.2  nathanw }
    567  1.47.8.2  nathanw 
    568  1.47.8.2  nathanw /*ARGSUSED*/
    569  1.47.8.2  nathanw int
    570  1.47.8.2  nathanw dcmclose(dev, flag, mode, p)
    571  1.47.8.2  nathanw 	dev_t dev;
    572  1.47.8.2  nathanw 	int flag, mode;
    573  1.47.8.2  nathanw 	struct proc *p;
    574  1.47.8.2  nathanw {
    575  1.47.8.2  nathanw 	int s, unit, board, port;
    576  1.47.8.2  nathanw 	struct dcm_softc *sc;
    577  1.47.8.2  nathanw 	struct tty *tp;
    578  1.47.8.2  nathanw 
    579  1.47.8.2  nathanw 	unit = DCMUNIT(dev);
    580  1.47.8.2  nathanw 	board = DCMBOARD(unit);
    581  1.47.8.2  nathanw 	port = DCMPORT(unit);
    582  1.47.8.2  nathanw 
    583  1.47.8.2  nathanw 	sc = dcm_cd.cd_devs[board];
    584  1.47.8.2  nathanw 	tp = sc->sc_tty[port];
    585  1.47.8.2  nathanw 
    586  1.47.8.2  nathanw 	(*tp->t_linesw->l_close)(tp, flag);
    587  1.47.8.2  nathanw 
    588  1.47.8.2  nathanw 	s = spltty();
    589  1.47.8.2  nathanw 
    590  1.47.8.2  nathanw 	if (tp->t_cflag & HUPCL || tp->t_wopen != 0 ||
    591  1.47.8.2  nathanw 	    (tp->t_state & TS_ISOPEN) == 0)
    592  1.47.8.2  nathanw 		(void) dcmmctl(dev, MO_OFF, DMSET);
    593  1.47.8.2  nathanw #ifdef DEBUG
    594  1.47.8.2  nathanw 	if (dcmdebug & DDB_OPENCLOSE)
    595  1.47.8.2  nathanw 		printf("%s port %d: dcmclose: st %x fl %x\n",
    596  1.47.8.2  nathanw 			sc->sc_dev.dv_xname, port, tp->t_state, tp->t_flags);
    597  1.47.8.2  nathanw #endif
    598  1.47.8.2  nathanw 	splx(s);
    599  1.47.8.2  nathanw 	ttyclose(tp);
    600  1.47.8.2  nathanw #if 0
    601  1.47.8.2  nathanw 	tty_detach(tp);
    602  1.47.8.2  nathanw 	ttyfree(tp);
    603  1.47.8.2  nathanw 	sc->sc_tty[port] == NULL;
    604  1.47.8.2  nathanw #endif
    605  1.47.8.2  nathanw 	return (0);
    606  1.47.8.2  nathanw }
    607  1.47.8.2  nathanw 
    608  1.47.8.2  nathanw int
    609  1.47.8.2  nathanw dcmread(dev, uio, flag)
    610  1.47.8.2  nathanw 	dev_t dev;
    611  1.47.8.2  nathanw 	struct uio *uio;
    612  1.47.8.2  nathanw 	int flag;
    613  1.47.8.2  nathanw {
    614  1.47.8.2  nathanw 	int unit, board, port;
    615  1.47.8.2  nathanw 	struct dcm_softc *sc;
    616  1.47.8.2  nathanw 	struct tty *tp;
    617  1.47.8.2  nathanw 
    618  1.47.8.2  nathanw 	unit = DCMUNIT(dev);
    619  1.47.8.2  nathanw 	board = DCMBOARD(unit);
    620  1.47.8.2  nathanw 	port = DCMPORT(unit);
    621  1.47.8.2  nathanw 
    622  1.47.8.2  nathanw 	sc = dcm_cd.cd_devs[board];
    623  1.47.8.2  nathanw 	tp = sc->sc_tty[port];
    624  1.47.8.2  nathanw 
    625  1.47.8.2  nathanw 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    626  1.47.8.2  nathanw }
    627  1.47.8.2  nathanw 
    628  1.47.8.2  nathanw int
    629  1.47.8.2  nathanw dcmwrite(dev, uio, flag)
    630  1.47.8.2  nathanw 	dev_t dev;
    631  1.47.8.2  nathanw 	struct uio *uio;
    632  1.47.8.2  nathanw 	int flag;
    633  1.47.8.2  nathanw {
    634  1.47.8.2  nathanw 	int unit, board, port;
    635  1.47.8.2  nathanw 	struct dcm_softc *sc;
    636  1.47.8.2  nathanw 	struct tty *tp;
    637  1.47.8.2  nathanw 
    638  1.47.8.2  nathanw 	unit = DCMUNIT(dev);
    639  1.47.8.2  nathanw 	board = DCMBOARD(unit);
    640  1.47.8.2  nathanw 	port = DCMPORT(unit);
    641  1.47.8.2  nathanw 
    642  1.47.8.2  nathanw 	sc = dcm_cd.cd_devs[board];
    643  1.47.8.2  nathanw 	tp = sc->sc_tty[port];
    644  1.47.8.2  nathanw 
    645  1.47.8.2  nathanw 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    646  1.47.8.2  nathanw }
    647  1.47.8.2  nathanw 
    648  1.47.8.2  nathanw int
    649  1.47.8.2  nathanw dcmpoll(dev, events, p)
    650  1.47.8.2  nathanw 	dev_t dev;
    651  1.47.8.2  nathanw 	int events;
    652  1.47.8.2  nathanw 	struct proc *p;
    653  1.47.8.2  nathanw {
    654  1.47.8.2  nathanw 	int unit, board, port;
    655  1.47.8.2  nathanw 	struct dcm_softc *sc;
    656  1.47.8.2  nathanw 	struct tty *tp;
    657  1.47.8.2  nathanw 
    658  1.47.8.2  nathanw 	unit = DCMUNIT(dev);
    659  1.47.8.2  nathanw 	board = DCMBOARD(unit);
    660  1.47.8.2  nathanw 	port = DCMPORT(unit);
    661  1.47.8.2  nathanw 
    662  1.47.8.2  nathanw 	sc = dcm_cd.cd_devs[board];
    663  1.47.8.2  nathanw 	tp = sc->sc_tty[port];
    664  1.47.8.2  nathanw 
    665  1.47.8.2  nathanw 	return ((*tp->t_linesw->l_poll)(tp, events, p));
    666  1.47.8.2  nathanw }
    667  1.47.8.2  nathanw 
    668  1.47.8.2  nathanw struct tty *
    669  1.47.8.2  nathanw dcmtty(dev)
    670  1.47.8.2  nathanw 	dev_t dev;
    671  1.47.8.2  nathanw {
    672  1.47.8.2  nathanw 	int unit, board, port;
    673  1.47.8.2  nathanw 	struct dcm_softc *sc;
    674  1.47.8.2  nathanw 
    675  1.47.8.2  nathanw 	unit = DCMUNIT(dev);
    676  1.47.8.2  nathanw 	board = DCMBOARD(unit);
    677  1.47.8.2  nathanw 	port = DCMPORT(unit);
    678  1.47.8.2  nathanw 
    679  1.47.8.2  nathanw 	sc = dcm_cd.cd_devs[board];
    680  1.47.8.2  nathanw 
    681  1.47.8.2  nathanw 	return (sc->sc_tty[port]);
    682  1.47.8.2  nathanw }
    683  1.47.8.2  nathanw 
    684  1.47.8.2  nathanw int
    685  1.47.8.2  nathanw dcmintr(arg)
    686  1.47.8.2  nathanw 	void *arg;
    687  1.47.8.2  nathanw {
    688  1.47.8.2  nathanw 	struct dcm_softc *sc = arg;
    689  1.47.8.2  nathanw 	struct dcmdevice *dcm = sc->sc_dcm;
    690  1.47.8.2  nathanw 	struct dcmischeme *dis = &sc->sc_scheme;
    691  1.47.8.2  nathanw 	int brd = sc->sc_dev.dv_unit;
    692  1.47.8.2  nathanw 	int code, i;
    693  1.47.8.2  nathanw 	int pcnd[4], mcode, mcnd[4];
    694  1.47.8.2  nathanw 
    695  1.47.8.2  nathanw 	/*
    696  1.47.8.2  nathanw 	 * Do all guarded accesses right off to minimize
    697  1.47.8.2  nathanw 	 * block out of hardware.
    698  1.47.8.2  nathanw 	 */
    699  1.47.8.2  nathanw 	SEM_LOCK(dcm);
    700  1.47.8.2  nathanw 	if ((dcm->dcm_ic & IC_IR) == 0) {
    701  1.47.8.2  nathanw 		SEM_UNLOCK(dcm);
    702  1.47.8.2  nathanw 		return (0);
    703  1.47.8.2  nathanw 	}
    704  1.47.8.2  nathanw 	for (i = 0; i < 4; i++) {
    705  1.47.8.2  nathanw 		pcnd[i] = dcm->dcm_icrtab[i].dcm_data;
    706  1.47.8.2  nathanw 		dcm->dcm_icrtab[i].dcm_data = 0;
    707  1.47.8.2  nathanw 		code = sc->sc_modem[i]->mdmin;
    708  1.47.8.2  nathanw 		if (sc->sc_flags & DCM_STDDCE)
    709  1.47.8.2  nathanw 			code = hp2dce_in(code);
    710  1.47.8.2  nathanw 		mcnd[i] = code;
    711  1.47.8.2  nathanw 	}
    712  1.47.8.2  nathanw 	code = dcm->dcm_iir & IIR_MASK;
    713  1.47.8.2  nathanw 	dcm->dcm_iir = 0;	/* XXX doc claims read clears interrupt?! */
    714  1.47.8.2  nathanw 	mcode = dcm->dcm_modemintr;
    715  1.47.8.2  nathanw 	dcm->dcm_modemintr = 0;
    716  1.47.8.2  nathanw 	SEM_UNLOCK(dcm);
    717  1.47.8.2  nathanw 
    718  1.47.8.2  nathanw #ifdef DEBUG
    719  1.47.8.2  nathanw 	if (dcmdebug & DDB_INTR) {
    720  1.47.8.2  nathanw 		printf("%s: dcmintr: iir %x pc %x/%x/%x/%x ",
    721  1.47.8.2  nathanw 		       sc->sc_dev.dv_xname, code, pcnd[0], pcnd[1],
    722  1.47.8.2  nathanw 		       pcnd[2], pcnd[3]);
    723  1.47.8.2  nathanw 		printf("miir %x mc %x/%x/%x/%x\n",
    724  1.47.8.2  nathanw 		       mcode, mcnd[0], mcnd[1], mcnd[2], mcnd[3]);
    725  1.47.8.2  nathanw 	}
    726  1.47.8.2  nathanw #endif
    727  1.47.8.2  nathanw 	if (code & IIR_TIMEO)
    728  1.47.8.2  nathanw 		dcmrint(sc);
    729  1.47.8.2  nathanw 	if (code & IIR_PORT0)
    730  1.47.8.2  nathanw 		dcmpint(sc, 0, pcnd[0]);
    731  1.47.8.2  nathanw 	if (code & IIR_PORT1)
    732  1.47.8.2  nathanw 		dcmpint(sc, 1, pcnd[1]);
    733  1.47.8.2  nathanw 	if (code & IIR_PORT2)
    734  1.47.8.2  nathanw 		dcmpint(sc, 2, pcnd[2]);
    735  1.47.8.2  nathanw 	if (code & IIR_PORT3)
    736  1.47.8.2  nathanw 		dcmpint(sc, 3, pcnd[3]);
    737  1.47.8.2  nathanw 	if (code & IIR_MODM) {
    738  1.47.8.2  nathanw 		if (mcode == 0 || mcode & 0x1)	/* mcode==0 -> 98642 board */
    739  1.47.8.2  nathanw 			dcmmint(sc, 0, mcnd[0]);
    740  1.47.8.2  nathanw 		if (mcode & 0x2)
    741  1.47.8.2  nathanw 			dcmmint(sc, 1, mcnd[1]);
    742  1.47.8.2  nathanw 		if (mcode & 0x4)
    743  1.47.8.2  nathanw 			dcmmint(sc, 2, mcnd[2]);
    744  1.47.8.2  nathanw 		if (mcode & 0x8)
    745  1.47.8.2  nathanw 			dcmmint(sc, 3, mcnd[3]);
    746  1.47.8.2  nathanw 	}
    747  1.47.8.2  nathanw 
    748  1.47.8.2  nathanw 	/*
    749  1.47.8.2  nathanw 	 * Chalk up a receiver interrupt if the timer running or one of
    750  1.47.8.2  nathanw 	 * the ports reports a special character interrupt.
    751  1.47.8.2  nathanw 	 */
    752  1.47.8.2  nathanw 	if ((code & IIR_TIMEO) ||
    753  1.47.8.2  nathanw 	    ((pcnd[0]|pcnd[1]|pcnd[2]|pcnd[3]) & IT_SPEC))
    754  1.47.8.2  nathanw 		dis->dis_intr++;
    755  1.47.8.2  nathanw 	/*
    756  1.47.8.2  nathanw 	 * See if it is time to check/change the interrupt rate.
    757  1.47.8.2  nathanw 	 */
    758  1.47.8.2  nathanw 	if (dcmistype < 0 &&
    759  1.47.8.2  nathanw 	    (i = time.tv_sec - dis->dis_time) >= dcminterval) {
    760  1.47.8.2  nathanw 		/*
    761  1.47.8.2  nathanw 		 * If currently per-character and averaged over 70 interrupts
    762  1.47.8.2  nathanw 		 * per-second (66 is threshold of 600 baud) in last interval,
    763  1.47.8.2  nathanw 		 * switch to timer mode.
    764  1.47.8.2  nathanw 		 *
    765  1.47.8.2  nathanw 		 * XXX decay counts ala load average to avoid spikes?
    766  1.47.8.2  nathanw 		 */
    767  1.47.8.2  nathanw 		if (dis->dis_perchar && dis->dis_intr > 70 * i)
    768  1.47.8.2  nathanw 			dcmsetischeme(brd, DIS_TIMER);
    769  1.47.8.2  nathanw 		/*
    770  1.47.8.2  nathanw 		 * If currently using timer and had more interrupts than
    771  1.47.8.2  nathanw 		 * received characters in the last interval, switch back
    772  1.47.8.2  nathanw 		 * to per-character.  Note that after changing to per-char
    773  1.47.8.2  nathanw 		 * we must process any characters already in the queue
    774  1.47.8.2  nathanw 		 * since they may have arrived before the bitmap was setup.
    775  1.47.8.2  nathanw 		 *
    776  1.47.8.2  nathanw 		 * XXX decay counts?
    777  1.47.8.2  nathanw 		 */
    778  1.47.8.2  nathanw 		else if (!dis->dis_perchar && dis->dis_intr > dis->dis_char) {
    779  1.47.8.2  nathanw 			dcmsetischeme(brd, DIS_PERCHAR);
    780  1.47.8.2  nathanw 			dcmrint(sc);
    781  1.47.8.2  nathanw 		}
    782  1.47.8.2  nathanw 		dis->dis_intr = dis->dis_char = 0;
    783  1.47.8.2  nathanw 		dis->dis_time = time.tv_sec;
    784  1.47.8.2  nathanw 	}
    785  1.47.8.2  nathanw 	return (1);
    786  1.47.8.2  nathanw }
    787  1.47.8.2  nathanw 
    788  1.47.8.2  nathanw /*
    789  1.47.8.2  nathanw  *  Port interrupt.  Can be two things:
    790  1.47.8.2  nathanw  *	First, it might be a special character (exception interrupt);
    791  1.47.8.2  nathanw  *	Second, it may be a buffer empty (transmit interrupt);
    792  1.47.8.2  nathanw  */
    793  1.47.8.2  nathanw void
    794  1.47.8.2  nathanw dcmpint(sc, port, code)
    795  1.47.8.2  nathanw 	struct dcm_softc *sc;
    796  1.47.8.2  nathanw 	int port, code;
    797  1.47.8.2  nathanw {
    798  1.47.8.2  nathanw 
    799  1.47.8.2  nathanw 	if (code & IT_SPEC)
    800  1.47.8.2  nathanw 		dcmreadbuf(sc, port);
    801  1.47.8.2  nathanw 	if (code & IT_TX)
    802  1.47.8.2  nathanw 		dcmxint(sc, port);
    803  1.47.8.2  nathanw }
    804  1.47.8.2  nathanw 
    805  1.47.8.2  nathanw void
    806  1.47.8.2  nathanw dcmrint(sc)
    807  1.47.8.2  nathanw 	struct dcm_softc *sc;
    808  1.47.8.2  nathanw {
    809  1.47.8.2  nathanw 	int port;
    810  1.47.8.2  nathanw 
    811  1.47.8.2  nathanw 	for (port = 0; port < NDCMPORT; port++)
    812  1.47.8.2  nathanw 		dcmreadbuf(sc, port);
    813  1.47.8.2  nathanw }
    814  1.47.8.2  nathanw 
    815  1.47.8.2  nathanw void
    816  1.47.8.2  nathanw dcmreadbuf(sc, port)
    817  1.47.8.2  nathanw 	struct dcm_softc *sc;
    818  1.47.8.2  nathanw 	int port;
    819  1.47.8.2  nathanw {
    820  1.47.8.2  nathanw 	struct dcmdevice *dcm = sc->sc_dcm;
    821  1.47.8.2  nathanw 	struct dcmpreg *pp = dcm_preg(dcm, port);
    822  1.47.8.2  nathanw 	struct dcmrfifo *fifo;
    823  1.47.8.2  nathanw 	struct tty *tp;
    824  1.47.8.2  nathanw 	int c, stat;
    825  1.47.8.2  nathanw 	u_int head;
    826  1.47.8.2  nathanw 	int nch = 0;
    827  1.47.8.2  nathanw #ifdef DCMSTATS
    828  1.47.8.2  nathanw 	struct dcmstats *dsp = &sc->sc_stats;
    829  1.47.8.2  nathanw 
    830  1.47.8.2  nathanw 	dsp->rints++;
    831  1.47.8.2  nathanw #endif
    832  1.47.8.2  nathanw 	tp = sc->sc_tty[port];
    833  1.47.8.2  nathanw 	if (tp == NULL)
    834  1.47.8.2  nathanw 		return;
    835  1.47.8.2  nathanw 
    836  1.47.8.2  nathanw 	if ((tp->t_state & TS_ISOPEN) == 0) {
    837  1.47.8.2  nathanw #ifdef KGDB
    838  1.47.8.2  nathanw 		if ((makedev(dcmmajor, minor(tp->t_dev)) == kgdb_dev) &&
    839  1.47.8.2  nathanw 		    (head = pp->r_head & RX_MASK) != (pp->r_tail & RX_MASK) &&
    840  1.47.8.2  nathanw 		    dcm->dcm_rfifos[3-port][head>>1].data_char == FRAME_START) {
    841  1.47.8.2  nathanw 			pp->r_head = (head + 2) & RX_MASK;
    842  1.47.8.2  nathanw 			kgdb_connect(0);	/* trap into kgdb */
    843  1.47.8.2  nathanw 			return;
    844  1.47.8.2  nathanw 		}
    845  1.47.8.2  nathanw #endif /* KGDB */
    846  1.47.8.2  nathanw 		pp->r_head = pp->r_tail & RX_MASK;
    847  1.47.8.2  nathanw 		return;
    848  1.47.8.2  nathanw 	}
    849  1.47.8.2  nathanw 
    850  1.47.8.2  nathanw 	head = pp->r_head & RX_MASK;
    851  1.47.8.2  nathanw 	fifo = &dcm->dcm_rfifos[3-port][head>>1];
    852  1.47.8.2  nathanw 	/*
    853  1.47.8.2  nathanw 	 * XXX upper bound on how many chars we will take in one swallow?
    854  1.47.8.2  nathanw 	 */
    855  1.47.8.2  nathanw 	while (head != (pp->r_tail & RX_MASK)) {
    856  1.47.8.2  nathanw 		/*
    857  1.47.8.2  nathanw 		 * Get character/status and update head pointer as fast
    858  1.47.8.2  nathanw 		 * as possible to make room for more characters.
    859  1.47.8.2  nathanw 		 */
    860  1.47.8.2  nathanw 		c = fifo->data_char;
    861  1.47.8.2  nathanw 		stat = fifo->data_stat;
    862  1.47.8.2  nathanw 		head = (head + 2) & RX_MASK;
    863  1.47.8.2  nathanw 		pp->r_head = head;
    864  1.47.8.2  nathanw 		fifo = head ? fifo+1 : &dcm->dcm_rfifos[3-port][0];
    865  1.47.8.2  nathanw 		nch++;
    866  1.47.8.2  nathanw 
    867  1.47.8.2  nathanw #ifdef DEBUG
    868  1.47.8.2  nathanw 		if (dcmdebug & DDB_INPUT)
    869  1.47.8.2  nathanw 			printf("%s port %d: dcmreadbuf: c%x('%c') s%x f%x h%x t%x\n",
    870  1.47.8.2  nathanw 			       sc->sc_dev.dv_xname, port,
    871  1.47.8.2  nathanw 			       c&0xFF, c, stat&0xFF,
    872  1.47.8.2  nathanw 			       tp->t_flags, head, pp->r_tail);
    873  1.47.8.2  nathanw #endif
    874  1.47.8.2  nathanw 		/*
    875  1.47.8.2  nathanw 		 * Check for and handle errors
    876  1.47.8.2  nathanw 		 */
    877  1.47.8.2  nathanw 		if (stat & RD_MASK) {
    878  1.47.8.2  nathanw #ifdef DEBUG
    879  1.47.8.2  nathanw 			if (dcmdebug & (DDB_INPUT|DDB_SIOERR))
    880  1.47.8.2  nathanw 				printf("%s port %d: dcmreadbuf: err: c%x('%c') s%x\n",
    881  1.47.8.2  nathanw 				       sc->sc_dev.dv_xname, port,
    882  1.47.8.2  nathanw 				       stat, c&0xFF, c);
    883  1.47.8.2  nathanw #endif
    884  1.47.8.2  nathanw 			if (stat & (RD_BD | RD_FE))
    885  1.47.8.2  nathanw 				c |= TTY_FE;
    886  1.47.8.2  nathanw 			else if (stat & RD_PE)
    887  1.47.8.2  nathanw 				c |= TTY_PE;
    888  1.47.8.2  nathanw 			else if (stat & RD_OVF)
    889  1.47.8.2  nathanw 				log(LOG_WARNING,
    890  1.47.8.2  nathanw 				    "%s port %d: silo overflow\n",
    891  1.47.8.2  nathanw 				    sc->sc_dev.dv_xname, port);
    892  1.47.8.2  nathanw 			else if (stat & RD_OE)
    893  1.47.8.2  nathanw 				log(LOG_WARNING,
    894  1.47.8.2  nathanw 				    "%s port %d: uart overflow\n",
    895  1.47.8.2  nathanw 				    sc->sc_dev.dv_xname, port);
    896  1.47.8.2  nathanw 		}
    897  1.47.8.2  nathanw 		(*tp->t_linesw->l_rint)(c, tp);
    898  1.47.8.2  nathanw 	}
    899  1.47.8.2  nathanw 	sc->sc_scheme.dis_char += nch;
    900  1.47.8.2  nathanw 
    901  1.47.8.2  nathanw #ifdef DCMSTATS
    902  1.47.8.2  nathanw 	dsp->rchars += nch;
    903  1.47.8.2  nathanw 	if (nch <= DCMRBSIZE)
    904  1.47.8.2  nathanw 		dsp->rsilo[nch]++;
    905  1.47.8.2  nathanw 	else
    906  1.47.8.2  nathanw 		dsp->rsilo[DCMRBSIZE+1]++;
    907  1.47.8.2  nathanw #endif
    908  1.47.8.2  nathanw }
    909  1.47.8.2  nathanw 
    910  1.47.8.2  nathanw void
    911  1.47.8.2  nathanw dcmxint(sc, port)
    912  1.47.8.2  nathanw 	struct dcm_softc *sc;
    913  1.47.8.2  nathanw 	int port;
    914  1.47.8.2  nathanw {
    915  1.47.8.2  nathanw 	struct tty *tp;
    916  1.47.8.2  nathanw 
    917  1.47.8.2  nathanw 	tp = sc->sc_tty[port];
    918  1.47.8.2  nathanw 	if (tp == NULL || (tp->t_state & TS_ISOPEN) == 0)
    919  1.47.8.2  nathanw 		return;
    920  1.47.8.2  nathanw 
    921  1.47.8.2  nathanw 	tp->t_state &= ~TS_BUSY;
    922  1.47.8.2  nathanw 	if (tp->t_state & TS_FLUSH)
    923  1.47.8.2  nathanw 		tp->t_state &= ~TS_FLUSH;
    924  1.47.8.2  nathanw 	(*tp->t_linesw->l_start)(tp);
    925  1.47.8.2  nathanw }
    926  1.47.8.2  nathanw 
    927  1.47.8.2  nathanw void
    928  1.47.8.2  nathanw dcmmint(sc, port, mcnd)
    929  1.47.8.2  nathanw 	struct dcm_softc *sc;
    930  1.47.8.2  nathanw 	int port, mcnd;
    931  1.47.8.2  nathanw {
    932  1.47.8.2  nathanw 	int delta;
    933  1.47.8.2  nathanw 	struct tty *tp;
    934  1.47.8.2  nathanw 	struct dcmdevice *dcm = sc->sc_dcm;
    935  1.47.8.2  nathanw 
    936  1.47.8.2  nathanw 	tp = sc->sc_tty[port];
    937  1.47.8.2  nathanw 	if (tp == NULL || (tp->t_state & TS_ISOPEN) == 0)
    938  1.47.8.2  nathanw 		return;
    939  1.47.8.2  nathanw 
    940  1.47.8.2  nathanw #ifdef DEBUG
    941  1.47.8.2  nathanw 	if (dcmdebug & DDB_MODEM)
    942  1.47.8.2  nathanw 		printf("%s port %d: dcmmint: mcnd %x mcndlast %x\n",
    943  1.47.8.2  nathanw 		       sc->sc_dev.dv_xname, port, mcnd, sc->sc_mcndlast[port]);
    944  1.47.8.2  nathanw #endif
    945  1.47.8.2  nathanw 	delta = mcnd ^ sc->sc_mcndlast[port];
    946  1.47.8.2  nathanw 	sc->sc_mcndlast[port] = mcnd;
    947  1.47.8.2  nathanw 	if ((delta & MI_CTS) && (tp->t_state & TS_ISOPEN) &&
    948  1.47.8.2  nathanw 	    (tp->t_flags & CCTS_OFLOW)) {
    949  1.47.8.2  nathanw 		if (mcnd & MI_CTS) {
    950  1.47.8.2  nathanw 			tp->t_state &= ~TS_TTSTOP;
    951  1.47.8.2  nathanw 			ttstart(tp);
    952  1.47.8.2  nathanw 		} else
    953  1.47.8.2  nathanw 			tp->t_state |= TS_TTSTOP;	/* inline dcmstop */
    954  1.47.8.2  nathanw 	}
    955  1.47.8.2  nathanw 	if (delta & MI_CD) {
    956  1.47.8.2  nathanw 		if (mcnd & MI_CD)
    957  1.47.8.2  nathanw 			(void)(*tp->t_linesw->l_modem)(tp, 1);
    958  1.47.8.2  nathanw 		else if ((sc->sc_softCAR & (1 << port)) == 0 &&
    959  1.47.8.2  nathanw 		    (*tp->t_linesw->l_modem)(tp, 0) == 0) {
    960  1.47.8.2  nathanw 			sc->sc_modem[port]->mdmout = MO_OFF;
    961  1.47.8.2  nathanw 			SEM_LOCK(dcm);
    962  1.47.8.2  nathanw 			dcm->dcm_modemchng |= (1 << port);
    963  1.47.8.2  nathanw 			dcm->dcm_cr |= CR_MODM;
    964  1.47.8.2  nathanw 			SEM_UNLOCK(dcm);
    965  1.47.8.2  nathanw 			DELAY(10); /* time to change lines */
    966  1.47.8.2  nathanw 		}
    967  1.47.8.2  nathanw 	}
    968  1.47.8.2  nathanw }
    969  1.47.8.2  nathanw 
    970  1.47.8.2  nathanw int
    971  1.47.8.2  nathanw dcmioctl(dev, cmd, data, flag, p)
    972  1.47.8.2  nathanw 	dev_t dev;
    973  1.47.8.2  nathanw 	u_long cmd;
    974  1.47.8.2  nathanw 	caddr_t data;
    975  1.47.8.2  nathanw 	int flag;
    976  1.47.8.2  nathanw 	struct proc *p;
    977  1.47.8.2  nathanw {
    978  1.47.8.2  nathanw 	struct dcm_softc *sc;
    979  1.47.8.2  nathanw 	struct tty *tp;
    980  1.47.8.2  nathanw 	struct dcmdevice *dcm;
    981  1.47.8.2  nathanw 	int board, port, unit = DCMUNIT(dev);
    982  1.47.8.2  nathanw 	int error, s;
    983  1.47.8.2  nathanw 
    984  1.47.8.2  nathanw 	port = DCMPORT(unit);
    985  1.47.8.2  nathanw 	board = DCMBOARD(unit);
    986  1.47.8.2  nathanw 
    987  1.47.8.2  nathanw 	sc = dcm_cd.cd_devs[board];
    988  1.47.8.2  nathanw 	dcm = sc->sc_dcm;
    989  1.47.8.2  nathanw 	tp = sc->sc_tty[port];
    990  1.47.8.2  nathanw 
    991  1.47.8.2  nathanw #ifdef DEBUG
    992  1.47.8.2  nathanw 	if (dcmdebug & DDB_IOCTL)
    993  1.47.8.2  nathanw 		printf("%s port %d: dcmioctl: cmd %lx data %x flag %x\n",
    994  1.47.8.2  nathanw 		       sc->sc_dev.dv_xname, port, cmd, *data, flag);
    995  1.47.8.2  nathanw #endif
    996  1.47.8.4  nathanw 
    997  1.47.8.2  nathanw 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
    998  1.47.8.4  nathanw 	if (error != EPASSTHROUGH)
    999  1.47.8.2  nathanw 		return (error);
   1000  1.47.8.4  nathanw 
   1001  1.47.8.2  nathanw 	error = ttioctl(tp, cmd, data, flag, p);
   1002  1.47.8.4  nathanw 	if (error != EPASSTHROUGH)
   1003  1.47.8.2  nathanw 		return (error);
   1004  1.47.8.2  nathanw 
   1005  1.47.8.2  nathanw 	switch (cmd) {
   1006  1.47.8.2  nathanw 	case TIOCSBRK:
   1007  1.47.8.2  nathanw 		/*
   1008  1.47.8.2  nathanw 		 * Wait for transmitter buffer to empty
   1009  1.47.8.2  nathanw 		 */
   1010  1.47.8.2  nathanw 		s = spltty();
   1011  1.47.8.2  nathanw 		while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
   1012  1.47.8.2  nathanw 			DELAY(DCM_USPERCH(tp->t_ospeed));
   1013  1.47.8.2  nathanw 		SEM_LOCK(dcm);
   1014  1.47.8.2  nathanw 		dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
   1015  1.47.8.2  nathanw 		dcm->dcm_cr |= (1 << port);	/* start break */
   1016  1.47.8.2  nathanw 		SEM_UNLOCK(dcm);
   1017  1.47.8.2  nathanw 		splx(s);
   1018  1.47.8.2  nathanw 		break;
   1019  1.47.8.2  nathanw 
   1020  1.47.8.2  nathanw 	case TIOCCBRK:
   1021  1.47.8.2  nathanw 		SEM_LOCK(dcm);
   1022  1.47.8.2  nathanw 		dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
   1023  1.47.8.2  nathanw 		dcm->dcm_cr |= (1 << port);	/* end break */
   1024  1.47.8.2  nathanw 		SEM_UNLOCK(dcm);
   1025  1.47.8.2  nathanw 		break;
   1026  1.47.8.2  nathanw 
   1027  1.47.8.2  nathanw 	case TIOCSDTR:
   1028  1.47.8.2  nathanw 		(void) dcmmctl(dev, MO_ON, DMBIS);
   1029  1.47.8.2  nathanw 		break;
   1030  1.47.8.2  nathanw 
   1031  1.47.8.2  nathanw 	case TIOCCDTR:
   1032  1.47.8.2  nathanw 		(void) dcmmctl(dev, MO_ON, DMBIC);
   1033  1.47.8.2  nathanw 		break;
   1034  1.47.8.2  nathanw 
   1035  1.47.8.2  nathanw 	case TIOCMSET:
   1036  1.47.8.2  nathanw 		(void) dcmmctl(dev, *(int *)data, DMSET);
   1037  1.47.8.2  nathanw 		break;
   1038  1.47.8.2  nathanw 
   1039  1.47.8.2  nathanw 	case TIOCMBIS:
   1040  1.47.8.2  nathanw 		(void) dcmmctl(dev, *(int *)data, DMBIS);
   1041  1.47.8.2  nathanw 		break;
   1042  1.47.8.2  nathanw 
   1043  1.47.8.2  nathanw 	case TIOCMBIC:
   1044  1.47.8.2  nathanw 		(void) dcmmctl(dev, *(int *)data, DMBIC);
   1045  1.47.8.2  nathanw 		break;
   1046  1.47.8.2  nathanw 
   1047  1.47.8.2  nathanw 	case TIOCMGET:
   1048  1.47.8.2  nathanw 		*(int *)data = dcmmctl(dev, 0, DMGET);
   1049  1.47.8.2  nathanw 		break;
   1050  1.47.8.2  nathanw 
   1051  1.47.8.2  nathanw 	case TIOCGFLAGS: {
   1052  1.47.8.2  nathanw 		int bits = 0;
   1053  1.47.8.2  nathanw 
   1054  1.47.8.2  nathanw 		if ((sc->sc_softCAR & (1 << port)))
   1055  1.47.8.2  nathanw 			bits |= TIOCFLAG_SOFTCAR;
   1056  1.47.8.2  nathanw 
   1057  1.47.8.2  nathanw 		if (tp->t_cflag & CLOCAL)
   1058  1.47.8.2  nathanw 			bits |= TIOCFLAG_CLOCAL;
   1059  1.47.8.2  nathanw 
   1060  1.47.8.2  nathanw 		*(int *)data = bits;
   1061  1.47.8.2  nathanw 		break;
   1062  1.47.8.2  nathanw 	}
   1063  1.47.8.2  nathanw 
   1064  1.47.8.2  nathanw 	case TIOCSFLAGS: {
   1065  1.47.8.2  nathanw 		int userbits;
   1066  1.47.8.2  nathanw 
   1067  1.47.8.2  nathanw 		error = suser(p->p_ucred, &p->p_acflag);
   1068  1.47.8.2  nathanw 		if (error)
   1069  1.47.8.2  nathanw 			return (EPERM);
   1070  1.47.8.2  nathanw 
   1071  1.47.8.2  nathanw 		userbits = *(int *)data;
   1072  1.47.8.2  nathanw 
   1073  1.47.8.2  nathanw 		if ((userbits & TIOCFLAG_SOFTCAR) ||
   1074  1.47.8.2  nathanw 		    ((sc->sc_flags & DCM_ISCONSOLE) &&
   1075  1.47.8.2  nathanw 		    (port == DCMCONSPORT)))
   1076  1.47.8.2  nathanw 			sc->sc_softCAR |= (1 << port);
   1077  1.47.8.2  nathanw 
   1078  1.47.8.2  nathanw 		if (userbits & TIOCFLAG_CLOCAL)
   1079  1.47.8.2  nathanw 			tp->t_cflag |= CLOCAL;
   1080  1.47.8.2  nathanw 
   1081  1.47.8.2  nathanw 		break;
   1082  1.47.8.2  nathanw 	}
   1083  1.47.8.2  nathanw 
   1084  1.47.8.2  nathanw 	default:
   1085  1.47.8.4  nathanw 		return (EPASSTHROUGH);
   1086  1.47.8.2  nathanw 	}
   1087  1.47.8.2  nathanw 	return (0);
   1088  1.47.8.2  nathanw }
   1089  1.47.8.2  nathanw 
   1090  1.47.8.2  nathanw int
   1091  1.47.8.2  nathanw dcmparam(tp, t)
   1092  1.47.8.2  nathanw 	struct tty *tp;
   1093  1.47.8.2  nathanw 	struct termios *t;
   1094  1.47.8.2  nathanw {
   1095  1.47.8.2  nathanw 	struct dcm_softc *sc;
   1096  1.47.8.2  nathanw 	struct dcmdevice *dcm;
   1097  1.47.8.2  nathanw 	int unit, board, port, mode, cflag = t->c_cflag;
   1098  1.47.8.2  nathanw 	int ospeed = ttspeedtab(t->c_ospeed, dcmspeedtab);
   1099  1.47.8.2  nathanw 
   1100  1.47.8.2  nathanw 	unit = DCMUNIT(tp->t_dev);
   1101  1.47.8.2  nathanw 	board = DCMBOARD(unit);
   1102  1.47.8.2  nathanw 	port = DCMPORT(unit);
   1103  1.47.8.2  nathanw 
   1104  1.47.8.2  nathanw 	sc = dcm_cd.cd_devs[board];
   1105  1.47.8.2  nathanw 	dcm = sc->sc_dcm;
   1106  1.47.8.2  nathanw 
   1107  1.47.8.2  nathanw 	/* check requested parameters */
   1108  1.47.8.2  nathanw         if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
   1109  1.47.8.2  nathanw                 return (EINVAL);
   1110  1.47.8.2  nathanw         /* and copy to tty */
   1111  1.47.8.2  nathanw         tp->t_ispeed = t->c_ispeed;
   1112  1.47.8.2  nathanw         tp->t_ospeed = t->c_ospeed;
   1113  1.47.8.2  nathanw         tp->t_cflag = cflag;
   1114  1.47.8.2  nathanw 	if (ospeed == 0) {
   1115  1.47.8.2  nathanw 		(void) dcmmctl(DCMUNIT(tp->t_dev), MO_OFF, DMSET);
   1116  1.47.8.2  nathanw 		return (0);
   1117  1.47.8.2  nathanw 	}
   1118  1.47.8.2  nathanw 
   1119  1.47.8.2  nathanw 	mode = 0;
   1120  1.47.8.2  nathanw 	switch (cflag&CSIZE) {
   1121  1.47.8.2  nathanw 	case CS5:
   1122  1.47.8.2  nathanw 		mode = LC_5BITS; break;
   1123  1.47.8.2  nathanw 	case CS6:
   1124  1.47.8.2  nathanw 		mode = LC_6BITS; break;
   1125  1.47.8.2  nathanw 	case CS7:
   1126  1.47.8.2  nathanw 		mode = LC_7BITS; break;
   1127  1.47.8.2  nathanw 	case CS8:
   1128  1.47.8.2  nathanw 		mode = LC_8BITS; break;
   1129  1.47.8.2  nathanw 	}
   1130  1.47.8.2  nathanw 	if (cflag&PARENB) {
   1131  1.47.8.2  nathanw 		if (cflag&PARODD)
   1132  1.47.8.2  nathanw 			mode |= LC_PODD;
   1133  1.47.8.2  nathanw 		else
   1134  1.47.8.2  nathanw 			mode |= LC_PEVEN;
   1135  1.47.8.2  nathanw 	}
   1136  1.47.8.2  nathanw 	if (cflag&CSTOPB)
   1137  1.47.8.2  nathanw 		mode |= LC_2STOP;
   1138  1.47.8.2  nathanw 	else
   1139  1.47.8.2  nathanw 		mode |= LC_1STOP;
   1140  1.47.8.2  nathanw #ifdef DEBUG
   1141  1.47.8.2  nathanw 	if (dcmdebug & DDB_PARAM)
   1142  1.47.8.2  nathanw 		printf("%s port %d: dcmparam: cflag %x mode %x speed %d uperch %d\n",
   1143  1.47.8.2  nathanw 		       sc->sc_dev.dv_xname, port, cflag, mode, tp->t_ospeed,
   1144  1.47.8.2  nathanw 		       DCM_USPERCH(tp->t_ospeed));
   1145  1.47.8.2  nathanw #endif
   1146  1.47.8.2  nathanw 
   1147  1.47.8.2  nathanw 	/*
   1148  1.47.8.2  nathanw 	 * Wait for transmitter buffer to empty.
   1149  1.47.8.2  nathanw 	 */
   1150  1.47.8.2  nathanw 	while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
   1151  1.47.8.2  nathanw 		DELAY(DCM_USPERCH(tp->t_ospeed));
   1152  1.47.8.2  nathanw 	/*
   1153  1.47.8.2  nathanw 	 * Make changes known to hardware.
   1154  1.47.8.2  nathanw 	 */
   1155  1.47.8.2  nathanw 	dcm->dcm_data[port].dcm_baud = ospeed;
   1156  1.47.8.2  nathanw 	dcm->dcm_data[port].dcm_conf = mode;
   1157  1.47.8.2  nathanw 	SEM_LOCK(dcm);
   1158  1.47.8.2  nathanw 	dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
   1159  1.47.8.2  nathanw 	dcm->dcm_cr |= (1 << port);
   1160  1.47.8.2  nathanw 	SEM_UNLOCK(dcm);
   1161  1.47.8.2  nathanw 	/*
   1162  1.47.8.2  nathanw 	 * Delay for config change to take place. Weighted by baud.
   1163  1.47.8.2  nathanw 	 * XXX why do we do this?
   1164  1.47.8.2  nathanw 	 */
   1165  1.47.8.2  nathanw 	DELAY(16 * DCM_USPERCH(tp->t_ospeed));
   1166  1.47.8.2  nathanw 	return (0);
   1167  1.47.8.2  nathanw }
   1168  1.47.8.2  nathanw 
   1169  1.47.8.2  nathanw void
   1170  1.47.8.2  nathanw dcmstart(tp)
   1171  1.47.8.2  nathanw 	struct tty *tp;
   1172  1.47.8.2  nathanw {
   1173  1.47.8.2  nathanw 	struct dcm_softc *sc;
   1174  1.47.8.2  nathanw 	struct dcmdevice *dcm;
   1175  1.47.8.2  nathanw 	struct dcmpreg *pp;
   1176  1.47.8.2  nathanw 	struct dcmtfifo *fifo;
   1177  1.47.8.2  nathanw 	char *bp;
   1178  1.47.8.2  nathanw 	u_int head, tail, next;
   1179  1.47.8.2  nathanw 	int unit, board, port, nch;
   1180  1.47.8.2  nathanw 	char buf[16];
   1181  1.47.8.2  nathanw 	int s;
   1182  1.47.8.2  nathanw #ifdef DCMSTATS
   1183  1.47.8.2  nathanw 	struct dcmstats *dsp = &sc->sc_stats;
   1184  1.47.8.2  nathanw 	int tch = 0;
   1185  1.47.8.2  nathanw #endif
   1186  1.47.8.2  nathanw 
   1187  1.47.8.2  nathanw 	unit = DCMUNIT(tp->t_dev);
   1188  1.47.8.2  nathanw 	board = DCMBOARD(unit);
   1189  1.47.8.2  nathanw 	port = DCMPORT(unit);
   1190  1.47.8.2  nathanw 
   1191  1.47.8.2  nathanw 	sc = dcm_cd.cd_devs[board];
   1192  1.47.8.2  nathanw 	dcm = sc->sc_dcm;
   1193  1.47.8.2  nathanw 
   1194  1.47.8.2  nathanw 	s = spltty();
   1195  1.47.8.2  nathanw #ifdef DCMSTATS
   1196  1.47.8.2  nathanw 	dsp->xints++;
   1197  1.47.8.2  nathanw #endif
   1198  1.47.8.2  nathanw #ifdef DEBUG
   1199  1.47.8.2  nathanw 	if (dcmdebug & DDB_OUTPUT)
   1200  1.47.8.2  nathanw 		printf("%s port %d: dcmstart: state %x flags %x outcc %d\n",
   1201  1.47.8.2  nathanw 		       sc->sc_dev.dv_xname, port, tp->t_state, tp->t_flags,
   1202  1.47.8.2  nathanw 		       tp->t_outq.c_cc);
   1203  1.47.8.2  nathanw #endif
   1204  1.47.8.2  nathanw 	if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
   1205  1.47.8.2  nathanw 		goto out;
   1206  1.47.8.2  nathanw 	if (tp->t_outq.c_cc <= tp->t_lowat) {
   1207  1.47.8.2  nathanw 		if (tp->t_state&TS_ASLEEP) {
   1208  1.47.8.2  nathanw 			tp->t_state &= ~TS_ASLEEP;
   1209  1.47.8.2  nathanw 			wakeup((caddr_t)&tp->t_outq);
   1210  1.47.8.2  nathanw 		}
   1211  1.47.8.2  nathanw 		selwakeup(&tp->t_wsel);
   1212  1.47.8.2  nathanw 	}
   1213  1.47.8.2  nathanw 	if (tp->t_outq.c_cc == 0) {
   1214  1.47.8.2  nathanw #ifdef DCMSTATS
   1215  1.47.8.2  nathanw 		dsp->xempty++;
   1216  1.47.8.2  nathanw #endif
   1217  1.47.8.2  nathanw 		goto out;
   1218  1.47.8.2  nathanw 	}
   1219  1.47.8.2  nathanw 
   1220  1.47.8.2  nathanw 	pp = dcm_preg(dcm, port);
   1221  1.47.8.2  nathanw 	tail = pp->t_tail & TX_MASK;
   1222  1.47.8.2  nathanw 	next = (tail + 1) & TX_MASK;
   1223  1.47.8.2  nathanw 	head = pp->t_head & TX_MASK;
   1224  1.47.8.2  nathanw 	if (head == next)
   1225  1.47.8.2  nathanw 		goto out;
   1226  1.47.8.2  nathanw 	fifo = &dcm->dcm_tfifos[3-port][tail];
   1227  1.47.8.2  nathanw again:
   1228  1.47.8.2  nathanw 	nch = q_to_b(&tp->t_outq, buf, (head - next) & TX_MASK);
   1229  1.47.8.2  nathanw #ifdef DCMSTATS
   1230  1.47.8.2  nathanw 	tch += nch;
   1231  1.47.8.2  nathanw #endif
   1232  1.47.8.2  nathanw #ifdef DEBUG
   1233  1.47.8.2  nathanw 	if (dcmdebug & DDB_OUTPUT)
   1234  1.47.8.2  nathanw 		printf("\thead %x tail %x nch %d\n", head, tail, nch);
   1235  1.47.8.2  nathanw #endif
   1236  1.47.8.2  nathanw 	/*
   1237  1.47.8.2  nathanw 	 * Loop transmitting all the characters we can.
   1238  1.47.8.2  nathanw 	 */
   1239  1.47.8.2  nathanw 	for (bp = buf; --nch >= 0; bp++) {
   1240  1.47.8.2  nathanw 		fifo->data_char = *bp;
   1241  1.47.8.2  nathanw 		pp->t_tail = next;
   1242  1.47.8.2  nathanw 		/*
   1243  1.47.8.2  nathanw 		 * If this is the first character,
   1244  1.47.8.2  nathanw 		 * get the hardware moving right now.
   1245  1.47.8.2  nathanw 		 */
   1246  1.47.8.2  nathanw 		if (bp == buf) {
   1247  1.47.8.2  nathanw 			tp->t_state |= TS_BUSY;
   1248  1.47.8.2  nathanw 			SEM_LOCK(dcm);
   1249  1.47.8.2  nathanw 			dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
   1250  1.47.8.2  nathanw 			dcm->dcm_cr |= (1 << port);
   1251  1.47.8.2  nathanw 			SEM_UNLOCK(dcm);
   1252  1.47.8.2  nathanw 		}
   1253  1.47.8.2  nathanw 		tail = next;
   1254  1.47.8.2  nathanw 		fifo = tail ? fifo+1 : &dcm->dcm_tfifos[3-port][0];
   1255  1.47.8.2  nathanw 		next = (next + 1) & TX_MASK;
   1256  1.47.8.2  nathanw 	}
   1257  1.47.8.2  nathanw 	/*
   1258  1.47.8.2  nathanw 	 * Head changed while we were loading the buffer,
   1259  1.47.8.2  nathanw 	 * go back and load some more if we can.
   1260  1.47.8.2  nathanw 	 */
   1261  1.47.8.2  nathanw 	if (tp->t_outq.c_cc && head != (pp->t_head & TX_MASK)) {
   1262  1.47.8.2  nathanw #ifdef DCMSTATS
   1263  1.47.8.2  nathanw 		dsp->xrestarts++;
   1264  1.47.8.2  nathanw #endif
   1265  1.47.8.2  nathanw 		head = pp->t_head & TX_MASK;
   1266  1.47.8.2  nathanw 		goto again;
   1267  1.47.8.2  nathanw 	}
   1268  1.47.8.2  nathanw 
   1269  1.47.8.2  nathanw 	/*
   1270  1.47.8.2  nathanw 	 * Kick it one last time in case it finished while we were
   1271  1.47.8.2  nathanw 	 * loading the last bunch.
   1272  1.47.8.2  nathanw 	 */
   1273  1.47.8.2  nathanw 	if (bp > &buf[1]) {
   1274  1.47.8.2  nathanw 		tp->t_state |= TS_BUSY;
   1275  1.47.8.2  nathanw 		SEM_LOCK(dcm);
   1276  1.47.8.2  nathanw 		dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
   1277  1.47.8.2  nathanw 		dcm->dcm_cr |= (1 << port);
   1278  1.47.8.2  nathanw 		SEM_UNLOCK(dcm);
   1279  1.47.8.2  nathanw 	}
   1280  1.47.8.2  nathanw #ifdef DEBUG
   1281  1.47.8.2  nathanw 	if (dcmdebug & DDB_INTR)
   1282  1.47.8.2  nathanw 		printf("%s port %d: dcmstart: head %x tail %x outqcc %d\n",
   1283  1.47.8.2  nathanw 		    sc->sc_dev.dv_xname, port, head, tail, tp->t_outq.c_cc);
   1284  1.47.8.2  nathanw #endif
   1285  1.47.8.2  nathanw out:
   1286  1.47.8.2  nathanw #ifdef DCMSTATS
   1287  1.47.8.2  nathanw 	dsp->xchars += tch;
   1288  1.47.8.2  nathanw 	if (tch <= DCMXBSIZE)
   1289  1.47.8.2  nathanw 		dsp->xsilo[tch]++;
   1290  1.47.8.2  nathanw 	else
   1291  1.47.8.2  nathanw 		dsp->xsilo[DCMXBSIZE+1]++;
   1292  1.47.8.2  nathanw #endif
   1293  1.47.8.2  nathanw 	splx(s);
   1294  1.47.8.2  nathanw }
   1295  1.47.8.2  nathanw 
   1296  1.47.8.2  nathanw /*
   1297  1.47.8.2  nathanw  * Stop output on a line.
   1298  1.47.8.2  nathanw  */
   1299  1.47.8.2  nathanw void
   1300  1.47.8.2  nathanw dcmstop(tp, flag)
   1301  1.47.8.2  nathanw 	struct tty *tp;
   1302  1.47.8.2  nathanw 	int flag;
   1303  1.47.8.2  nathanw {
   1304  1.47.8.2  nathanw 	int s;
   1305  1.47.8.2  nathanw 
   1306  1.47.8.2  nathanw 	s = spltty();
   1307  1.47.8.2  nathanw 	if (tp->t_state & TS_BUSY) {
   1308  1.47.8.2  nathanw 		/* XXX is there some way to safely stop transmission? */
   1309  1.47.8.2  nathanw 		if ((tp->t_state&TS_TTSTOP) == 0)
   1310  1.47.8.2  nathanw 			tp->t_state |= TS_FLUSH;
   1311  1.47.8.2  nathanw 	}
   1312  1.47.8.2  nathanw 	splx(s);
   1313  1.47.8.2  nathanw }
   1314  1.47.8.2  nathanw 
   1315  1.47.8.2  nathanw /*
   1316  1.47.8.2  nathanw  * Modem control
   1317  1.47.8.2  nathanw  */
   1318  1.47.8.2  nathanw int
   1319  1.47.8.2  nathanw dcmmctl(dev, bits, how)
   1320  1.47.8.2  nathanw 	dev_t dev;
   1321  1.47.8.2  nathanw 	int bits, how;
   1322  1.47.8.2  nathanw {
   1323  1.47.8.2  nathanw 	struct dcm_softc *sc;
   1324  1.47.8.2  nathanw 	struct dcmdevice *dcm;
   1325  1.47.8.2  nathanw 	int s, unit, brd, port, hit = 0;
   1326  1.47.8.2  nathanw 
   1327  1.47.8.2  nathanw 	unit = DCMUNIT(dev);
   1328  1.47.8.2  nathanw 	brd = DCMBOARD(unit);
   1329  1.47.8.2  nathanw 	port = DCMPORT(unit);
   1330  1.47.8.2  nathanw 
   1331  1.47.8.2  nathanw 	sc = dcm_cd.cd_devs[brd];
   1332  1.47.8.2  nathanw 	dcm = sc->sc_dcm;
   1333  1.47.8.2  nathanw 
   1334  1.47.8.2  nathanw #ifdef DEBUG
   1335  1.47.8.2  nathanw 	if (dcmdebug & DDB_MODEM)
   1336  1.47.8.2  nathanw 		printf("%s port %d: dcmmctl: bits 0x%x how %x\n",
   1337  1.47.8.2  nathanw 		       sc->sc_dev.dv_xname, port, bits, how);
   1338  1.47.8.2  nathanw #endif
   1339  1.47.8.2  nathanw 
   1340  1.47.8.2  nathanw 	s = spltty();
   1341  1.47.8.2  nathanw 
   1342  1.47.8.2  nathanw 	switch (how) {
   1343  1.47.8.2  nathanw 	case DMSET:
   1344  1.47.8.2  nathanw 		sc->sc_modem[port]->mdmout = bits;
   1345  1.47.8.2  nathanw 		hit++;
   1346  1.47.8.2  nathanw 		break;
   1347  1.47.8.2  nathanw 
   1348  1.47.8.2  nathanw 	case DMBIS:
   1349  1.47.8.2  nathanw 		sc->sc_modem[port]->mdmout |= bits;
   1350  1.47.8.2  nathanw 		hit++;
   1351  1.47.8.2  nathanw 		break;
   1352  1.47.8.2  nathanw 
   1353  1.47.8.2  nathanw 	case DMBIC:
   1354  1.47.8.2  nathanw 		sc->sc_modem[port]->mdmout &= ~bits;
   1355  1.47.8.2  nathanw 		hit++;
   1356  1.47.8.2  nathanw 		break;
   1357  1.47.8.2  nathanw 
   1358  1.47.8.2  nathanw 	case DMGET:
   1359  1.47.8.2  nathanw 		bits = sc->sc_modem[port]->mdmin;
   1360  1.47.8.2  nathanw 		if (sc->sc_flags & DCM_STDDCE)
   1361  1.47.8.2  nathanw 			bits = hp2dce_in(bits);
   1362  1.47.8.2  nathanw 		break;
   1363  1.47.8.2  nathanw 	}
   1364  1.47.8.2  nathanw 	if (hit) {
   1365  1.47.8.2  nathanw 		SEM_LOCK(dcm);
   1366  1.47.8.2  nathanw 		dcm->dcm_modemchng |= 1<<(unit & 3);
   1367  1.47.8.2  nathanw 		dcm->dcm_cr |= CR_MODM;
   1368  1.47.8.2  nathanw 		SEM_UNLOCK(dcm);
   1369  1.47.8.2  nathanw 		DELAY(10); /* delay until done */
   1370  1.47.8.3  nathanw 		splx(s);
   1371  1.47.8.2  nathanw 	}
   1372  1.47.8.2  nathanw 	return (bits);
   1373  1.47.8.2  nathanw }
   1374  1.47.8.2  nathanw 
   1375  1.47.8.2  nathanw /*
   1376  1.47.8.2  nathanw  * Set board to either interrupt per-character or at a fixed interval.
   1377  1.47.8.2  nathanw  */
   1378  1.47.8.2  nathanw void
   1379  1.47.8.2  nathanw dcmsetischeme(brd, flags)
   1380  1.47.8.2  nathanw 	int brd, flags;
   1381  1.47.8.2  nathanw {
   1382  1.47.8.2  nathanw 	struct dcm_softc *sc = dcm_cd.cd_devs[brd];
   1383  1.47.8.2  nathanw 	struct dcmdevice *dcm = sc->sc_dcm;
   1384  1.47.8.2  nathanw 	struct dcmischeme *dis = &sc->sc_scheme;
   1385  1.47.8.2  nathanw 	int i;
   1386  1.47.8.2  nathanw 	u_char mask;
   1387  1.47.8.2  nathanw 	int perchar = flags & DIS_PERCHAR;
   1388  1.47.8.2  nathanw 
   1389  1.47.8.2  nathanw #ifdef DEBUG
   1390  1.47.8.2  nathanw 	if (dcmdebug & DDB_INTSCHM)
   1391  1.47.8.2  nathanw 		printf("%s: dcmsetischeme(%d): cur %d, ints %d, chars %d\n",
   1392  1.47.8.2  nathanw 		       sc->sc_dev.dv_xname, perchar, dis->dis_perchar,
   1393  1.47.8.2  nathanw 		       dis->dis_intr, dis->dis_char);
   1394  1.47.8.2  nathanw 	if ((flags & DIS_RESET) == 0 && perchar == dis->dis_perchar) {
   1395  1.47.8.2  nathanw 		printf("%s: dcmsetischeme: redundent request %d\n",
   1396  1.47.8.2  nathanw 		       sc->sc_dev.dv_xname, perchar);
   1397  1.47.8.2  nathanw 		return;
   1398  1.47.8.2  nathanw 	}
   1399  1.47.8.2  nathanw #endif
   1400  1.47.8.2  nathanw 	/*
   1401  1.47.8.2  nathanw 	 * If perchar is non-zero, we enable interrupts on all characters
   1402  1.47.8.2  nathanw 	 * otherwise we disable perchar interrupts and use periodic
   1403  1.47.8.2  nathanw 	 * polling interrupts.
   1404  1.47.8.2  nathanw 	 */
   1405  1.47.8.2  nathanw 	dis->dis_perchar = perchar;
   1406  1.47.8.2  nathanw 	mask = perchar ? 0xf : 0x0;
   1407  1.47.8.2  nathanw 	for (i = 0; i < 256; i++)
   1408  1.47.8.2  nathanw 		dcm->dcm_bmap[i].data_data = mask;
   1409  1.47.8.2  nathanw 	/*
   1410  1.47.8.2  nathanw 	 * Don't slow down tandem mode, interrupt on flow control
   1411  1.47.8.2  nathanw 	 * chars for any port on the board.
   1412  1.47.8.2  nathanw 	 */
   1413  1.47.8.2  nathanw 	if (!perchar) {
   1414  1.47.8.2  nathanw 		struct tty *tp;
   1415  1.47.8.2  nathanw 		int c;
   1416  1.47.8.2  nathanw 
   1417  1.47.8.2  nathanw 		for (i = 0; i < NDCMPORT; i++) {
   1418  1.47.8.2  nathanw 			tp = sc->sc_tty[i];
   1419  1.47.8.2  nathanw 
   1420  1.47.8.2  nathanw 			if ((c = tp->t_cc[VSTART]) != _POSIX_VDISABLE)
   1421  1.47.8.2  nathanw 				dcm->dcm_bmap[c].data_data |= (1 << i);
   1422  1.47.8.2  nathanw 			if ((c = tp->t_cc[VSTOP]) != _POSIX_VDISABLE)
   1423  1.47.8.2  nathanw 				dcm->dcm_bmap[c].data_data |= (1 << i);
   1424  1.47.8.2  nathanw 		}
   1425  1.47.8.2  nathanw 	}
   1426  1.47.8.2  nathanw 	/*
   1427  1.47.8.2  nathanw 	 * Board starts with timer disabled so if first call is to
   1428  1.47.8.2  nathanw 	 * set perchar mode then we don't want to toggle the timer.
   1429  1.47.8.2  nathanw 	 */
   1430  1.47.8.2  nathanw 	if (flags == (DIS_RESET|DIS_PERCHAR))
   1431  1.47.8.2  nathanw 		return;
   1432  1.47.8.2  nathanw 	/*
   1433  1.47.8.2  nathanw 	 * Toggle card 16.7ms interrupts (we first make sure that card
   1434  1.47.8.2  nathanw 	 * has cleared the bit so it will see the toggle).
   1435  1.47.8.2  nathanw 	 */
   1436  1.47.8.2  nathanw 	while (dcm->dcm_cr & CR_TIMER)
   1437  1.47.8.2  nathanw 		;
   1438  1.47.8.2  nathanw 	SEM_LOCK(dcm);
   1439  1.47.8.2  nathanw 	dcm->dcm_cr |= CR_TIMER;
   1440  1.47.8.2  nathanw 	SEM_UNLOCK(dcm);
   1441  1.47.8.2  nathanw }
   1442  1.47.8.2  nathanw 
   1443  1.47.8.2  nathanw void
   1444  1.47.8.2  nathanw dcminit(dcm, port, rate)
   1445  1.47.8.2  nathanw 	struct dcmdevice *dcm;
   1446  1.47.8.2  nathanw 	int port, rate;
   1447  1.47.8.2  nathanw {
   1448  1.47.8.2  nathanw 	int s, mode;
   1449  1.47.8.2  nathanw 
   1450  1.47.8.2  nathanw 	mode = LC_8BITS | LC_1STOP;
   1451  1.47.8.2  nathanw 
   1452  1.47.8.2  nathanw 	s = splhigh();
   1453  1.47.8.2  nathanw 
   1454  1.47.8.2  nathanw 	/*
   1455  1.47.8.2  nathanw 	 * Wait for transmitter buffer to empty.
   1456  1.47.8.2  nathanw 	 */
   1457  1.47.8.2  nathanw 	while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
   1458  1.47.8.2  nathanw 		DELAY(DCM_USPERCH(rate));
   1459  1.47.8.2  nathanw 
   1460  1.47.8.2  nathanw 	/*
   1461  1.47.8.2  nathanw 	 * Make changes known to hardware.
   1462  1.47.8.2  nathanw 	 */
   1463  1.47.8.2  nathanw 	dcm->dcm_data[port].dcm_baud = ttspeedtab(rate, dcmspeedtab);
   1464  1.47.8.2  nathanw 	dcm->dcm_data[port].dcm_conf = mode;
   1465  1.47.8.2  nathanw 	SEM_LOCK(dcm);
   1466  1.47.8.2  nathanw 	dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
   1467  1.47.8.2  nathanw 	dcm->dcm_cr |= (1 << port);
   1468  1.47.8.2  nathanw 	SEM_UNLOCK(dcm);
   1469  1.47.8.2  nathanw 
   1470  1.47.8.2  nathanw 	/*
   1471  1.47.8.2  nathanw 	 * Delay for config change to take place. Weighted by baud.
   1472  1.47.8.2  nathanw 	 * XXX why do we do this?
   1473  1.47.8.2  nathanw 	 */
   1474  1.47.8.2  nathanw 	DELAY(16 * DCM_USPERCH(rate));
   1475  1.47.8.2  nathanw 	splx(s);
   1476  1.47.8.2  nathanw }
   1477  1.47.8.2  nathanw 
   1478  1.47.8.2  nathanw /*
   1479  1.47.8.2  nathanw  * Empirically derived self-test magic
   1480  1.47.8.2  nathanw  */
   1481  1.47.8.2  nathanw int
   1482  1.47.8.2  nathanw dcmselftest(sc)
   1483  1.47.8.2  nathanw 	struct dcm_softc *sc;
   1484  1.47.8.2  nathanw {
   1485  1.47.8.2  nathanw 	struct dcmdevice *dcm = sc->sc_dcm;
   1486  1.47.8.2  nathanw 	int timo = 0;
   1487  1.47.8.2  nathanw 	int s, rv;
   1488  1.47.8.2  nathanw 
   1489  1.47.8.2  nathanw 	rv = 1;
   1490  1.47.8.2  nathanw 
   1491  1.47.8.2  nathanw 	s = splhigh();
   1492  1.47.8.2  nathanw 	dcm->dcm_rsid = DCMRS;
   1493  1.47.8.2  nathanw 	DELAY(50000);	/* 5000 is not long enough */
   1494  1.47.8.2  nathanw 	dcm->dcm_rsid = 0;
   1495  1.47.8.2  nathanw 	dcm->dcm_ic = IC_IE;
   1496  1.47.8.2  nathanw 	dcm->dcm_cr = CR_SELFT;
   1497  1.47.8.2  nathanw 	while ((dcm->dcm_ic & IC_IR) == 0) {
   1498  1.47.8.2  nathanw 		if (++timo == 20000)
   1499  1.47.8.2  nathanw 			goto out;
   1500  1.47.8.2  nathanw 		DELAY(1);
   1501  1.47.8.2  nathanw 	}
   1502  1.47.8.2  nathanw 	DELAY(50000);	/* XXX why is this needed ???? */
   1503  1.47.8.2  nathanw 	while ((dcm->dcm_iir & IIR_SELFT) == 0) {
   1504  1.47.8.2  nathanw 		if (++timo == 400000)
   1505  1.47.8.2  nathanw 			goto out;
   1506  1.47.8.2  nathanw 		DELAY(1);
   1507  1.47.8.2  nathanw 	}
   1508  1.47.8.2  nathanw 	DELAY(50000);	/* XXX why is this needed ???? */
   1509  1.47.8.2  nathanw 	if (dcm->dcm_stcon != ST_OK) {
   1510  1.47.8.2  nathanw #if 0
   1511  1.47.8.2  nathanw 		if (hd->hp_args->hw_sc != conscode)
   1512  1.47.8.2  nathanw 			printf("dcm%d: self test failed: %x\n",
   1513  1.47.8.2  nathanw 			       brd, dcm->dcm_stcon);
   1514  1.47.8.2  nathanw #endif
   1515  1.47.8.2  nathanw 		goto out;
   1516  1.47.8.2  nathanw 	}
   1517  1.47.8.2  nathanw 	dcm->dcm_ic = IC_ID;
   1518  1.47.8.2  nathanw 	rv = 0;
   1519  1.47.8.2  nathanw 
   1520  1.47.8.2  nathanw  out:
   1521  1.47.8.2  nathanw 	splx(s);
   1522  1.47.8.2  nathanw 	return (rv);
   1523  1.47.8.2  nathanw }
   1524  1.47.8.2  nathanw 
   1525  1.47.8.2  nathanw /*
   1526  1.47.8.2  nathanw  * Following are all routines needed for DCM to act as console
   1527  1.47.8.2  nathanw  */
   1528  1.47.8.2  nathanw 
   1529  1.47.8.2  nathanw int
   1530  1.47.8.2  nathanw dcmcnattach(bus_space_tag_t bst, bus_addr_t addr, int scode)
   1531  1.47.8.2  nathanw {
   1532  1.47.8.2  nathanw         bus_space_handle_t bsh;
   1533  1.47.8.2  nathanw         caddr_t va;
   1534  1.47.8.2  nathanw         struct dcmdevice *dcm;
   1535  1.47.8.2  nathanw 
   1536  1.47.8.2  nathanw         if (bus_space_map(bst, addr, DIOCSIZE, 0, &bsh))
   1537  1.47.8.2  nathanw                 return (1);
   1538  1.47.8.2  nathanw 
   1539  1.47.8.2  nathanw         va = bus_space_vaddr(bst, bsh);
   1540  1.47.8.2  nathanw 	dcm = (struct dcmdevice *)va;
   1541  1.47.8.2  nathanw 
   1542  1.47.8.2  nathanw 	switch (dcm->dcm_rsid) {
   1543  1.47.8.2  nathanw #ifdef CONSCODE
   1544  1.47.8.2  nathanw 	case DCMID:
   1545  1.47.8.2  nathanw #endif
   1546  1.47.8.2  nathanw 	case DCMID|DCMCON:
   1547  1.47.8.2  nathanw 		break;
   1548  1.47.8.2  nathanw 	default:
   1549  1.47.8.2  nathanw 		goto error;
   1550  1.47.8.2  nathanw 	}
   1551  1.47.8.2  nathanw 
   1552  1.47.8.2  nathanw 	dcminit(dcm, DCMCONSPORT, dcmdefaultrate);
   1553  1.47.8.2  nathanw         dcmconsinit = 1;
   1554  1.47.8.2  nathanw 	dcmconscode = scode;
   1555  1.47.8.2  nathanw         dcm_cn = dcm;
   1556  1.47.8.2  nathanw 
   1557  1.47.8.2  nathanw         /* locate the major number */
   1558  1.47.8.2  nathanw         for (dcmmajor = 0; dcmmajor < nchrdev; dcmmajor++)
   1559  1.47.8.2  nathanw                 if (cdevsw[dcmmajor].d_open == dcmopen)
   1560  1.47.8.2  nathanw                         break;
   1561  1.47.8.2  nathanw 
   1562  1.47.8.2  nathanw         /* initialize required fields */
   1563  1.47.8.2  nathanw         cn_tab = &dcm_cons;
   1564  1.47.8.2  nathanw         cn_tab->cn_dev = makedev(dcmmajor, 0);
   1565  1.47.8.2  nathanw 
   1566  1.47.8.2  nathanw #ifdef KGDB_CHEAT
   1567  1.47.8.2  nathanw 	/* XXX this needs to be fixed. */
   1568  1.47.8.2  nathanw 	/*
   1569  1.47.8.2  nathanw 	 * This doesn't currently work, at least not with ite consoles;
   1570  1.47.8.2  nathanw 	 * the console hasn't been initialized yet.
   1571  1.47.8.2  nathanw 	 */
   1572  1.47.8.2  nathanw 	if (major(kgdb_dev) == dcmmajor &&
   1573  1.47.8.2  nathanw 	    DCMBOARD(DCMUNIT(kgdb_dev)) == DCMBOARD(unit)) {
   1574  1.47.8.2  nathanw 		dcminit(dcm_cn, DCMPORT(DCMUNIT(kgdb_dev)), kgdb_rate);
   1575  1.47.8.2  nathanw 		if (kgdb_debug_init) {
   1576  1.47.8.2  nathanw 			/*
   1577  1.47.8.2  nathanw 			 * We assume that console is ready for us...
   1578  1.47.8.2  nathanw 			 * this assumes that a dca or ite console
   1579  1.47.8.2  nathanw 			 * has been selected already and will init
   1580  1.47.8.2  nathanw 			 * on the first putc.
   1581  1.47.8.2  nathanw 			 */
   1582  1.47.8.2  nathanw 			printf("dcm%d: ", DCMUNIT(kgdb_dev));
   1583  1.47.8.2  nathanw 			kgdb_connect(1);
   1584  1.47.8.2  nathanw 		}
   1585  1.47.8.2  nathanw 	}
   1586  1.47.8.2  nathanw #endif
   1587  1.47.8.2  nathanw 
   1588  1.47.8.2  nathanw 
   1589  1.47.8.2  nathanw         return (0);
   1590  1.47.8.2  nathanw 
   1591  1.47.8.2  nathanw error:
   1592  1.47.8.2  nathanw         bus_space_unmap(bst, bsh, DIOCSIZE);
   1593  1.47.8.2  nathanw         return (1);
   1594  1.47.8.2  nathanw }
   1595  1.47.8.2  nathanw 
   1596  1.47.8.2  nathanw /* ARGSUSED */
   1597  1.47.8.2  nathanw int
   1598  1.47.8.2  nathanw dcmcngetc(dev)
   1599  1.47.8.2  nathanw 	dev_t dev;
   1600  1.47.8.2  nathanw {
   1601  1.47.8.2  nathanw 	struct dcmrfifo *fifo;
   1602  1.47.8.2  nathanw 	struct dcmpreg *pp;
   1603  1.47.8.2  nathanw 	u_int head;
   1604  1.47.8.2  nathanw 	int s, c, stat;
   1605  1.47.8.2  nathanw 
   1606  1.47.8.2  nathanw 	pp = dcm_preg(dcm_cn, DCMCONSPORT);
   1607  1.47.8.2  nathanw 
   1608  1.47.8.2  nathanw 	s = splhigh();
   1609  1.47.8.2  nathanw 	head = pp->r_head & RX_MASK;
   1610  1.47.8.2  nathanw 	fifo = &dcm_cn->dcm_rfifos[3-DCMCONSPORT][head>>1];
   1611  1.47.8.2  nathanw 	while (head == (pp->r_tail & RX_MASK))
   1612  1.47.8.2  nathanw 		;
   1613  1.47.8.2  nathanw 	/*
   1614  1.47.8.2  nathanw 	 * If board interrupts are enabled, just let our received char
   1615  1.47.8.2  nathanw 	 * interrupt through in case some other port on the board was
   1616  1.47.8.2  nathanw 	 * busy.  Otherwise we must clear the interrupt.
   1617  1.47.8.2  nathanw 	 */
   1618  1.47.8.2  nathanw 	SEM_LOCK(dcm_cn);
   1619  1.47.8.2  nathanw 	if ((dcm_cn->dcm_ic & IC_IE) == 0)
   1620  1.47.8.2  nathanw 		stat = dcm_cn->dcm_iir;
   1621  1.47.8.2  nathanw 	SEM_UNLOCK(dcm_cn);
   1622  1.47.8.2  nathanw 	c = fifo->data_char;
   1623  1.47.8.2  nathanw 	stat = fifo->data_stat;
   1624  1.47.8.2  nathanw 	pp->r_head = (head + 2) & RX_MASK;
   1625  1.47.8.2  nathanw 	splx(s);
   1626  1.47.8.2  nathanw 	return (c);
   1627  1.47.8.2  nathanw }
   1628  1.47.8.2  nathanw 
   1629  1.47.8.2  nathanw /*
   1630  1.47.8.2  nathanw  * Console kernel output character routine.
   1631  1.47.8.2  nathanw  */
   1632  1.47.8.2  nathanw /* ARGSUSED */
   1633  1.47.8.2  nathanw void
   1634  1.47.8.2  nathanw dcmcnputc(dev, c)
   1635  1.47.8.2  nathanw 	dev_t dev;
   1636  1.47.8.2  nathanw 	int c;
   1637  1.47.8.2  nathanw {
   1638  1.47.8.2  nathanw 	struct dcmpreg *pp;
   1639  1.47.8.2  nathanw 	unsigned tail;
   1640  1.47.8.2  nathanw 	int s, stat;
   1641  1.47.8.2  nathanw 
   1642  1.47.8.2  nathanw 	pp = dcm_preg(dcm_cn, DCMCONSPORT);
   1643  1.47.8.2  nathanw 
   1644  1.47.8.2  nathanw 	s = splhigh();
   1645  1.47.8.2  nathanw #ifdef KGDB
   1646  1.47.8.2  nathanw 	if (dev != kgdb_dev)
   1647  1.47.8.2  nathanw #endif
   1648  1.47.8.2  nathanw 	if (dcmconsinit == 0) {
   1649  1.47.8.2  nathanw 		dcminit(dcm_cn, DCMCONSPORT, dcmdefaultrate);
   1650  1.47.8.2  nathanw 		dcmconsinit = 1;
   1651  1.47.8.2  nathanw 	}
   1652  1.47.8.2  nathanw 	tail = pp->t_tail & TX_MASK;
   1653  1.47.8.2  nathanw 	while (tail != (pp->t_head & TX_MASK))
   1654  1.47.8.2  nathanw 		;
   1655  1.47.8.2  nathanw 	dcm_cn->dcm_tfifos[3-DCMCONSPORT][tail].data_char = c;
   1656  1.47.8.2  nathanw 	pp->t_tail = tail = (tail + 1) & TX_MASK;
   1657  1.47.8.2  nathanw 	SEM_LOCK(dcm_cn);
   1658  1.47.8.2  nathanw 	dcm_cn->dcm_cmdtab[DCMCONSPORT].dcm_data |= CT_TX;
   1659  1.47.8.2  nathanw 	dcm_cn->dcm_cr |= (1 << DCMCONSPORT);
   1660  1.47.8.2  nathanw 	SEM_UNLOCK(dcm_cn);
   1661  1.47.8.2  nathanw 	while (tail != (pp->t_head & TX_MASK))
   1662  1.47.8.2  nathanw 		;
   1663  1.47.8.2  nathanw 	/*
   1664  1.47.8.2  nathanw 	 * If board interrupts are enabled, just let our completion
   1665  1.47.8.2  nathanw 	 * interrupt through in case some other port on the board
   1666  1.47.8.2  nathanw 	 * was busy.  Otherwise we must clear the interrupt.
   1667  1.47.8.2  nathanw 	 */
   1668  1.47.8.2  nathanw 	if ((dcm_cn->dcm_ic & IC_IE) == 0) {
   1669  1.47.8.2  nathanw 		SEM_LOCK(dcm_cn);
   1670  1.47.8.2  nathanw 		stat = dcm_cn->dcm_iir;
   1671  1.47.8.2  nathanw 		SEM_UNLOCK(dcm_cn);
   1672  1.47.8.2  nathanw 	}
   1673  1.47.8.2  nathanw 	splx(s);
   1674  1.47.8.2  nathanw }
   1675