dcm.c revision 1.12 1 /*
2 * Copyright (c) 1988 University of Utah.
3 * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * the Systems Programming Group of the University of Utah Computer
8 * Science Department.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * from: Utah Hdr: dcm.c 1.26 91/01/21
39 * from: @(#)dcm.c 7.14 (Berkeley) 6/27/91
40 * $Id: dcm.c,v 1.12 1994/02/06 01:08:37 mycroft Exp $
41 */
42
43 /*
44 * TODO:
45 * Timeouts
46 * Test console support.
47 */
48
49 #include "dcm.h"
50 #if NDCM > 0
51 /*
52 * 98642/MUX
53 */
54 #include "sys/param.h"
55 #include "sys/systm.h"
56 #include "sys/ioctl.h"
57 #include "sys/tty.h"
58 #include "sys/proc.h"
59 #include "sys/conf.h"
60 #include "sys/file.h"
61 #include "sys/uio.h"
62 #include "sys/kernel.h"
63 #include "sys/syslog.h"
64 #include "sys/time.h"
65
66 #include "device.h"
67 #include "dcmreg.h"
68 #include "machine/cpu.h"
69 #include "../hp300/isr.h"
70
71 #ifndef DEFAULT_BAUD_RATE
72 #define DEFAULT_BAUD_RATE 9600
73 #endif
74
75 int dcmprobe(), dcmintr(), dcmparam();
76 void dcmstart();
77
78 struct driver dcmdriver = {
79 dcmprobe, "dcm",
80 };
81
82 #define NDCMLINE (NDCM*4)
83
84 struct tty *dcm_tty[NDCMLINE];
85 struct modemreg *dcm_modem[NDCMLINE];
86 char mcndlast[NDCMLINE]; /* XXX last modem status for line */
87 int ndcm = NDCMLINE;
88
89 int dcm_active;
90 int dcmsoftCAR[NDCM];
91 struct dcmdevice *dcm_addr[NDCM];
92 struct isr dcmisr[NDCM];
93
94 struct speedtab dcmspeedtab[] = {
95 0, BR_0,
96 50, BR_50,
97 75, BR_75,
98 110, BR_110,
99 134, BR_134,
100 150, BR_150,
101 300, BR_300,
102 600, BR_600,
103 1200, BR_1200,
104 1800, BR_1800,
105 2400, BR_2400,
106 4800, BR_4800,
107 9600, BR_9600,
108 19200, BR_19200,
109 38400, BR_38400,
110 -1, -1
111 };
112
113 /* u-sec per character based on baudrate (assumes 1 start/8 data/1 stop bit) */
114 #define DCM_USPERCH(s) (10000000 / (s))
115
116 /*
117 * Per board interrupt scheme. 16.7ms is the polling interrupt rate
118 * (16.7ms is about 550 baud, 38.4k is 72 chars in 16.7ms).
119 */
120 #define DIS_TIMER 0
121 #define DIS_PERCHAR 1
122 #define DIS_RESET 2
123
124 int dcmistype = -1; /* -1 == dynamic, 0 == timer, 1 == perchar */
125 int dcminterval = 5; /* interval (secs) between checks */
126 struct dcmischeme {
127 int dis_perchar; /* non-zero if interrupting per char */
128 long dis_time; /* last time examined */
129 int dis_intr; /* recv interrupts during last interval */
130 int dis_char; /* characters read during last interval */
131 } dcmischeme[NDCM];
132
133 /*
134 * Console support
135 */
136 #ifdef DCMCONSOLE
137 int dcmconsole = DCMCONSOLE;
138 #else
139 int dcmconsole = -1;
140 #endif
141 int dcmconsinit;
142 int dcmdefaultrate = DEFAULT_BAUD_RATE;
143 int dcmconbrdbusy = 0;
144 int dcmmajor;
145
146 #ifdef KGDB
147 /*
148 * Kernel GDB support
149 */
150 #include "machine/remote-sl.h"
151
152 extern dev_t kgdb_dev;
153 extern int kgdb_rate;
154 extern int kgdb_debug_init;
155 #endif
156
157 /* #define IOSTATS */
158
159 #ifdef DEBUG
160 int dcmdebug = 0x0;
161 #define DDB_SIOERR 0x01
162 #define DDB_PARAM 0x02
163 #define DDB_INPUT 0x04
164 #define DDB_OUTPUT 0x08
165 #define DDB_INTR 0x10
166 #define DDB_IOCTL 0x20
167 #define DDB_INTSCHM 0x40
168 #define DDB_MODEM 0x80
169 #define DDB_OPENCLOSE 0x100
170 #endif
171
172 #ifdef IOSTATS
173 #define DCMRBSIZE 94
174 #define DCMXBSIZE 24
175
176 struct dcmstats {
177 long xints; /* # of xmit ints */
178 long xchars; /* # of xmit chars */
179 long xempty; /* times outq is empty in dcmstart */
180 long xrestarts; /* times completed while xmitting */
181 long rints; /* # of recv ints */
182 long rchars; /* # of recv chars */
183 long xsilo[DCMXBSIZE+2]; /* times this many chars xmit on one int */
184 long rsilo[DCMRBSIZE+2]; /* times this many chars read on one int */
185 } dcmstats[NDCM];
186 #endif
187
188 #define UNIT(x) minor(x)
189 #define BOARD(x) (((x) >> 2) & 0x3f)
190 #define PORT(x) ((x) & 3)
191 #define MKUNIT(b,p) (((b) << 2) | (p))
192
193 /*
194 * Conversion from "HP DCE" to almost-normal DCE: on the 638 8-port mux,
195 * the distribution panel uses "HP DCE" conventions. If requested via
196 * the device flags, we swap the inputs to something closer to normal DCE,
197 * allowing a straight-through cable to a DTE or a reversed cable
198 * to a DCE (reversing 2-3, 4-5, 8-20 and leaving 6 unconnected;
199 * this gets "DCD" on pin 20 and "CTS" on 4, but doesn't connect
200 * DSR or make RTS work, though). The following gives the full
201 * details of a cable from this mux panel to a modem:
202 *
203 * HP modem
204 * name pin pin name
205 * HP inputs:
206 * "Rx" 2 3 Tx
207 * CTS 4 5 CTS (only needed for CCTS_OFLOW)
208 * DCD 20 8 DCD
209 * "DSR" 9 6 DSR (unneeded)
210 * RI 22 22 RI (unneeded)
211 *
212 * HP outputs:
213 * "Tx" 3 2 Rx
214 * "DTR" 6 not connected
215 * "RTS" 8 20 DTR
216 * "SR" 23 4 RTS (often not needed)
217 */
218 #define FLAG_STDDCE 0x10 /* map inputs if this bit is set in flags */
219 #define hp2dce_in(ibits) (iconv[(ibits) & 0xf])
220 static char iconv[16] = {
221 0, MI_DM, MI_CTS, MI_CTS|MI_DM,
222 MI_CD, MI_CD|MI_DM, MI_CD|MI_CTS, MI_CD|MI_CTS|MI_DM,
223 MI_RI, MI_RI|MI_DM, MI_RI|MI_CTS, MI_RI|MI_CTS|MI_DM,
224 MI_RI|MI_CD, MI_RI|MI_CD|MI_DM, MI_RI|MI_CD|MI_CTS,
225 MI_RI|MI_CD|MI_CTS|MI_DM
226 };
227
228 dcmprobe(hd)
229 register struct hp_device *hd;
230 {
231 register struct dcmdevice *dcm;
232 register int i;
233 register int timo = 0;
234 int s, brd, isconsole, mbits;
235
236 dcm = (struct dcmdevice *)hd->hp_addr;
237 if ((dcm->dcm_rsid & 0x1f) != DCMID)
238 return (0);
239 brd = hd->hp_unit;
240 isconsole = (brd == BOARD(dcmconsole));
241 /*
242 * XXX selected console device (CONSUNIT) as determined by
243 * dcmcnprobe does not agree with logical numbering imposed
244 * by the config file (i.e. lowest address DCM is not unit
245 * CONSUNIT). Don't recognize this card.
246 */
247 if (isconsole && dcm != dcm_addr[BOARD(dcmconsole)])
248 return (0);
249
250 /*
251 * Empirically derived self-test magic
252 */
253 s = spltty();
254 dcm->dcm_rsid = DCMRS;
255 DELAY(50000); /* 5000 is not long enough */
256 dcm->dcm_rsid = 0;
257 dcm->dcm_ic = IC_IE;
258 dcm->dcm_cr = CR_SELFT;
259 while ((dcm->dcm_ic & IC_IR) == 0)
260 if (++timo == 20000)
261 return (0);
262 DELAY(50000) /* XXX why is this needed ???? */
263 while ((dcm->dcm_iir & IIR_SELFT) == 0)
264 if (++timo == 400000)
265 return (0);
266 DELAY(50000) /* XXX why is this needed ???? */
267 if (dcm->dcm_stcon != ST_OK) {
268 if (!isconsole)
269 printf("dcm%d: self test failed: %x\n",
270 brd, dcm->dcm_stcon);
271 return (0);
272 }
273 dcm->dcm_ic = IC_ID;
274 splx(s);
275
276 hd->hp_ipl = DCMIPL(dcm->dcm_ic);
277 dcm_addr[brd] = dcm;
278 dcm_active |= 1 << brd;
279 dcmsoftCAR[brd] = hd->hp_flags;
280 dcmisr[brd].isr_ipl = hd->hp_ipl;
281 dcmisr[brd].isr_arg = brd;
282 dcmisr[brd].isr_intr = dcmintr;
283 isrlink(&dcmisr[brd]);
284 #ifdef KGDB
285 if (major(kgdb_dev) == dcmmajor && BOARD(kgdb_dev) == brd) {
286 if (dcmconsole == UNIT(kgdb_dev))
287 kgdb_dev = NODEV; /* can't debug over console port */
288 #ifndef KGDB_CHEAT
289 /*
290 * The following could potentially be replaced
291 * by the corresponding code in dcmcnprobe.
292 */
293 else {
294 (void) dcminit(kgdb_dev, kgdb_rate);
295 if (kgdb_debug_init) {
296 printf("dcm%d: ", UNIT(kgdb_dev));
297 kgdb_connect(1);
298 } else
299 printf("dcm%d: kgdb enabled\n", UNIT(kgdb_dev));
300 }
301 /* end could be replaced */
302 #endif
303 }
304 #endif
305 if (dcmistype == DIS_TIMER)
306 dcmsetischeme(brd, DIS_RESET|DIS_TIMER);
307 else
308 dcmsetischeme(brd, DIS_RESET|DIS_PERCHAR);
309
310 /* load pointers to modem control */
311 dcm_modem[MKUNIT(brd, 0)] = &dcm->dcm_modem0;
312 dcm_modem[MKUNIT(brd, 1)] = &dcm->dcm_modem1;
313 dcm_modem[MKUNIT(brd, 2)] = &dcm->dcm_modem2;
314 dcm_modem[MKUNIT(brd, 3)] = &dcm->dcm_modem3;
315 /* set DCD (modem) and CTS (flow control) on all ports */
316 if (dcmsoftCAR[brd] & FLAG_STDDCE)
317 mbits = hp2dce_in(MI_CD|MI_CTS);
318 else
319 mbits = MI_CD|MI_CTS;
320 for (i = 0; i < 4; i++)
321 dcm_modem[MKUNIT(brd, i)]->mdmmsk = mbits;
322
323 dcm->dcm_ic = IC_IE; /* turn all interrupts on */
324 /*
325 * Need to reset baud rate, etc. of next print so reset dcmconsole.
326 * Also make sure console is always "hardwired"
327 */
328 if (isconsole) {
329 dcmconsinit = 0;
330 dcmsoftCAR[brd] |= (1 << PORT(dcmconsole));
331 }
332 return (1);
333 }
334
335 /* ARGSUSED */
336 #ifdef __STDC__
337 dcmopen(dev_t dev, int flag, int mode, struct proc *p)
338 #else
339 dcmopen(dev, flag, mode, p)
340 dev_t dev;
341 int flag, mode;
342 struct proc *p;
343 #endif
344 {
345 register struct tty *tp;
346 register int unit, brd;
347 int error = 0, mbits;
348
349 unit = UNIT(dev);
350 brd = BOARD(unit);
351 if (unit >= NDCMLINE || (dcm_active & (1 << brd)) == 0)
352 return (ENXIO);
353 if (!dcm_tty[unit])
354 tp = dcm_tty[unit] = ttymalloc();
355 else
356 tp = dcm_tty[unit];
357 tp->t_oproc = dcmstart;
358 tp->t_param = dcmparam;
359 tp->t_dev = dev;
360 if ((tp->t_state & TS_ISOPEN) == 0) {
361 tp->t_state |= TS_WOPEN;
362 ttychars(tp);
363 if (tp->t_ispeed == 0) {
364 tp->t_iflag = TTYDEF_IFLAG;
365 tp->t_oflag = TTYDEF_OFLAG;
366 tp->t_cflag = TTYDEF_CFLAG;
367 tp->t_lflag = TTYDEF_LFLAG;
368 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
369 }
370 (void) dcmparam(tp, &tp->t_termios);
371 ttsetwater(tp);
372 } else if (tp->t_state&TS_XCLUDE && p->p_ucred->cr_uid != 0)
373 return (EBUSY);
374 mbits = MO_ON;
375 if (dcmsoftCAR[brd] & FLAG_STDDCE)
376 mbits |= MO_SR; /* pin 23, could be used as RTS */
377 (void) dcmmctl(dev, mbits, DMSET); /* enable port */
378 if ((dcmsoftCAR[brd] & (1 << PORT(unit))) ||
379 (dcmmctl(dev, MO_OFF, DMGET) & MI_CD))
380 tp->t_state |= TS_CARR_ON;
381 #ifdef DEBUG
382 if (dcmdebug & DDB_MODEM)
383 printf("dcm%d: dcmopen port %d softcarr %c\n",
384 brd, unit, (tp->t_state & TS_CARR_ON) ? '1' : '0');
385 #endif
386 (void) spltty();
387 while ((flag&O_NONBLOCK) == 0 && (tp->t_cflag&CLOCAL) == 0 &&
388 (tp->t_state & TS_CARR_ON) == 0) {
389 tp->t_state |= TS_WOPEN;
390 if (error = ttysleep(tp, (caddr_t)&tp->t_rawq, TTIPRI | PCATCH,
391 ttopen, 0))
392 break;
393 }
394 (void) spl0();
395
396 #ifdef DEBUG
397 if (dcmdebug & DDB_OPENCLOSE)
398 printf("dcmopen: u %x st %x fl %x\n",
399 unit, tp->t_state, tp->t_flags);
400 #endif
401 if (error == 0)
402 error = (*linesw[tp->t_line].l_open)(dev, tp);
403 return (error);
404 }
405
406 /*ARGSUSED*/
407 dcmclose(dev, flag, mode, p)
408 dev_t dev;
409 int flag, mode;
410 struct proc *p;
411 {
412 register struct tty *tp;
413 int unit;
414
415 unit = UNIT(dev);
416 tp = dcm_tty[unit];
417 (*linesw[tp->t_line].l_close)(tp, flag);
418 if (tp->t_cflag&HUPCL || tp->t_state&TS_WOPEN ||
419 (tp->t_state&TS_ISOPEN) == 0)
420 (void) dcmmctl(dev, MO_OFF, DMSET);
421 #ifdef DEBUG
422 if (dcmdebug & DDB_OPENCLOSE)
423 printf("dcmclose: u %x st %x fl %x\n",
424 unit, tp->t_state, tp->t_flags);
425 #endif
426 ttyclose(tp);
427 #if 0
428 ttyfree(tp);
429 dcm_tty[unit] = (struct tty *)NULL;
430 #endif
431 return (0);
432 }
433
434 dcmread(dev, uio, flag)
435 dev_t dev;
436 struct uio *uio;
437 {
438 register struct tty *tp = dcm_tty[UNIT(dev)];
439
440 return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
441 }
442
443 dcmwrite(dev, uio, flag)
444 dev_t dev;
445 struct uio *uio;
446 {
447 register struct tty *tp = dcm_tty[UNIT(dev)];
448
449 return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
450 }
451
452 dcmintr(brd)
453 register int brd;
454 {
455 register struct dcmdevice *dcm = dcm_addr[brd];
456 register struct dcmischeme *dis;
457 register int unit = MKUNIT(brd, 0);
458 register int code, i;
459 int pcnd[4], mcode, mcnd[4];
460
461 /*
462 * Do all guarded register accesses right off to minimize
463 * block out of hardware.
464 */
465 SEM_LOCK(dcm);
466 if ((dcm->dcm_ic & IC_IR) == 0) {
467 SEM_UNLOCK(dcm);
468 return (0);
469 }
470 for (i = 0; i < 4; i++) {
471 pcnd[i] = dcm->dcm_icrtab[i].dcm_data;
472 dcm->dcm_icrtab[i].dcm_data = 0;
473 code = dcm_modem[unit+i]->mdmin;
474 if (dcmsoftCAR[brd] & FLAG_STDDCE)
475 code = hp2dce_in(code);
476 mcnd[i] = code;
477 }
478 code = dcm->dcm_iir & IIR_MASK;
479 dcm->dcm_iir = 0; /* XXX doc claims read clears interrupt?! */
480 mcode = dcm->dcm_modemintr;
481 dcm->dcm_modemintr = 0;
482 SEM_UNLOCK(dcm);
483
484 #ifdef DEBUG
485 if (dcmdebug & DDB_INTR) {
486 printf("dcmintr(%d): iir %x pc %x/%x/%x/%x ",
487 brd, code, pcnd[0], pcnd[1], pcnd[2], pcnd[3]);
488 printf("miir %x mc %x/%x/%x/%x\n",
489 mcode, mcnd[0], mcnd[1], mcnd[2], mcnd[3]);
490 }
491 #endif
492 if (code & IIR_TIMEO)
493 dcmrint(brd, dcm);
494 if (code & IIR_PORT0)
495 dcmpint(unit+0, pcnd[0], dcm);
496 if (code & IIR_PORT1)
497 dcmpint(unit+1, pcnd[1], dcm);
498 if (code & IIR_PORT2)
499 dcmpint(unit+2, pcnd[2], dcm);
500 if (code & IIR_PORT3)
501 dcmpint(unit+3, pcnd[3], dcm);
502 if (code & IIR_MODM) {
503 if (mcode == 0 || mcode & 0x1) /* mcode==0 -> 98642 board */
504 dcmmint(unit+0, mcnd[0], dcm);
505 if (mcode & 0x2)
506 dcmmint(unit+1, mcnd[1], dcm);
507 if (mcode & 0x4)
508 dcmmint(unit+2, mcnd[2], dcm);
509 if (mcode & 0x8)
510 dcmmint(unit+3, mcnd[3], dcm);
511 }
512
513 dis = &dcmischeme[brd];
514 /*
515 * Chalk up a receiver interrupt if the timer running or one of
516 * the ports reports a special character interrupt.
517 */
518 if ((code & IIR_TIMEO) ||
519 ((pcnd[0]|pcnd[1]|pcnd[2]|pcnd[3]) & IT_SPEC))
520 dis->dis_intr++;
521 /*
522 * See if it is time to check/change the interrupt rate.
523 */
524 if (dcmistype < 0 &&
525 (i = time.tv_sec - dis->dis_time) >= dcminterval) {
526 /*
527 * If currently per-character and averaged over 70 interrupts
528 * per-second (66 is threshold of 600 baud) in last interval,
529 * switch to timer mode.
530 *
531 * XXX decay counts ala load average to avoid spikes?
532 */
533 if (dis->dis_perchar && dis->dis_intr > 70 * i)
534 dcmsetischeme(brd, DIS_TIMER);
535 /*
536 * If currently using timer and had more interrupts than
537 * received characters in the last interval, switch back
538 * to per-character. Note that after changing to per-char
539 * we must process any characters already in the queue
540 * since they may have arrived before the bitmap was setup.
541 *
542 * XXX decay counts?
543 */
544 else if (!dis->dis_perchar && dis->dis_intr > dis->dis_char) {
545 dcmsetischeme(brd, DIS_PERCHAR);
546 dcmrint(brd, dcm);
547 }
548 dis->dis_intr = dis->dis_char = 0;
549 dis->dis_time = time.tv_sec;
550 }
551 return (1);
552 }
553
554 /*
555 * Port interrupt. Can be two things:
556 * First, it might be a special character (exception interrupt);
557 * Second, it may be a buffer empty (transmit interrupt);
558 */
559 dcmpint(unit, code, dcm)
560 int unit, code;
561 struct dcmdevice *dcm;
562 {
563 struct tty *tp = dcm_tty[unit];
564
565 if (code & IT_SPEC)
566 dcmreadbuf(unit, dcm, tp);
567 if (code & IT_TX)
568 dcmxint(unit, dcm, tp);
569 }
570
571 dcmrint(brd, dcm)
572 int brd;
573 register struct dcmdevice *dcm;
574 {
575 register int i, unit;
576 register struct tty *tp;
577
578 unit = MKUNIT(brd, 0);
579 tp = dcm_tty[unit];
580 for (i = 0; i < 4; i++, tp++, unit++)
581 dcmreadbuf(unit, dcm, tp);
582 }
583
584 dcmreadbuf(unit, dcm, tp)
585 int unit;
586 register struct dcmdevice *dcm;
587 register struct tty *tp;
588 {
589 int port = PORT(unit);
590 register struct dcmpreg *pp = dcm_preg(dcm, port);
591 register struct dcmrfifo *fifo;
592 register int c, stat;
593 register unsigned head;
594 int nch = 0;
595 #ifdef IOSTATS
596 struct dcmstats *dsp = &dcmstats[BOARD(unit)];
597
598 dsp->rints++;
599 #endif
600 if ((tp->t_state & TS_ISOPEN) == 0) {
601 #ifdef KGDB
602 if ((makedev(dcmmajor, unit) == kgdb_dev) &&
603 (head = pp->r_head & RX_MASK) != (pp->r_tail & RX_MASK) &&
604 dcm->dcm_rfifos[3-port][head>>1].data_char == FRAME_END) {
605 pp->r_head = (head + 2) & RX_MASK;
606 kgdb_connect(0); /* trap into kgdb */
607 return;
608 }
609 #endif /* KGDB */
610 pp->r_head = pp->r_tail & RX_MASK;
611 return;
612 }
613
614 head = pp->r_head & RX_MASK;
615 fifo = &dcm->dcm_rfifos[3-port][head>>1];
616 /*
617 * XXX upper bound on how many chars we will take in one swallow?
618 */
619 while (head != (pp->r_tail & RX_MASK)) {
620 /*
621 * Get character/status and update head pointer as fast
622 * as possible to make room for more characters.
623 */
624 c = fifo->data_char;
625 stat = fifo->data_stat;
626 head = (head + 2) & RX_MASK;
627 pp->r_head = head;
628 fifo = head ? fifo+1 : &dcm->dcm_rfifos[3-port][0];
629 nch++;
630
631 #ifdef DEBUG
632 if (dcmdebug & DDB_INPUT)
633 printf("dcmreadbuf(%d): c%x('%c') s%x f%x h%x t%x\n",
634 unit, c&0xFF, c, stat&0xFF,
635 tp->t_flags, head, pp->r_tail);
636 #endif
637 /*
638 * Check for and handle errors
639 */
640 if (stat & RD_MASK) {
641 #ifdef DEBUG
642 if (dcmdebug & (DDB_INPUT|DDB_SIOERR))
643 printf("dcmreadbuf(%d): err: c%x('%c') s%x\n",
644 unit, stat, c&0xFF, c);
645 #endif
646 if (stat & (RD_BD | RD_FE))
647 c |= TTY_FE;
648 else if (stat & RD_PE)
649 c |= TTY_PE;
650 else if (stat & RD_OVF)
651 log(LOG_WARNING,
652 "dcm%d: silo overflow\n", unit);
653 else if (stat & RD_OE)
654 log(LOG_WARNING,
655 "dcm%d: uart overflow\n", unit);
656 }
657 (*linesw[tp->t_line].l_rint)(c, tp);
658 }
659 dcmischeme[BOARD(unit)].dis_char += nch;
660 #ifdef IOSTATS
661 dsp->rchars += nch;
662 if (nch <= DCMRBSIZE)
663 dsp->rsilo[nch]++;
664 else
665 dsp->rsilo[DCMRBSIZE+1]++;
666 #endif
667 }
668
669 dcmxint(unit, dcm, tp)
670 int unit;
671 struct dcmdevice *dcm;
672 register struct tty *tp;
673 {
674 tp->t_state &= ~TS_BUSY;
675 if (tp->t_state & TS_FLUSH)
676 tp->t_state &= ~TS_FLUSH;
677 (*linesw[tp->t_line].l_start)(tp);
678 }
679
680 dcmmint(unit, mcnd, dcm)
681 register int unit;
682 register struct dcmdevice *dcm;
683 int mcnd;
684 {
685 register struct tty *tp;
686 int delta;
687
688 #ifdef DEBUG
689 if (dcmdebug & DDB_MODEM)
690 printf("dcmmint: port %d mcnd %x mcndlast %x\n",
691 unit, mcnd, mcndlast[unit]);
692 #endif
693 tp = dcm_tty[unit];
694 delta = mcnd ^ mcndlast[unit];
695 mcndlast[unit] = mcnd;
696 if ((delta & MI_CTS) && (tp->t_state & TS_ISOPEN) &&
697 (tp->t_flags & CCTS_OFLOW)) {
698 if (mcnd & MI_CTS) {
699 tp->t_state &= ~TS_TTSTOP;
700 ttstart(tp);
701 } else
702 tp->t_state |= TS_TTSTOP; /* inline dcmstop */
703 }
704 if (delta & MI_CD) {
705 if (mcnd & MI_CD)
706 (void)(*linesw[tp->t_line].l_modem)(tp, 1);
707 else if ((dcmsoftCAR[BOARD(unit)] & (1 << PORT(unit))) == 0 &&
708 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) {
709 dcm_modem[unit]->mdmout = MO_OFF;
710 SEM_LOCK(dcm);
711 dcm->dcm_modemchng |= 1<<(unit & 3);
712 dcm->dcm_cr |= CR_MODM;
713 SEM_UNLOCK(dcm);
714 DELAY(10); /* time to change lines */
715 }
716 }
717 }
718
719 dcmioctl(dev, cmd, data, flag)
720 dev_t dev;
721 caddr_t data;
722 {
723 register struct tty *tp;
724 register int unit = UNIT(dev);
725 register struct dcmdevice *dcm;
726 register int port;
727 int error, s;
728
729 #ifdef DEBUG
730 if (dcmdebug & DDB_IOCTL)
731 printf("dcmioctl: unit %d cmd %x data %x flag %x\n",
732 unit, cmd, *data, flag);
733 #endif
734 tp = dcm_tty[unit];
735 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag);
736 if (error >= 0)
737 return (error);
738 error = ttioctl(tp, cmd, data, flag);
739 if (error >= 0)
740 return (error);
741
742 port = PORT(unit);
743 dcm = dcm_addr[BOARD(unit)];
744 switch (cmd) {
745 case TIOCSBRK:
746 /*
747 * Wait for transmitter buffer to empty
748 */
749 s = spltty();
750 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
751 DELAY(DCM_USPERCH(tp->t_ospeed));
752 SEM_LOCK(dcm);
753 dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
754 dcm->dcm_cr |= (1 << port); /* start break */
755 SEM_UNLOCK(dcm);
756 splx(s);
757 break;
758
759 case TIOCCBRK:
760 SEM_LOCK(dcm);
761 dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
762 dcm->dcm_cr |= (1 << port); /* end break */
763 SEM_UNLOCK(dcm);
764 break;
765
766 case TIOCSDTR:
767 (void) dcmmctl(dev, MO_ON, DMBIS);
768 break;
769
770 case TIOCCDTR:
771 (void) dcmmctl(dev, MO_ON, DMBIC);
772 break;
773
774 case TIOCMSET:
775 (void) dcmmctl(dev, *(int *)data, DMSET);
776 break;
777
778 case TIOCMBIS:
779 (void) dcmmctl(dev, *(int *)data, DMBIS);
780 break;
781
782 case TIOCMBIC:
783 (void) dcmmctl(dev, *(int *)data, DMBIC);
784 break;
785
786 case TIOCMGET:
787 *(int *)data = dcmmctl(dev, 0, DMGET);
788 break;
789
790 default:
791 return (ENOTTY);
792 }
793 return (0);
794 }
795
796 dcmparam(tp, t)
797 register struct tty *tp;
798 register struct termios *t;
799 {
800 register struct dcmdevice *dcm;
801 register int port, mode, cflag = t->c_cflag;
802 int ospeed = ttspeedtab(t->c_ospeed, dcmspeedtab);
803
804 /* check requested parameters */
805 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
806 return (EINVAL);
807 /* and copy to tty */
808 tp->t_ispeed = t->c_ispeed;
809 tp->t_ospeed = t->c_ospeed;
810 tp->t_cflag = cflag;
811 if (ospeed == 0) {
812 (void) dcmmctl(UNIT(tp->t_dev), MO_OFF, DMSET);
813 return (0);
814 }
815
816 mode = 0;
817 switch (cflag&CSIZE) {
818 case CS5:
819 mode = LC_5BITS; break;
820 case CS6:
821 mode = LC_6BITS; break;
822 case CS7:
823 mode = LC_7BITS; break;
824 case CS8:
825 mode = LC_8BITS; break;
826 }
827 if (cflag&PARENB) {
828 if (cflag&PARODD)
829 mode |= LC_PODD;
830 else
831 mode |= LC_PEVEN;
832 }
833 if (cflag&CSTOPB)
834 mode |= LC_2STOP;
835 else
836 mode |= LC_1STOP;
837 #ifdef DEBUG
838 if (dcmdebug & DDB_PARAM)
839 printf("dcmparam(%d): cflag %x mode %x speed %d uperch %d\n",
840 UNIT(tp->t_dev), cflag, mode, tp->t_ospeed,
841 DCM_USPERCH(tp->t_ospeed));
842 #endif
843
844 port = PORT(tp->t_dev);
845 dcm = dcm_addr[BOARD(tp->t_dev)];
846 /*
847 * Wait for transmitter buffer to empty.
848 */
849 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
850 DELAY(DCM_USPERCH(tp->t_ospeed));
851 /*
852 * Make changes known to hardware.
853 */
854 dcm->dcm_data[port].dcm_baud = ospeed;
855 dcm->dcm_data[port].dcm_conf = mode;
856 SEM_LOCK(dcm);
857 dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
858 dcm->dcm_cr |= (1 << port);
859 SEM_UNLOCK(dcm);
860 /*
861 * Delay for config change to take place. Weighted by baud.
862 * XXX why do we do this?
863 */
864 DELAY(16 * DCM_USPERCH(tp->t_ospeed));
865 return (0);
866 }
867
868 void
869 dcmstart(tp)
870 register struct tty *tp;
871 {
872 register struct dcmdevice *dcm;
873 register struct dcmpreg *pp;
874 register struct dcmtfifo *fifo;
875 register char *bp;
876 register unsigned tail, next;
877 register int port, nch;
878 unsigned head;
879 char buf[16];
880 int s;
881 #ifdef IOSTATS
882 struct dcmstats *dsp = &dcmstats[BOARD(tp->t_dev)];
883 int tch = 0;
884 #endif
885
886 s = spltty();
887 #ifdef IOSTATS
888 dsp->xints++;
889 #endif
890 #ifdef DEBUG
891 if (dcmdebug & DDB_OUTPUT)
892 printf("dcmstart(%d): state %x flags %x outcc %d\n",
893 UNIT(tp->t_dev), tp->t_state, tp->t_flags,
894 tp->t_outq.c_cc);
895 #endif
896 if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
897 goto out;
898 if (tp->t_outq.c_cc <= tp->t_lowat) {
899 if (tp->t_state&TS_ASLEEP) {
900 tp->t_state &= ~TS_ASLEEP;
901 wakeup((caddr_t)&tp->t_outq);
902 }
903 selwakeup(&tp->t_wsel);
904 }
905 if (tp->t_outq.c_cc == 0) {
906 #ifdef IOSTATS
907 dsp->xempty++;
908 #endif
909 goto out;
910 }
911
912 dcm = dcm_addr[BOARD(tp->t_dev)];
913 port = PORT(tp->t_dev);
914 pp = dcm_preg(dcm, port);
915 tail = pp->t_tail & TX_MASK;
916 next = (tail + 1) & TX_MASK;
917 head = pp->t_head & TX_MASK;
918 if (head == next)
919 goto out;
920 fifo = &dcm->dcm_tfifos[3-port][tail];
921 again:
922 nch = q_to_b(&tp->t_outq, buf, (head - next) & TX_MASK);
923 #ifdef IOSTATS
924 tch += nch;
925 #endif
926 #ifdef DEBUG
927 if (dcmdebug & DDB_OUTPUT)
928 printf("\thead %x tail %x nch %d\n", head, tail, nch);
929 #endif
930 /*
931 * Loop transmitting all the characters we can.
932 */
933 for (bp = buf; --nch >= 0; bp++) {
934 fifo->data_char = *bp;
935 pp->t_tail = next;
936 /*
937 * If this is the first character,
938 * get the hardware moving right now.
939 */
940 if (bp == buf) {
941 tp->t_state |= TS_BUSY;
942 SEM_LOCK(dcm);
943 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
944 dcm->dcm_cr |= (1 << port);
945 SEM_UNLOCK(dcm);
946 }
947 tail = next;
948 fifo = tail ? fifo+1 : &dcm->dcm_tfifos[3-port][0];
949 next = (next + 1) & TX_MASK;
950 }
951 /*
952 * Head changed while we were loading the buffer,
953 * go back and load some more if we can.
954 */
955 if (tp->t_outq.c_cc && head != (pp->t_head & TX_MASK)) {
956 #ifdef IOSTATS
957 dsp->xrestarts++;
958 #endif
959 head = pp->t_head & TX_MASK;
960 goto again;
961 }
962
963 /*
964 * Kick it one last time in case it finished while we were
965 * loading the last bunch.
966 */
967 if (bp > &buf[1]) {
968 tp->t_state |= TS_BUSY;
969 SEM_LOCK(dcm);
970 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
971 dcm->dcm_cr |= (1 << port);
972 SEM_UNLOCK(dcm);
973 }
974 #ifdef DEBUG
975 if (dcmdebug & DDB_INTR)
976 printf("dcmstart(%d): head %x tail %x outqcc %d\n",
977 UNIT(tp->t_dev), head, tail, tp->t_outq.c_cc);
978 #endif
979 out:
980 #ifdef IOSTATS
981 dsp->xchars += tch;
982 if (tch <= DCMXBSIZE)
983 dsp->xsilo[tch]++;
984 else
985 dsp->xsilo[DCMXBSIZE+1]++;
986 #endif
987 splx(s);
988 }
989
990 /*
991 * Stop output on a line.
992 */
993 dcmstop(tp, flag)
994 register struct tty *tp;
995 {
996 int s;
997
998 s = spltty();
999 if (tp->t_state & TS_BUSY) {
1000 /* XXX is there some way to safely stop transmission? */
1001 if ((tp->t_state&TS_TTSTOP) == 0)
1002 tp->t_state |= TS_FLUSH;
1003 }
1004 splx(s);
1005 }
1006
1007 /*
1008 * Modem control
1009 */
1010 dcmmctl(dev, bits, how)
1011 dev_t dev;
1012 int bits, how;
1013 {
1014 register struct dcmdevice *dcm;
1015 int s, unit, brd, hit = 0;
1016
1017 unit = UNIT(dev);
1018 #ifdef DEBUG
1019 if (dcmdebug & DDB_MODEM)
1020 printf("dcmmctl(%d) unit %d bits 0x%x how %x\n",
1021 BOARD(unit), unit, bits, how);
1022 #endif
1023
1024 brd = BOARD(unit);
1025 dcm = dcm_addr[brd];
1026 s = spltty();
1027 switch (how) {
1028
1029 case DMSET:
1030 dcm_modem[unit]->mdmout = bits;
1031 hit++;
1032 break;
1033
1034 case DMBIS:
1035 dcm_modem[unit]->mdmout |= bits;
1036 hit++;
1037 break;
1038
1039 case DMBIC:
1040 dcm_modem[unit]->mdmout &= ~bits;
1041 hit++;
1042 break;
1043
1044 case DMGET:
1045 bits = dcm_modem[unit]->mdmin;
1046 if (dcmsoftCAR[brd] & FLAG_STDDCE)
1047 bits = hp2dce_in(bits);
1048 break;
1049 }
1050 if (hit) {
1051 SEM_LOCK(dcm);
1052 dcm->dcm_modemchng |= 1<<(unit & 3);
1053 dcm->dcm_cr |= CR_MODM;
1054 SEM_UNLOCK(dcm);
1055 DELAY(10); /* delay until done */
1056 (void) splx(s);
1057 }
1058 return (bits);
1059 }
1060
1061 /*
1062 * Set board to either interrupt per-character or at a fixed interval.
1063 */
1064 dcmsetischeme(brd, flags)
1065 int brd, flags;
1066 {
1067 register struct dcmdevice *dcm = dcm_addr[brd];
1068 register struct dcmischeme *dis = &dcmischeme[brd];
1069 register int i;
1070 u_char mask;
1071 int perchar = flags & DIS_PERCHAR;
1072
1073 #ifdef DEBUG
1074 if (dcmdebug & DDB_INTSCHM)
1075 printf("dcmsetischeme(%d, %d): cur %d, ints %d, chars %d\n",
1076 brd, perchar, dis->dis_perchar,
1077 dis->dis_intr, dis->dis_char);
1078 if ((flags & DIS_RESET) == 0 && perchar == dis->dis_perchar) {
1079 printf("dcmsetischeme(%d): redundent request %d\n",
1080 brd, perchar);
1081 return;
1082 }
1083 #endif
1084 /*
1085 * If perchar is non-zero, we enable interrupts on all characters
1086 * otherwise we disable perchar interrupts and use periodic
1087 * polling interrupts.
1088 */
1089 dis->dis_perchar = perchar;
1090 mask = perchar ? 0xf : 0x0;
1091 for (i = 0; i < 256; i++)
1092 dcm->dcm_bmap[i].data_data = mask;
1093 /*
1094 * Don't slow down tandem mode, interrupt on flow control
1095 * chars for any port on the board.
1096 */
1097 if (!perchar) {
1098 register struct tty *tp = dcm_tty[MKUNIT(brd, 0)];
1099 int c;
1100
1101 for (i = 0; i < 4; i++, tp++) {
1102 if ((c = tp->t_cc[VSTART]) != _POSIX_VDISABLE)
1103 dcm->dcm_bmap[c].data_data |= (1 << i);
1104 if ((c = tp->t_cc[VSTOP]) != _POSIX_VDISABLE)
1105 dcm->dcm_bmap[c].data_data |= (1 << i);
1106 }
1107 }
1108 /*
1109 * Board starts with timer disabled so if first call is to
1110 * set perchar mode then we don't want to toggle the timer.
1111 */
1112 if (flags == (DIS_RESET|DIS_PERCHAR))
1113 return;
1114 /*
1115 * Toggle card 16.7ms interrupts (we first make sure that card
1116 * has cleared the bit so it will see the toggle).
1117 */
1118 while (dcm->dcm_cr & CR_TIMER)
1119 ;
1120 SEM_LOCK(dcm);
1121 dcm->dcm_cr |= CR_TIMER;
1122 SEM_UNLOCK(dcm);
1123 }
1124
1125 /*
1126 * Following are all routines needed for DCM to act as console
1127 */
1128 #include <dev/cons.h>
1129
1130 dcmcnprobe(cp)
1131 struct consdev *cp;
1132 {
1133 register struct hp_hw *hw;
1134 int unit;
1135
1136 /* locate the major number */
1137 for (dcmmajor = 0; dcmmajor < nchrdev; dcmmajor++)
1138 if (cdevsw[dcmmajor].d_open == dcmopen)
1139 break;
1140
1141 /*
1142 * Implicitly assigns the lowest select code DCM card found to be
1143 * logical unit 0 (actually CONUNIT). If your config file does
1144 * anything different, you're screwed.
1145 */
1146 for (hw = sc_table; hw->hw_type; hw++)
1147 if (HW_ISDEV(hw, D_COMMDCM) && !badaddr((short *)hw->hw_kva))
1148 break;
1149 if (!HW_ISDEV(hw, D_COMMDCM)) {
1150 cp->cn_pri = CN_DEAD;
1151 return;
1152 }
1153 unit = CONUNIT;
1154 dcm_addr[BOARD(CONUNIT)] = (struct dcmdevice *)hw->hw_kva;
1155
1156 /* initialize required fields */
1157 cp->cn_dev = makedev(dcmmajor, unit);
1158 switch (dcm_addr[BOARD(unit)]->dcm_rsid) {
1159 case DCMID:
1160 cp->cn_pri = CN_NORMAL;
1161 break;
1162 case DCMID|DCMCON:
1163 cp->cn_pri = CN_REMOTE;
1164 break;
1165 default:
1166 cp->cn_pri = CN_DEAD;
1167 return;
1168 }
1169 /*
1170 * If dcmconsole is initialized, raise our priority.
1171 */
1172 if (dcmconsole == UNIT(unit))
1173 cp->cn_pri = CN_REMOTE;
1174 #ifdef KGDB_CHEAT
1175 /*
1176 * This doesn't currently work, at least not with ite consoles;
1177 * the console hasn't been initialized yet.
1178 */
1179 if (major(kgdb_dev) == dcmmajor && BOARD(kgdb_dev) == BOARD(unit)) {
1180 (void) dcminit(kgdb_dev, kgdb_rate);
1181 if (kgdb_debug_init) {
1182 /*
1183 * We assume that console is ready for us...
1184 * this assumes that a dca or ite console
1185 * has been selected already and will init
1186 * on the first putc.
1187 */
1188 printf("dcm%d: ", UNIT(kgdb_dev));
1189 kgdb_connect(1);
1190 }
1191 }
1192 #endif
1193 }
1194
1195 dcmcninit(cp)
1196 struct consdev *cp;
1197 {
1198 dcminit(cp->cn_dev, dcmdefaultrate);
1199 dcmconsinit = 1;
1200 dcmconsole = UNIT(cp->cn_dev);
1201 }
1202
1203 dcminit(dev, rate)
1204 dev_t dev;
1205 int rate;
1206 {
1207 register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
1208 int s, mode, port;
1209
1210 port = PORT(dev);
1211 mode = LC_8BITS | LC_1STOP;
1212 s = splhigh();
1213 /*
1214 * Wait for transmitter buffer to empty.
1215 */
1216 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
1217 DELAY(DCM_USPERCH(rate));
1218 /*
1219 * Make changes known to hardware.
1220 */
1221 dcm->dcm_data[port].dcm_baud = ttspeedtab(rate, dcmspeedtab);
1222 dcm->dcm_data[port].dcm_conf = mode;
1223 SEM_LOCK(dcm);
1224 dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
1225 dcm->dcm_cr |= (1 << port);
1226 SEM_UNLOCK(dcm);
1227 /*
1228 * Delay for config change to take place. Weighted by baud.
1229 * XXX why do we do this?
1230 */
1231 DELAY(16 * DCM_USPERCH(rate));
1232 splx(s);
1233 }
1234
1235 dcmcngetc(dev)
1236 dev_t dev;
1237 {
1238 register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
1239 register struct dcmrfifo *fifo;
1240 register struct dcmpreg *pp;
1241 register unsigned head;
1242 int s, c, stat, port;
1243
1244 port = PORT(dev);
1245 pp = dcm_preg(dcm, port);
1246 s = splhigh();
1247 head = pp->r_head & RX_MASK;
1248 fifo = &dcm->dcm_rfifos[3-port][head>>1];
1249 while (head == (pp->r_tail & RX_MASK))
1250 ;
1251 /*
1252 * If board interrupts are enabled, just let our received char
1253 * interrupt through in case some other port on the board was
1254 * busy. Otherwise we must clear the interrupt.
1255 */
1256 SEM_LOCK(dcm);
1257 if ((dcm->dcm_ic & IC_IE) == 0)
1258 stat = dcm->dcm_iir;
1259 SEM_UNLOCK(dcm);
1260 c = fifo->data_char;
1261 stat = fifo->data_stat;
1262 pp->r_head = (head + 2) & RX_MASK;
1263 splx(s);
1264 return (c);
1265 }
1266
1267 /*
1268 * Console kernel output character routine.
1269 */
1270 dcmcnputc(dev, c)
1271 dev_t dev;
1272 int c;
1273 {
1274 register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
1275 register struct dcmpreg *pp;
1276 unsigned tail;
1277 int s, port, stat;
1278
1279 port = PORT(dev);
1280 pp = dcm_preg(dcm, port);
1281 s = splhigh();
1282 #ifdef KGDB
1283 if (dev != kgdb_dev)
1284 #endif
1285 if (dcmconsinit == 0) {
1286 (void) dcminit(dev, dcmdefaultrate);
1287 dcmconsinit = 1;
1288 }
1289 tail = pp->t_tail & TX_MASK;
1290 while (tail != (pp->t_head & TX_MASK))
1291 ;
1292 dcm->dcm_tfifos[3-port][tail].data_char = c;
1293 pp->t_tail = tail = (tail + 1) & TX_MASK;
1294 SEM_LOCK(dcm);
1295 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
1296 dcm->dcm_cr |= (1 << port);
1297 SEM_UNLOCK(dcm);
1298 while (tail != (pp->t_head & TX_MASK))
1299 ;
1300 /*
1301 * If board interrupts are enabled, just let our completion
1302 * interrupt through in case some other port on the board
1303 * was busy. Otherwise we must clear the interrupt.
1304 */
1305 if ((dcm->dcm_ic & IC_IE) == 0) {
1306 SEM_LOCK(dcm);
1307 stat = dcm->dcm_iir;
1308 SEM_UNLOCK(dcm);
1309 }
1310 splx(s);
1311 }
1312 #endif
1313