dcm.c revision 1.14 1 /*
2 * Copyright (c) 1988 University of Utah.
3 * Copyright (c) 1982, 1986, 1990, 1993
4 * The Regents of the University of California. All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * the Systems Programming Group of the University of Utah Computer
8 * Science Department.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * from Utah: $Hdr: dcm.c 1.29 92/01/21$
39 *
40 * from: @(#)dcm.c 8.4 (Berkeley) 1/12/94
41 * $Id: dcm.c,v 1.14 1994/05/23 05:58:40 mycroft Exp $
42 */
43
44 /*
45 * TODO:
46 * Timeouts
47 * Test console support.
48 */
49
50 #include "dcm.h"
51 #if NDCM > 0
52 /*
53 * 98642/MUX
54 */
55 #include <sys/param.h>
56 #include <sys/systm.h>
57 #include <sys/ioctl.h>
58 #include <sys/proc.h>
59 #include <sys/tty.h>
60 #include <sys/conf.h>
61 #include <sys/file.h>
62 #include <sys/uio.h>
63 #include <sys/kernel.h>
64 #include <sys/syslog.h>
65 #include <sys/time.h>
66
67 #include <machine/cpu.h>
68
69 #include <hp300/dev/device.h>
70 #include <hp300/dev/dcmreg.h>
71 #include <hp300/hp300/isr.h>
72
73 #ifndef DEFAULT_BAUD_RATE
74 #define DEFAULT_BAUD_RATE 9600
75 #endif
76
77 int dcmprobe(), dcmintr(), dcmparam();
78 void dcmstart();
79 struct driver dcmdriver = {
80 dcmprobe, "dcm",
81 };
82
83 #define NDCMLINE (NDCM*4)
84
85 struct tty *dcm_tty[NDCMLINE];
86 struct modemreg *dcm_modem[NDCMLINE];
87 char mcndlast[NDCMLINE]; /* XXX last modem status for line */
88 int ndcm = NDCMLINE;
89
90 int dcm_active;
91 int dcmsoftCAR[NDCM];
92 struct dcmdevice *dcm_addr[NDCM];
93 struct isr dcmisr[NDCM];
94
95 struct speedtab dcmspeedtab[] = {
96 0, BR_0,
97 50, BR_50,
98 75, BR_75,
99 110, BR_110,
100 134, BR_134,
101 150, BR_150,
102 300, BR_300,
103 600, BR_600,
104 1200, BR_1200,
105 1800, BR_1800,
106 2400, BR_2400,
107 4800, BR_4800,
108 9600, BR_9600,
109 19200, BR_19200,
110 38400, BR_38400,
111 -1, -1
112 };
113
114 /* u-sec per character based on baudrate (assumes 1 start/8 data/1 stop bit) */
115 #define DCM_USPERCH(s) (10000000 / (s))
116
117 /*
118 * Per board interrupt scheme. 16.7ms is the polling interrupt rate
119 * (16.7ms is about 550 baud, 38.4k is 72 chars in 16.7ms).
120 */
121 #define DIS_TIMER 0
122 #define DIS_PERCHAR 1
123 #define DIS_RESET 2
124
125 int dcmistype = -1; /* -1 == dynamic, 0 == timer, 1 == perchar */
126 int dcminterval = 5; /* interval (secs) between checks */
127 struct dcmischeme {
128 int dis_perchar; /* non-zero if interrupting per char */
129 long dis_time; /* last time examined */
130 int dis_intr; /* recv interrupts during last interval */
131 int dis_char; /* characters read during last interval */
132 } dcmischeme[NDCM];
133
134 /*
135 * Console support
136 */
137 #ifdef DCMCONSOLE
138 int dcmconsole = DCMCONSOLE;
139 #else
140 int dcmconsole = -1;
141 #endif
142 int dcmconsinit;
143 int dcmdefaultrate = DEFAULT_BAUD_RATE;
144 int dcmconbrdbusy = 0;
145 int dcmmajor;
146
147 #ifdef KGDB
148 /*
149 * Kernel GDB support
150 */
151 #include <machine/remote-sl.h>
152
153 extern dev_t kgdb_dev;
154 extern int kgdb_rate;
155 extern int kgdb_debug_init;
156 #endif
157
158 /* #define DCMSTATS */
159
160 #ifdef DEBUG
161 int dcmdebug = 0x0;
162 #define DDB_SIOERR 0x01
163 #define DDB_PARAM 0x02
164 #define DDB_INPUT 0x04
165 #define DDB_OUTPUT 0x08
166 #define DDB_INTR 0x10
167 #define DDB_IOCTL 0x20
168 #define DDB_INTSCHM 0x40
169 #define DDB_MODEM 0x80
170 #define DDB_OPENCLOSE 0x100
171 #endif
172
173 #ifdef DCMSTATS
174 #define DCMRBSIZE 94
175 #define DCMXBSIZE 24
176
177 struct dcmstats {
178 long xints; /* # of xmit ints */
179 long xchars; /* # of xmit chars */
180 long xempty; /* times outq is empty in dcmstart */
181 long xrestarts; /* times completed while xmitting */
182 long rints; /* # of recv ints */
183 long rchars; /* # of recv chars */
184 long xsilo[DCMXBSIZE+2]; /* times this many chars xmit on one int */
185 long rsilo[DCMRBSIZE+2]; /* times this many chars read on one int */
186 } dcmstats[NDCM];
187 #endif
188
189 #define UNIT(x) minor(x)
190 #define BOARD(x) (((x) >> 2) & 0x3f)
191 #define PORT(x) ((x) & 3)
192 #define MKUNIT(b,p) (((b) << 2) | (p))
193
194 /*
195 * Conversion from "HP DCE" to almost-normal DCE: on the 638 8-port mux,
196 * the distribution panel uses "HP DCE" conventions. If requested via
197 * the device flags, we swap the inputs to something closer to normal DCE,
198 * allowing a straight-through cable to a DTE or a reversed cable
199 * to a DCE (reversing 2-3, 4-5, 8-20 and leaving 6 unconnected;
200 * this gets "DCD" on pin 20 and "CTS" on 4, but doesn't connect
201 * DSR or make RTS work, though). The following gives the full
202 * details of a cable from this mux panel to a modem:
203 *
204 * HP modem
205 * name pin pin name
206 * HP inputs:
207 * "Rx" 2 3 Tx
208 * CTS 4 5 CTS (only needed for CCTS_OFLOW)
209 * DCD 20 8 DCD
210 * "DSR" 9 6 DSR (unneeded)
211 * RI 22 22 RI (unneeded)
212 *
213 * HP outputs:
214 * "Tx" 3 2 Rx
215 * "DTR" 6 not connected
216 * "RTS" 8 20 DTR
217 * "SR" 23 4 RTS (often not needed)
218 */
219 #define FLAG_STDDCE 0x10 /* map inputs if this bit is set in flags */
220 #define hp2dce_in(ibits) (iconv[(ibits) & 0xf])
221 static char iconv[16] = {
222 0, MI_DM, MI_CTS, MI_CTS|MI_DM,
223 MI_CD, MI_CD|MI_DM, MI_CD|MI_CTS, MI_CD|MI_CTS|MI_DM,
224 MI_RI, MI_RI|MI_DM, MI_RI|MI_CTS, MI_RI|MI_CTS|MI_DM,
225 MI_RI|MI_CD, MI_RI|MI_CD|MI_DM, MI_RI|MI_CD|MI_CTS,
226 MI_RI|MI_CD|MI_CTS|MI_DM
227 };
228
229 dcmprobe(hd)
230 register struct hp_device *hd;
231 {
232 register struct dcmdevice *dcm;
233 register int i;
234 register int timo = 0;
235 int s, brd, isconsole, mbits;
236
237 dcm = (struct dcmdevice *)hd->hp_addr;
238 if ((dcm->dcm_rsid & 0x1f) != DCMID)
239 return (0);
240 brd = hd->hp_unit;
241 isconsole = (brd == BOARD(dcmconsole));
242 /*
243 * XXX selected console device (CONSUNIT) as determined by
244 * dcmcnprobe does not agree with logical numbering imposed
245 * by the config file (i.e. lowest address DCM is not unit
246 * CONSUNIT). Don't recognize this card.
247 */
248 if (isconsole && dcm != dcm_addr[BOARD(dcmconsole)])
249 return (0);
250
251 /*
252 * Empirically derived self-test magic
253 */
254 s = spltty();
255 dcm->dcm_rsid = DCMRS;
256 DELAY(50000); /* 5000 is not long enough */
257 dcm->dcm_rsid = 0;
258 dcm->dcm_ic = IC_IE;
259 dcm->dcm_cr = CR_SELFT;
260 while ((dcm->dcm_ic & IC_IR) == 0)
261 if (++timo == 20000)
262 return (0);
263 DELAY(50000) /* XXX why is this needed ???? */
264 while ((dcm->dcm_iir & IIR_SELFT) == 0)
265 if (++timo == 400000)
266 return (0);
267 DELAY(50000) /* XXX why is this needed ???? */
268 if (dcm->dcm_stcon != ST_OK) {
269 if (!isconsole)
270 printf("dcm%d: self test failed: %x\n",
271 brd, dcm->dcm_stcon);
272 return (0);
273 }
274 dcm->dcm_ic = IC_ID;
275 splx(s);
276
277 hd->hp_ipl = DCMIPL(dcm->dcm_ic);
278 dcm_addr[brd] = dcm;
279 dcm_active |= 1 << brd;
280 dcmsoftCAR[brd] = hd->hp_flags;
281 dcmisr[brd].isr_ipl = hd->hp_ipl;
282 dcmisr[brd].isr_arg = brd;
283 dcmisr[brd].isr_intr = dcmintr;
284 isrlink(&dcmisr[brd]);
285 #ifdef KGDB
286 if (major(kgdb_dev) == dcmmajor && BOARD(kgdb_dev) == brd) {
287 if (dcmconsole == UNIT(kgdb_dev))
288 kgdb_dev = NODEV; /* can't debug over console port */
289 #ifndef KGDB_CHEAT
290 /*
291 * The following could potentially be replaced
292 * by the corresponding code in dcmcnprobe.
293 */
294 else {
295 (void) dcminit(kgdb_dev, kgdb_rate);
296 if (kgdb_debug_init) {
297 printf("dcm%d: ", UNIT(kgdb_dev));
298 kgdb_connect(1);
299 } else
300 printf("dcm%d: kgdb enabled\n", UNIT(kgdb_dev));
301 }
302 /* end could be replaced */
303 #endif
304 }
305 #endif
306 if (dcmistype == DIS_TIMER)
307 dcmsetischeme(brd, DIS_RESET|DIS_TIMER);
308 else
309 dcmsetischeme(brd, DIS_RESET|DIS_PERCHAR);
310
311 /* load pointers to modem control */
312 dcm_modem[MKUNIT(brd, 0)] = &dcm->dcm_modem0;
313 dcm_modem[MKUNIT(brd, 1)] = &dcm->dcm_modem1;
314 dcm_modem[MKUNIT(brd, 2)] = &dcm->dcm_modem2;
315 dcm_modem[MKUNIT(brd, 3)] = &dcm->dcm_modem3;
316 /* set DCD (modem) and CTS (flow control) on all ports */
317 if (dcmsoftCAR[brd] & FLAG_STDDCE)
318 mbits = hp2dce_in(MI_CD|MI_CTS);
319 else
320 mbits = MI_CD|MI_CTS;
321 for (i = 0; i < 4; i++)
322 dcm_modem[MKUNIT(brd, i)]->mdmmsk = mbits;
323
324 dcm->dcm_ic = IC_IE; /* turn all interrupts on */
325 /*
326 * Need to reset baud rate, etc. of next print so reset dcmconsole.
327 * Also make sure console is always "hardwired"
328 */
329 if (isconsole) {
330 dcmconsinit = 0;
331 dcmsoftCAR[brd] |= (1 << PORT(dcmconsole));
332 }
333 return (1);
334 }
335
336 /* ARGSUSED */
337 #ifdef __STDC__
338 dcmopen(dev_t dev, int flag, int mode, struct proc *p)
339 #else
340 dcmopen(dev, flag, mode, p)
341 dev_t dev;
342 int flag, mode;
343 struct proc *p;
344 #endif
345 {
346 register struct tty *tp;
347 register int unit, brd;
348 int error = 0, mbits;
349
350 unit = UNIT(dev);
351 brd = BOARD(unit);
352 if (unit >= NDCMLINE || (dcm_active & (1 << brd)) == 0)
353 return (ENXIO);
354 if (!dcm_tty[unit])
355 tp = dcm_tty[unit] = ttymalloc();
356 else
357 tp = dcm_tty[unit];
358 tp->t_oproc = dcmstart;
359 tp->t_param = dcmparam;
360 tp->t_dev = dev;
361 if ((tp->t_state & TS_ISOPEN) == 0) {
362 tp->t_state |= TS_WOPEN;
363 ttychars(tp);
364 if (tp->t_ispeed == 0) {
365 tp->t_iflag = TTYDEF_IFLAG;
366 tp->t_oflag = TTYDEF_OFLAG;
367 tp->t_cflag = TTYDEF_CFLAG;
368 tp->t_lflag = TTYDEF_LFLAG;
369 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
370 }
371 (void) dcmparam(tp, &tp->t_termios);
372 ttsetwater(tp);
373 } else if (tp->t_state&TS_XCLUDE && p->p_ucred->cr_uid != 0)
374 return (EBUSY);
375 mbits = MO_ON;
376 if (dcmsoftCAR[brd] & FLAG_STDDCE)
377 mbits |= MO_SR; /* pin 23, could be used as RTS */
378 (void) dcmmctl(dev, mbits, DMSET); /* enable port */
379 if ((dcmsoftCAR[brd] & (1 << PORT(unit))) ||
380 (dcmmctl(dev, MO_OFF, DMGET) & MI_CD))
381 tp->t_state |= TS_CARR_ON;
382 #ifdef DEBUG
383 if (dcmdebug & DDB_MODEM)
384 printf("dcm%d: dcmopen port %d softcarr %c\n",
385 brd, unit, (tp->t_state & TS_CARR_ON) ? '1' : '0');
386 #endif
387 (void) spltty();
388 while ((flag&O_NONBLOCK) == 0 && (tp->t_cflag&CLOCAL) == 0 &&
389 (tp->t_state & TS_CARR_ON) == 0) {
390 tp->t_state |= TS_WOPEN;
391 if (error = ttysleep(tp, (caddr_t)&tp->t_rawq, TTIPRI | PCATCH,
392 ttopen, 0))
393 break;
394 }
395 (void) spl0();
396
397 #ifdef DEBUG
398 if (dcmdebug & DDB_OPENCLOSE)
399 printf("dcmopen: u %x st %x fl %x\n",
400 unit, tp->t_state, tp->t_flags);
401 #endif
402 if (error == 0)
403 error = (*linesw[tp->t_line].l_open)(dev, tp);
404 return (error);
405 }
406
407 /*ARGSUSED*/
408 dcmclose(dev, flag, mode, p)
409 dev_t dev;
410 int flag, mode;
411 struct proc *p;
412 {
413 register struct tty *tp;
414 int unit;
415
416 unit = UNIT(dev);
417 tp = dcm_tty[unit];
418 (*linesw[tp->t_line].l_close)(tp, flag);
419 if (tp->t_cflag&HUPCL || tp->t_state&TS_WOPEN ||
420 (tp->t_state&TS_ISOPEN) == 0)
421 (void) dcmmctl(dev, MO_OFF, DMSET);
422 #ifdef DEBUG
423 if (dcmdebug & DDB_OPENCLOSE)
424 printf("dcmclose: u %x st %x fl %x\n",
425 unit, tp->t_state, tp->t_flags);
426 #endif
427 ttyclose(tp);
428 #if 0
429 ttyfree(tp);
430 dcm_tty[unit] = (struct tty *)0;
431 #endif
432 return (0);
433 }
434
435 dcmread(dev, uio, flag)
436 dev_t dev;
437 struct uio *uio;
438 int flag;
439 {
440 register struct tty *tp = dcm_tty[UNIT(dev)];
441
442 return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
443 }
444
445 dcmwrite(dev, uio, flag)
446 dev_t dev;
447 struct uio *uio;
448 int flag;
449 {
450 register struct tty *tp = dcm_tty[UNIT(dev)];
451
452 return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
453 }
454
455 dcmintr(brd)
456 register int brd;
457 {
458 register struct dcmdevice *dcm = dcm_addr[brd];
459 register struct dcmischeme *dis;
460 register int unit = MKUNIT(brd, 0);
461 register int code, i;
462 int pcnd[4], mcode, mcnd[4];
463
464 /*
465 * Do all guarded register accesses right off to minimize
466 * block out of hardware.
467 */
468 SEM_LOCK(dcm);
469 if ((dcm->dcm_ic & IC_IR) == 0) {
470 SEM_UNLOCK(dcm);
471 return (0);
472 }
473 for (i = 0; i < 4; i++) {
474 pcnd[i] = dcm->dcm_icrtab[i].dcm_data;
475 dcm->dcm_icrtab[i].dcm_data = 0;
476 code = dcm_modem[unit+i]->mdmin;
477 if (dcmsoftCAR[brd] & FLAG_STDDCE)
478 code = hp2dce_in(code);
479 mcnd[i] = code;
480 }
481 code = dcm->dcm_iir & IIR_MASK;
482 dcm->dcm_iir = 0; /* XXX doc claims read clears interrupt?! */
483 mcode = dcm->dcm_modemintr;
484 dcm->dcm_modemintr = 0;
485 SEM_UNLOCK(dcm);
486
487 #ifdef DEBUG
488 if (dcmdebug & DDB_INTR) {
489 printf("dcmintr(%d): iir %x pc %x/%x/%x/%x ",
490 brd, code, pcnd[0], pcnd[1], pcnd[2], pcnd[3]);
491 printf("miir %x mc %x/%x/%x/%x\n",
492 mcode, mcnd[0], mcnd[1], mcnd[2], mcnd[3]);
493 }
494 #endif
495 if (code & IIR_TIMEO)
496 dcmrint(brd, dcm);
497 if (code & IIR_PORT0)
498 dcmpint(unit+0, pcnd[0], dcm);
499 if (code & IIR_PORT1)
500 dcmpint(unit+1, pcnd[1], dcm);
501 if (code & IIR_PORT2)
502 dcmpint(unit+2, pcnd[2], dcm);
503 if (code & IIR_PORT3)
504 dcmpint(unit+3, pcnd[3], dcm);
505 if (code & IIR_MODM) {
506 if (mcode == 0 || mcode & 0x1) /* mcode==0 -> 98642 board */
507 dcmmint(unit+0, mcnd[0], dcm);
508 if (mcode & 0x2)
509 dcmmint(unit+1, mcnd[1], dcm);
510 if (mcode & 0x4)
511 dcmmint(unit+2, mcnd[2], dcm);
512 if (mcode & 0x8)
513 dcmmint(unit+3, mcnd[3], dcm);
514 }
515
516 dis = &dcmischeme[brd];
517 /*
518 * Chalk up a receiver interrupt if the timer running or one of
519 * the ports reports a special character interrupt.
520 */
521 if ((code & IIR_TIMEO) ||
522 ((pcnd[0]|pcnd[1]|pcnd[2]|pcnd[3]) & IT_SPEC))
523 dis->dis_intr++;
524 /*
525 * See if it is time to check/change the interrupt rate.
526 */
527 if (dcmistype < 0 &&
528 (i = time.tv_sec - dis->dis_time) >= dcminterval) {
529 /*
530 * If currently per-character and averaged over 70 interrupts
531 * per-second (66 is threshold of 600 baud) in last interval,
532 * switch to timer mode.
533 *
534 * XXX decay counts ala load average to avoid spikes?
535 */
536 if (dis->dis_perchar && dis->dis_intr > 70 * i)
537 dcmsetischeme(brd, DIS_TIMER);
538 /*
539 * If currently using timer and had more interrupts than
540 * received characters in the last interval, switch back
541 * to per-character. Note that after changing to per-char
542 * we must process any characters already in the queue
543 * since they may have arrived before the bitmap was setup.
544 *
545 * XXX decay counts?
546 */
547 else if (!dis->dis_perchar && dis->dis_intr > dis->dis_char) {
548 dcmsetischeme(brd, DIS_PERCHAR);
549 dcmrint(brd, dcm);
550 }
551 dis->dis_intr = dis->dis_char = 0;
552 dis->dis_time = time.tv_sec;
553 }
554 return (1);
555 }
556
557 /*
558 * Port interrupt. Can be two things:
559 * First, it might be a special character (exception interrupt);
560 * Second, it may be a buffer empty (transmit interrupt);
561 */
562 dcmpint(unit, code, dcm)
563 int unit, code;
564 struct dcmdevice *dcm;
565 {
566 struct tty *tp = dcm_tty[unit];
567
568 if (code & IT_SPEC)
569 dcmreadbuf(unit, dcm, tp);
570 if (code & IT_TX)
571 dcmxint(unit, dcm, tp);
572 }
573
574 dcmrint(brd, dcm)
575 int brd;
576 register struct dcmdevice *dcm;
577 {
578 register int i, unit;
579 register struct tty *tp;
580
581 unit = MKUNIT(brd, 0);
582 tp = dcm_tty[unit];
583 for (i = 0; i < 4; i++, tp++, unit++)
584 dcmreadbuf(unit, dcm, tp);
585 }
586
587 dcmreadbuf(unit, dcm, tp)
588 int unit;
589 register struct dcmdevice *dcm;
590 register struct tty *tp;
591 {
592 int port = PORT(unit);
593 register struct dcmpreg *pp = dcm_preg(dcm, port);
594 register struct dcmrfifo *fifo;
595 register int c, stat;
596 register unsigned head;
597 int nch = 0;
598 #ifdef DCMSTATS
599 struct dcmstats *dsp = &dcmstats[BOARD(unit)];
600
601 dsp->rints++;
602 #endif
603 if ((tp->t_state & TS_ISOPEN) == 0) {
604 #ifdef KGDB
605 if ((makedev(dcmmajor, unit) == kgdb_dev) &&
606 (head = pp->r_head & RX_MASK) != (pp->r_tail & RX_MASK) &&
607 dcm->dcm_rfifos[3-port][head>>1].data_char == FRAME_START) {
608 pp->r_head = (head + 2) & RX_MASK;
609 kgdb_connect(0); /* trap into kgdb */
610 return;
611 }
612 #endif /* KGDB */
613 pp->r_head = pp->r_tail & RX_MASK;
614 return;
615 }
616
617 head = pp->r_head & RX_MASK;
618 fifo = &dcm->dcm_rfifos[3-port][head>>1];
619 /*
620 * XXX upper bound on how many chars we will take in one swallow?
621 */
622 while (head != (pp->r_tail & RX_MASK)) {
623 /*
624 * Get character/status and update head pointer as fast
625 * as possible to make room for more characters.
626 */
627 c = fifo->data_char;
628 stat = fifo->data_stat;
629 head = (head + 2) & RX_MASK;
630 pp->r_head = head;
631 fifo = head ? fifo+1 : &dcm->dcm_rfifos[3-port][0];
632 nch++;
633
634 #ifdef DEBUG
635 if (dcmdebug & DDB_INPUT)
636 printf("dcmreadbuf(%d): c%x('%c') s%x f%x h%x t%x\n",
637 unit, c&0xFF, c, stat&0xFF,
638 tp->t_flags, head, pp->r_tail);
639 #endif
640 /*
641 * Check for and handle errors
642 */
643 if (stat & RD_MASK) {
644 #ifdef DEBUG
645 if (dcmdebug & (DDB_INPUT|DDB_SIOERR))
646 printf("dcmreadbuf(%d): err: c%x('%c') s%x\n",
647 unit, stat, c&0xFF, c);
648 #endif
649 if (stat & (RD_BD | RD_FE))
650 c |= TTY_FE;
651 else if (stat & RD_PE)
652 c |= TTY_PE;
653 else if (stat & RD_OVF)
654 log(LOG_WARNING,
655 "dcm%d: silo overflow\n", unit);
656 else if (stat & RD_OE)
657 log(LOG_WARNING,
658 "dcm%d: uart overflow\n", unit);
659 }
660 (*linesw[tp->t_line].l_rint)(c, tp);
661 }
662 dcmischeme[BOARD(unit)].dis_char += nch;
663 #ifdef DCMSTATS
664 dsp->rchars += nch;
665 if (nch <= DCMRBSIZE)
666 dsp->rsilo[nch]++;
667 else
668 dsp->rsilo[DCMRBSIZE+1]++;
669 #endif
670 }
671
672 dcmxint(unit, dcm, tp)
673 int unit;
674 struct dcmdevice *dcm;
675 register struct tty *tp;
676 {
677 tp->t_state &= ~TS_BUSY;
678 if (tp->t_state & TS_FLUSH)
679 tp->t_state &= ~TS_FLUSH;
680 (*linesw[tp->t_line].l_start)(tp);
681 }
682
683 dcmmint(unit, mcnd, dcm)
684 register int unit;
685 register struct dcmdevice *dcm;
686 int mcnd;
687 {
688 register struct tty *tp;
689 int delta;
690
691 #ifdef DEBUG
692 if (dcmdebug & DDB_MODEM)
693 printf("dcmmint: port %d mcnd %x mcndlast %x\n",
694 unit, mcnd, mcndlast[unit]);
695 #endif
696 tp = dcm_tty[unit];
697 delta = mcnd ^ mcndlast[unit];
698 mcndlast[unit] = mcnd;
699 if ((delta & MI_CTS) && (tp->t_state & TS_ISOPEN) &&
700 (tp->t_flags & CCTS_OFLOW)) {
701 if (mcnd & MI_CTS) {
702 tp->t_state &= ~TS_TTSTOP;
703 ttstart(tp);
704 } else
705 tp->t_state |= TS_TTSTOP; /* inline dcmstop */
706 }
707 if (delta & MI_CD) {
708 if (mcnd & MI_CD)
709 (void)(*linesw[tp->t_line].l_modem)(tp, 1);
710 else if ((dcmsoftCAR[BOARD(unit)] & (1 << PORT(unit))) == 0 &&
711 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) {
712 dcm_modem[unit]->mdmout = MO_OFF;
713 SEM_LOCK(dcm);
714 dcm->dcm_modemchng |= 1<<(unit & 3);
715 dcm->dcm_cr |= CR_MODM;
716 SEM_UNLOCK(dcm);
717 DELAY(10); /* time to change lines */
718 }
719 }
720 }
721
722 dcmioctl(dev, cmd, data, flag, p)
723 dev_t dev;
724 int cmd;
725 caddr_t data;
726 int flag;
727 struct proc *p;
728 {
729 register struct tty *tp;
730 register int unit = UNIT(dev);
731 register struct dcmdevice *dcm;
732 register int port;
733 int error, s;
734
735 #ifdef DEBUG
736 if (dcmdebug & DDB_IOCTL)
737 printf("dcmioctl: unit %d cmd %x data %x flag %x\n",
738 unit, cmd, *data, flag);
739 #endif
740 tp = dcm_tty[unit];
741 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
742 if (error >= 0)
743 return (error);
744 error = ttioctl(tp, cmd, data, flag, p);
745 if (error >= 0)
746 return (error);
747
748 port = PORT(unit);
749 dcm = dcm_addr[BOARD(unit)];
750 switch (cmd) {
751 case TIOCSBRK:
752 /*
753 * Wait for transmitter buffer to empty
754 */
755 s = spltty();
756 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
757 DELAY(DCM_USPERCH(tp->t_ospeed));
758 SEM_LOCK(dcm);
759 dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
760 dcm->dcm_cr |= (1 << port); /* start break */
761 SEM_UNLOCK(dcm);
762 splx(s);
763 break;
764
765 case TIOCCBRK:
766 SEM_LOCK(dcm);
767 dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
768 dcm->dcm_cr |= (1 << port); /* end break */
769 SEM_UNLOCK(dcm);
770 break;
771
772 case TIOCSDTR:
773 (void) dcmmctl(dev, MO_ON, DMBIS);
774 break;
775
776 case TIOCCDTR:
777 (void) dcmmctl(dev, MO_ON, DMBIC);
778 break;
779
780 case TIOCMSET:
781 (void) dcmmctl(dev, *(int *)data, DMSET);
782 break;
783
784 case TIOCMBIS:
785 (void) dcmmctl(dev, *(int *)data, DMBIS);
786 break;
787
788 case TIOCMBIC:
789 (void) dcmmctl(dev, *(int *)data, DMBIC);
790 break;
791
792 case TIOCMGET:
793 *(int *)data = dcmmctl(dev, 0, DMGET);
794 break;
795
796 default:
797 return (ENOTTY);
798 }
799 return (0);
800 }
801
802 dcmparam(tp, t)
803 register struct tty *tp;
804 register struct termios *t;
805 {
806 register struct dcmdevice *dcm;
807 register int port, mode, cflag = t->c_cflag;
808 int ospeed = ttspeedtab(t->c_ospeed, dcmspeedtab);
809
810 /* check requested parameters */
811 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
812 return (EINVAL);
813 /* and copy to tty */
814 tp->t_ispeed = t->c_ispeed;
815 tp->t_ospeed = t->c_ospeed;
816 tp->t_cflag = cflag;
817 if (ospeed == 0) {
818 (void) dcmmctl(UNIT(tp->t_dev), MO_OFF, DMSET);
819 return (0);
820 }
821
822 mode = 0;
823 switch (cflag&CSIZE) {
824 case CS5:
825 mode = LC_5BITS; break;
826 case CS6:
827 mode = LC_6BITS; break;
828 case CS7:
829 mode = LC_7BITS; break;
830 case CS8:
831 mode = LC_8BITS; break;
832 }
833 if (cflag&PARENB) {
834 if (cflag&PARODD)
835 mode |= LC_PODD;
836 else
837 mode |= LC_PEVEN;
838 }
839 if (cflag&CSTOPB)
840 mode |= LC_2STOP;
841 else
842 mode |= LC_1STOP;
843 #ifdef DEBUG
844 if (dcmdebug & DDB_PARAM)
845 printf("dcmparam(%d): cflag %x mode %x speed %d uperch %d\n",
846 UNIT(tp->t_dev), cflag, mode, tp->t_ospeed,
847 DCM_USPERCH(tp->t_ospeed));
848 #endif
849
850 port = PORT(tp->t_dev);
851 dcm = dcm_addr[BOARD(tp->t_dev)];
852 /*
853 * Wait for transmitter buffer to empty.
854 */
855 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
856 DELAY(DCM_USPERCH(tp->t_ospeed));
857 /*
858 * Make changes known to hardware.
859 */
860 dcm->dcm_data[port].dcm_baud = ospeed;
861 dcm->dcm_data[port].dcm_conf = mode;
862 SEM_LOCK(dcm);
863 dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
864 dcm->dcm_cr |= (1 << port);
865 SEM_UNLOCK(dcm);
866 /*
867 * Delay for config change to take place. Weighted by baud.
868 * XXX why do we do this?
869 */
870 DELAY(16 * DCM_USPERCH(tp->t_ospeed));
871 return (0);
872 }
873
874 void
875 dcmstart(tp)
876 register struct tty *tp;
877 {
878 register struct dcmdevice *dcm;
879 register struct dcmpreg *pp;
880 register struct dcmtfifo *fifo;
881 register char *bp;
882 register unsigned tail, next;
883 register int port, nch;
884 unsigned head;
885 char buf[16];
886 int s;
887 #ifdef DCMSTATS
888 struct dcmstats *dsp = &dcmstats[BOARD(tp->t_dev)];
889 int tch = 0;
890 #endif
891
892 s = spltty();
893 #ifdef DCMSTATS
894 dsp->xints++;
895 #endif
896 #ifdef DEBUG
897 if (dcmdebug & DDB_OUTPUT)
898 printf("dcmstart(%d): state %x flags %x outcc %d\n",
899 UNIT(tp->t_dev), tp->t_state, tp->t_flags,
900 tp->t_outq.c_cc);
901 #endif
902 if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
903 goto out;
904 if (tp->t_outq.c_cc <= tp->t_lowat) {
905 if (tp->t_state&TS_ASLEEP) {
906 tp->t_state &= ~TS_ASLEEP;
907 wakeup((caddr_t)&tp->t_outq);
908 }
909 selwakeup(&tp->t_wsel);
910 }
911 if (tp->t_outq.c_cc == 0) {
912 #ifdef DCMSTATS
913 dsp->xempty++;
914 #endif
915 goto out;
916 }
917
918 dcm = dcm_addr[BOARD(tp->t_dev)];
919 port = PORT(tp->t_dev);
920 pp = dcm_preg(dcm, port);
921 tail = pp->t_tail & TX_MASK;
922 next = (tail + 1) & TX_MASK;
923 head = pp->t_head & TX_MASK;
924 if (head == next)
925 goto out;
926 fifo = &dcm->dcm_tfifos[3-port][tail];
927 again:
928 nch = q_to_b(&tp->t_outq, buf, (head - next) & TX_MASK);
929 #ifdef DCMSTATS
930 tch += nch;
931 #endif
932 #ifdef DEBUG
933 if (dcmdebug & DDB_OUTPUT)
934 printf("\thead %x tail %x nch %d\n", head, tail, nch);
935 #endif
936 /*
937 * Loop transmitting all the characters we can.
938 */
939 for (bp = buf; --nch >= 0; bp++) {
940 fifo->data_char = *bp;
941 pp->t_tail = next;
942 /*
943 * If this is the first character,
944 * get the hardware moving right now.
945 */
946 if (bp == buf) {
947 tp->t_state |= TS_BUSY;
948 SEM_LOCK(dcm);
949 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
950 dcm->dcm_cr |= (1 << port);
951 SEM_UNLOCK(dcm);
952 }
953 tail = next;
954 fifo = tail ? fifo+1 : &dcm->dcm_tfifos[3-port][0];
955 next = (next + 1) & TX_MASK;
956 }
957 /*
958 * Head changed while we were loading the buffer,
959 * go back and load some more if we can.
960 */
961 if (tp->t_outq.c_cc && head != (pp->t_head & TX_MASK)) {
962 #ifdef DCMSTATS
963 dsp->xrestarts++;
964 #endif
965 head = pp->t_head & TX_MASK;
966 goto again;
967 }
968
969 /*
970 * Kick it one last time in case it finished while we were
971 * loading the last bunch.
972 */
973 if (bp > &buf[1]) {
974 tp->t_state |= TS_BUSY;
975 SEM_LOCK(dcm);
976 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
977 dcm->dcm_cr |= (1 << port);
978 SEM_UNLOCK(dcm);
979 }
980 #ifdef DEBUG
981 if (dcmdebug & DDB_INTR)
982 printf("dcmstart(%d): head %x tail %x outqcc %d\n",
983 UNIT(tp->t_dev), head, tail, tp->t_outq.c_cc);
984 #endif
985 out:
986 #ifdef DCMSTATS
987 dsp->xchars += tch;
988 if (tch <= DCMXBSIZE)
989 dsp->xsilo[tch]++;
990 else
991 dsp->xsilo[DCMXBSIZE+1]++;
992 #endif
993 splx(s);
994 }
995
996 /*
997 * Stop output on a line.
998 */
999 dcmstop(tp, flag)
1000 register struct tty *tp;
1001 int flag;
1002 {
1003 int s;
1004
1005 s = spltty();
1006 if (tp->t_state & TS_BUSY) {
1007 /* XXX is there some way to safely stop transmission? */
1008 if ((tp->t_state&TS_TTSTOP) == 0)
1009 tp->t_state |= TS_FLUSH;
1010 }
1011 splx(s);
1012 }
1013
1014 /*
1015 * Modem control
1016 */
1017 dcmmctl(dev, bits, how)
1018 dev_t dev;
1019 int bits, how;
1020 {
1021 register struct dcmdevice *dcm;
1022 int s, unit, brd, hit = 0;
1023
1024 unit = UNIT(dev);
1025 #ifdef DEBUG
1026 if (dcmdebug & DDB_MODEM)
1027 printf("dcmmctl(%d) unit %d bits 0x%x how %x\n",
1028 BOARD(unit), unit, bits, how);
1029 #endif
1030
1031 brd = BOARD(unit);
1032 dcm = dcm_addr[brd];
1033 s = spltty();
1034 switch (how) {
1035
1036 case DMSET:
1037 dcm_modem[unit]->mdmout = bits;
1038 hit++;
1039 break;
1040
1041 case DMBIS:
1042 dcm_modem[unit]->mdmout |= bits;
1043 hit++;
1044 break;
1045
1046 case DMBIC:
1047 dcm_modem[unit]->mdmout &= ~bits;
1048 hit++;
1049 break;
1050
1051 case DMGET:
1052 bits = dcm_modem[unit]->mdmin;
1053 if (dcmsoftCAR[brd] & FLAG_STDDCE)
1054 bits = hp2dce_in(bits);
1055 break;
1056 }
1057 if (hit) {
1058 SEM_LOCK(dcm);
1059 dcm->dcm_modemchng |= 1<<(unit & 3);
1060 dcm->dcm_cr |= CR_MODM;
1061 SEM_UNLOCK(dcm);
1062 DELAY(10); /* delay until done */
1063 (void) splx(s);
1064 }
1065 return (bits);
1066 }
1067
1068 /*
1069 * Set board to either interrupt per-character or at a fixed interval.
1070 */
1071 dcmsetischeme(brd, flags)
1072 int brd, flags;
1073 {
1074 register struct dcmdevice *dcm = dcm_addr[brd];
1075 register struct dcmischeme *dis = &dcmischeme[brd];
1076 register int i;
1077 u_char mask;
1078 int perchar = flags & DIS_PERCHAR;
1079
1080 #ifdef DEBUG
1081 if (dcmdebug & DDB_INTSCHM)
1082 printf("dcmsetischeme(%d, %d): cur %d, ints %d, chars %d\n",
1083 brd, perchar, dis->dis_perchar,
1084 dis->dis_intr, dis->dis_char);
1085 if ((flags & DIS_RESET) == 0 && perchar == dis->dis_perchar) {
1086 printf("dcmsetischeme(%d): redundent request %d\n",
1087 brd, perchar);
1088 return;
1089 }
1090 #endif
1091 /*
1092 * If perchar is non-zero, we enable interrupts on all characters
1093 * otherwise we disable perchar interrupts and use periodic
1094 * polling interrupts.
1095 */
1096 dis->dis_perchar = perchar;
1097 mask = perchar ? 0xf : 0x0;
1098 for (i = 0; i < 256; i++)
1099 dcm->dcm_bmap[i].data_data = mask;
1100 /*
1101 * Don't slow down tandem mode, interrupt on flow control
1102 * chars for any port on the board.
1103 */
1104 if (!perchar) {
1105 register struct tty *tp = dcm_tty[MKUNIT(brd, 0)];
1106 int c;
1107
1108 for (i = 0; i < 4; i++, tp++) {
1109 if ((c = tp->t_cc[VSTART]) != _POSIX_VDISABLE)
1110 dcm->dcm_bmap[c].data_data |= (1 << i);
1111 if ((c = tp->t_cc[VSTOP]) != _POSIX_VDISABLE)
1112 dcm->dcm_bmap[c].data_data |= (1 << i);
1113 }
1114 }
1115 /*
1116 * Board starts with timer disabled so if first call is to
1117 * set perchar mode then we don't want to toggle the timer.
1118 */
1119 if (flags == (DIS_RESET|DIS_PERCHAR))
1120 return;
1121 /*
1122 * Toggle card 16.7ms interrupts (we first make sure that card
1123 * has cleared the bit so it will see the toggle).
1124 */
1125 while (dcm->dcm_cr & CR_TIMER)
1126 ;
1127 SEM_LOCK(dcm);
1128 dcm->dcm_cr |= CR_TIMER;
1129 SEM_UNLOCK(dcm);
1130 }
1131
1132 /*
1133 * Following are all routines needed for DCM to act as console
1134 */
1135 #include <dev/cons.h>
1136
1137 dcmcnprobe(cp)
1138 struct consdev *cp;
1139 {
1140 register struct hp_hw *hw;
1141 int unit;
1142
1143 /* locate the major number */
1144 for (dcmmajor = 0; dcmmajor < nchrdev; dcmmajor++)
1145 if (cdevsw[dcmmajor].d_open == dcmopen)
1146 break;
1147
1148 /*
1149 * Implicitly assigns the lowest select code DCM card found to be
1150 * logical unit 0 (actually CONUNIT). If your config file does
1151 * anything different, you're screwed.
1152 */
1153 for (hw = sc_table; hw->hw_type; hw++)
1154 if (HW_ISDEV(hw, D_COMMDCM) && !badaddr((short *)hw->hw_kva))
1155 break;
1156 if (!HW_ISDEV(hw, D_COMMDCM)) {
1157 cp->cn_pri = CN_DEAD;
1158 return;
1159 }
1160 unit = CONUNIT;
1161 dcm_addr[BOARD(CONUNIT)] = (struct dcmdevice *)hw->hw_kva;
1162
1163 /* initialize required fields */
1164 cp->cn_dev = makedev(dcmmajor, unit);
1165 switch (dcm_addr[BOARD(unit)]->dcm_rsid) {
1166 case DCMID:
1167 cp->cn_pri = CN_NORMAL;
1168 break;
1169 case DCMID|DCMCON:
1170 cp->cn_pri = CN_REMOTE;
1171 break;
1172 default:
1173 cp->cn_pri = CN_DEAD;
1174 return;
1175 }
1176 /*
1177 * If dcmconsole is initialized, raise our priority.
1178 */
1179 if (dcmconsole == UNIT(unit))
1180 cp->cn_pri = CN_REMOTE;
1181 #ifdef KGDB_CHEAT
1182 /*
1183 * This doesn't currently work, at least not with ite consoles;
1184 * the console hasn't been initialized yet.
1185 */
1186 if (major(kgdb_dev) == dcmmajor && BOARD(kgdb_dev) == BOARD(unit)) {
1187 (void) dcminit(kgdb_dev, kgdb_rate);
1188 if (kgdb_debug_init) {
1189 /*
1190 * We assume that console is ready for us...
1191 * this assumes that a dca or ite console
1192 * has been selected already and will init
1193 * on the first putc.
1194 */
1195 printf("dcm%d: ", UNIT(kgdb_dev));
1196 kgdb_connect(1);
1197 }
1198 }
1199 #endif
1200 }
1201
1202 dcmcninit(cp)
1203 struct consdev *cp;
1204 {
1205 dcminit(cp->cn_dev, dcmdefaultrate);
1206 dcmconsinit = 1;
1207 dcmconsole = UNIT(cp->cn_dev);
1208 }
1209
1210 dcminit(dev, rate)
1211 dev_t dev;
1212 int rate;
1213 {
1214 register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
1215 int s, mode, port;
1216
1217 port = PORT(dev);
1218 mode = LC_8BITS | LC_1STOP;
1219 s = splhigh();
1220 /*
1221 * Wait for transmitter buffer to empty.
1222 */
1223 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
1224 DELAY(DCM_USPERCH(rate));
1225 /*
1226 * Make changes known to hardware.
1227 */
1228 dcm->dcm_data[port].dcm_baud = ttspeedtab(rate, dcmspeedtab);
1229 dcm->dcm_data[port].dcm_conf = mode;
1230 SEM_LOCK(dcm);
1231 dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
1232 dcm->dcm_cr |= (1 << port);
1233 SEM_UNLOCK(dcm);
1234 /*
1235 * Delay for config change to take place. Weighted by baud.
1236 * XXX why do we do this?
1237 */
1238 DELAY(16 * DCM_USPERCH(rate));
1239 splx(s);
1240 }
1241
1242 dcmcngetc(dev)
1243 dev_t dev;
1244 {
1245 register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
1246 register struct dcmrfifo *fifo;
1247 register struct dcmpreg *pp;
1248 register unsigned head;
1249 int s, c, stat, port;
1250
1251 port = PORT(dev);
1252 pp = dcm_preg(dcm, port);
1253 s = splhigh();
1254 head = pp->r_head & RX_MASK;
1255 fifo = &dcm->dcm_rfifos[3-port][head>>1];
1256 while (head == (pp->r_tail & RX_MASK))
1257 ;
1258 /*
1259 * If board interrupts are enabled, just let our received char
1260 * interrupt through in case some other port on the board was
1261 * busy. Otherwise we must clear the interrupt.
1262 */
1263 SEM_LOCK(dcm);
1264 if ((dcm->dcm_ic & IC_IE) == 0)
1265 stat = dcm->dcm_iir;
1266 SEM_UNLOCK(dcm);
1267 c = fifo->data_char;
1268 stat = fifo->data_stat;
1269 pp->r_head = (head + 2) & RX_MASK;
1270 splx(s);
1271 return (c);
1272 }
1273
1274 /*
1275 * Console kernel output character routine.
1276 */
1277 dcmcnputc(dev, c)
1278 dev_t dev;
1279 int c;
1280 {
1281 register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
1282 register struct dcmpreg *pp;
1283 unsigned tail;
1284 int s, port, stat;
1285
1286 port = PORT(dev);
1287 pp = dcm_preg(dcm, port);
1288 s = splhigh();
1289 #ifdef KGDB
1290 if (dev != kgdb_dev)
1291 #endif
1292 if (dcmconsinit == 0) {
1293 (void) dcminit(dev, dcmdefaultrate);
1294 dcmconsinit = 1;
1295 }
1296 tail = pp->t_tail & TX_MASK;
1297 while (tail != (pp->t_head & TX_MASK))
1298 ;
1299 dcm->dcm_tfifos[3-port][tail].data_char = c;
1300 pp->t_tail = tail = (tail + 1) & TX_MASK;
1301 SEM_LOCK(dcm);
1302 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
1303 dcm->dcm_cr |= (1 << port);
1304 SEM_UNLOCK(dcm);
1305 while (tail != (pp->t_head & TX_MASK))
1306 ;
1307 /*
1308 * If board interrupts are enabled, just let our completion
1309 * interrupt through in case some other port on the board
1310 * was busy. Otherwise we must clear the interrupt.
1311 */
1312 if ((dcm->dcm_ic & IC_IE) == 0) {
1313 SEM_LOCK(dcm);
1314 stat = dcm->dcm_iir;
1315 SEM_UNLOCK(dcm);
1316 }
1317 splx(s);
1318 }
1319 #endif
1320