dcm.c revision 1.17 1 /* $NetBSD: dcm.c,v 1.17 1995/04/19 19:15:49 mycroft Exp $ */
2
3 /*
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1982, 1986, 1990, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the University of
23 * California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 * from Utah: $Hdr: dcm.c 1.29 92/01/21$
41 *
42 * @(#)dcm.c 8.4 (Berkeley) 1/12/94
43 */
44
45 /*
46 * TODO:
47 * Timeouts
48 * Test console support.
49 */
50
51 #include "dcm.h"
52 #if NDCM > 0
53 /*
54 * 98642/MUX
55 */
56 #include <sys/param.h>
57 #include <sys/systm.h>
58 #include <sys/ioctl.h>
59 #include <sys/proc.h>
60 #include <sys/tty.h>
61 #include <sys/conf.h>
62 #include <sys/file.h>
63 #include <sys/uio.h>
64 #include <sys/kernel.h>
65 #include <sys/syslog.h>
66 #include <sys/time.h>
67
68 #include <machine/cpu.h>
69
70 #include <hp300/dev/device.h>
71 #include <hp300/dev/dcmreg.h>
72 #include <hp300/hp300/isr.h>
73
74 #ifndef DEFAULT_BAUD_RATE
75 #define DEFAULT_BAUD_RATE 9600
76 #endif
77
78 int dcmprobe(), dcmintr(), dcmparam();
79 void dcmstart();
80 struct driver dcmdriver = {
81 dcmprobe, "dcm",
82 };
83
84 #define NDCMLINE (NDCM*4)
85
86 struct tty *dcm_tty[NDCMLINE];
87 struct modemreg *dcm_modem[NDCMLINE];
88 char mcndlast[NDCMLINE]; /* XXX last modem status for line */
89 int ndcm = NDCMLINE;
90
91 int dcm_active;
92 int dcmsoftCAR[NDCM];
93 struct dcmdevice *dcm_addr[NDCM];
94 struct isr dcmisr[NDCM];
95
96 struct speedtab dcmspeedtab[] = {
97 0, BR_0,
98 50, BR_50,
99 75, BR_75,
100 110, BR_110,
101 134, BR_134,
102 150, BR_150,
103 300, BR_300,
104 600, BR_600,
105 1200, BR_1200,
106 1800, BR_1800,
107 2400, BR_2400,
108 4800, BR_4800,
109 9600, BR_9600,
110 19200, BR_19200,
111 38400, BR_38400,
112 -1, -1
113 };
114
115 /* u-sec per character based on baudrate (assumes 1 start/8 data/1 stop bit) */
116 #define DCM_USPERCH(s) (10000000 / (s))
117
118 /*
119 * Per board interrupt scheme. 16.7ms is the polling interrupt rate
120 * (16.7ms is about 550 baud, 38.4k is 72 chars in 16.7ms).
121 */
122 #define DIS_TIMER 0
123 #define DIS_PERCHAR 1
124 #define DIS_RESET 2
125
126 int dcmistype = -1; /* -1 == dynamic, 0 == timer, 1 == perchar */
127 int dcminterval = 5; /* interval (secs) between checks */
128 struct dcmischeme {
129 int dis_perchar; /* non-zero if interrupting per char */
130 long dis_time; /* last time examined */
131 int dis_intr; /* recv interrupts during last interval */
132 int dis_char; /* characters read during last interval */
133 } dcmischeme[NDCM];
134
135 /*
136 * Console support
137 */
138 #ifdef DCMCONSOLE
139 int dcmconsole = DCMCONSOLE;
140 #else
141 int dcmconsole = -1;
142 #endif
143 int dcmconsinit;
144 int dcmdefaultrate = DEFAULT_BAUD_RATE;
145 int dcmconbrdbusy = 0;
146 int dcmmajor;
147
148 #ifdef KGDB
149 /*
150 * Kernel GDB support
151 */
152 #include <machine/remote-sl.h>
153
154 extern dev_t kgdb_dev;
155 extern int kgdb_rate;
156 extern int kgdb_debug_init;
157 #endif
158
159 /* #define DCMSTATS */
160
161 #ifdef DEBUG
162 int dcmdebug = 0x0;
163 #define DDB_SIOERR 0x01
164 #define DDB_PARAM 0x02
165 #define DDB_INPUT 0x04
166 #define DDB_OUTPUT 0x08
167 #define DDB_INTR 0x10
168 #define DDB_IOCTL 0x20
169 #define DDB_INTSCHM 0x40
170 #define DDB_MODEM 0x80
171 #define DDB_OPENCLOSE 0x100
172 #endif
173
174 #ifdef DCMSTATS
175 #define DCMRBSIZE 94
176 #define DCMXBSIZE 24
177
178 struct dcmstats {
179 long xints; /* # of xmit ints */
180 long xchars; /* # of xmit chars */
181 long xempty; /* times outq is empty in dcmstart */
182 long xrestarts; /* times completed while xmitting */
183 long rints; /* # of recv ints */
184 long rchars; /* # of recv chars */
185 long xsilo[DCMXBSIZE+2]; /* times this many chars xmit on one int */
186 long rsilo[DCMRBSIZE+2]; /* times this many chars read on one int */
187 } dcmstats[NDCM];
188 #endif
189
190 #define UNIT(x) minor(x)
191 #define BOARD(x) (((x) >> 2) & 0x3f)
192 #define PORT(x) ((x) & 3)
193 #define MKUNIT(b,p) (((b) << 2) | (p))
194
195 /*
196 * Conversion from "HP DCE" to almost-normal DCE: on the 638 8-port mux,
197 * the distribution panel uses "HP DCE" conventions. If requested via
198 * the device flags, we swap the inputs to something closer to normal DCE,
199 * allowing a straight-through cable to a DTE or a reversed cable
200 * to a DCE (reversing 2-3, 4-5, 8-20 and leaving 6 unconnected;
201 * this gets "DCD" on pin 20 and "CTS" on 4, but doesn't connect
202 * DSR or make RTS work, though). The following gives the full
203 * details of a cable from this mux panel to a modem:
204 *
205 * HP modem
206 * name pin pin name
207 * HP inputs:
208 * "Rx" 2 3 Tx
209 * CTS 4 5 CTS (only needed for CCTS_OFLOW)
210 * DCD 20 8 DCD
211 * "DSR" 9 6 DSR (unneeded)
212 * RI 22 22 RI (unneeded)
213 *
214 * HP outputs:
215 * "Tx" 3 2 Rx
216 * "DTR" 6 not connected
217 * "RTS" 8 20 DTR
218 * "SR" 23 4 RTS (often not needed)
219 */
220 #define FLAG_STDDCE 0x10 /* map inputs if this bit is set in flags */
221 #define hp2dce_in(ibits) (iconv[(ibits) & 0xf])
222 static char iconv[16] = {
223 0, MI_DM, MI_CTS, MI_CTS|MI_DM,
224 MI_CD, MI_CD|MI_DM, MI_CD|MI_CTS, MI_CD|MI_CTS|MI_DM,
225 MI_RI, MI_RI|MI_DM, MI_RI|MI_CTS, MI_RI|MI_CTS|MI_DM,
226 MI_RI|MI_CD, MI_RI|MI_CD|MI_DM, MI_RI|MI_CD|MI_CTS,
227 MI_RI|MI_CD|MI_CTS|MI_DM
228 };
229
230 dcmprobe(hd)
231 register struct hp_device *hd;
232 {
233 register struct dcmdevice *dcm;
234 register int i;
235 register int timo = 0;
236 int s, brd, isconsole, mbits;
237
238 dcm = (struct dcmdevice *)hd->hp_addr;
239 if ((dcm->dcm_rsid & 0x1f) != DCMID)
240 return (0);
241 brd = hd->hp_unit;
242 isconsole = (brd == BOARD(dcmconsole));
243 /*
244 * XXX selected console device (CONSUNIT) as determined by
245 * dcmcnprobe does not agree with logical numbering imposed
246 * by the config file (i.e. lowest address DCM is not unit
247 * CONSUNIT). Don't recognize this card.
248 */
249 if (isconsole && dcm != dcm_addr[BOARD(dcmconsole)])
250 return (0);
251
252 /*
253 * Empirically derived self-test magic
254 */
255 s = spltty();
256 dcm->dcm_rsid = DCMRS;
257 DELAY(50000); /* 5000 is not long enough */
258 dcm->dcm_rsid = 0;
259 dcm->dcm_ic = IC_IE;
260 dcm->dcm_cr = CR_SELFT;
261 while ((dcm->dcm_ic & IC_IR) == 0)
262 if (++timo == 20000)
263 return (0);
264 DELAY(50000) /* XXX why is this needed ???? */
265 while ((dcm->dcm_iir & IIR_SELFT) == 0)
266 if (++timo == 400000)
267 return (0);
268 DELAY(50000) /* XXX why is this needed ???? */
269 if (dcm->dcm_stcon != ST_OK) {
270 if (!isconsole)
271 printf("dcm%d: self test failed: %x\n",
272 brd, dcm->dcm_stcon);
273 return (0);
274 }
275 dcm->dcm_ic = IC_ID;
276 splx(s);
277
278 hd->hp_ipl = DCMIPL(dcm->dcm_ic);
279 dcm_addr[brd] = dcm;
280 dcm_active |= 1 << brd;
281 dcmsoftCAR[brd] = hd->hp_flags;
282 dcmisr[brd].isr_ipl = hd->hp_ipl;
283 dcmisr[brd].isr_arg = brd;
284 dcmisr[brd].isr_intr = dcmintr;
285 isrlink(&dcmisr[brd]);
286 #ifdef KGDB
287 if (major(kgdb_dev) == dcmmajor && BOARD(kgdb_dev) == brd) {
288 if (dcmconsole == UNIT(kgdb_dev))
289 kgdb_dev = NODEV; /* can't debug over console port */
290 #ifndef KGDB_CHEAT
291 /*
292 * The following could potentially be replaced
293 * by the corresponding code in dcmcnprobe.
294 */
295 else {
296 (void) dcminit(kgdb_dev, kgdb_rate);
297 if (kgdb_debug_init) {
298 printf("dcm%d: ", UNIT(kgdb_dev));
299 kgdb_connect(1);
300 } else
301 printf("dcm%d: kgdb enabled\n", UNIT(kgdb_dev));
302 }
303 /* end could be replaced */
304 #endif
305 }
306 #endif
307 if (dcmistype == DIS_TIMER)
308 dcmsetischeme(brd, DIS_RESET|DIS_TIMER);
309 else
310 dcmsetischeme(brd, DIS_RESET|DIS_PERCHAR);
311
312 /* load pointers to modem control */
313 dcm_modem[MKUNIT(brd, 0)] = &dcm->dcm_modem0;
314 dcm_modem[MKUNIT(brd, 1)] = &dcm->dcm_modem1;
315 dcm_modem[MKUNIT(brd, 2)] = &dcm->dcm_modem2;
316 dcm_modem[MKUNIT(brd, 3)] = &dcm->dcm_modem3;
317 /* set DCD (modem) and CTS (flow control) on all ports */
318 if (dcmsoftCAR[brd] & FLAG_STDDCE)
319 mbits = hp2dce_in(MI_CD|MI_CTS);
320 else
321 mbits = MI_CD|MI_CTS;
322 for (i = 0; i < 4; i++)
323 dcm_modem[MKUNIT(brd, i)]->mdmmsk = mbits;
324
325 dcm->dcm_ic = IC_IE; /* turn all interrupts on */
326 /*
327 * Need to reset baud rate, etc. of next print so reset dcmconsole.
328 * Also make sure console is always "hardwired"
329 */
330 if (isconsole) {
331 dcmconsinit = 0;
332 dcmsoftCAR[brd] |= (1 << PORT(dcmconsole));
333 }
334 return (1);
335 }
336
337 /* ARGSUSED */
338 int
339 dcmopen(dev, flag, mode, p)
340 dev_t dev;
341 int flag, mode;
342 struct proc *p;
343 {
344 register struct tty *tp;
345 register int unit, brd;
346 int error = 0, mbits;
347
348 unit = UNIT(dev);
349 brd = BOARD(unit);
350 if (unit >= NDCMLINE || (dcm_active & (1 << brd)) == 0)
351 return (ENXIO);
352 if (!dcm_tty[unit])
353 tp = dcm_tty[unit] = ttymalloc();
354 else
355 tp = dcm_tty[unit];
356 tp->t_oproc = dcmstart;
357 tp->t_param = dcmparam;
358 tp->t_dev = dev;
359 if ((tp->t_state & TS_ISOPEN) == 0) {
360 tp->t_state |= TS_WOPEN;
361 ttychars(tp);
362 if (tp->t_ispeed == 0) {
363 tp->t_iflag = TTYDEF_IFLAG;
364 tp->t_oflag = TTYDEF_OFLAG;
365 tp->t_cflag = TTYDEF_CFLAG;
366 tp->t_lflag = TTYDEF_LFLAG;
367 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
368 }
369 (void) dcmparam(tp, &tp->t_termios);
370 ttsetwater(tp);
371 } else if (tp->t_state&TS_XCLUDE && p->p_ucred->cr_uid != 0)
372 return (EBUSY);
373 mbits = MO_ON;
374 if (dcmsoftCAR[brd] & FLAG_STDDCE)
375 mbits |= MO_SR; /* pin 23, could be used as RTS */
376 (void) dcmmctl(dev, mbits, DMSET); /* enable port */
377 if ((dcmsoftCAR[brd] & (1 << PORT(unit))) ||
378 (dcmmctl(dev, MO_OFF, DMGET) & MI_CD))
379 tp->t_state |= TS_CARR_ON;
380 #ifdef DEBUG
381 if (dcmdebug & DDB_MODEM)
382 printf("dcm%d: dcmopen port %d softcarr %c\n",
383 brd, unit, (tp->t_state & TS_CARR_ON) ? '1' : '0');
384 #endif
385 (void) spltty();
386 while ((flag&O_NONBLOCK) == 0 && (tp->t_cflag&CLOCAL) == 0 &&
387 (tp->t_state & TS_CARR_ON) == 0) {
388 tp->t_state |= TS_WOPEN;
389 if (error = ttysleep(tp, (caddr_t)&tp->t_rawq, TTIPRI | PCATCH,
390 ttopen, 0))
391 break;
392 }
393 (void) spl0();
394
395 #ifdef DEBUG
396 if (dcmdebug & DDB_OPENCLOSE)
397 printf("dcmopen: u %x st %x fl %x\n",
398 unit, tp->t_state, tp->t_flags);
399 #endif
400 if (error == 0)
401 error = (*linesw[tp->t_line].l_open)(dev, tp);
402 return (error);
403 }
404
405 /*ARGSUSED*/
406 int
407 dcmclose(dev, flag, mode, p)
408 dev_t dev;
409 int flag, mode;
410 struct proc *p;
411 {
412 register struct tty *tp;
413 int unit;
414
415 unit = UNIT(dev);
416 tp = dcm_tty[unit];
417 (*linesw[tp->t_line].l_close)(tp, flag);
418 if (tp->t_cflag&HUPCL || tp->t_state&TS_WOPEN ||
419 (tp->t_state&TS_ISOPEN) == 0)
420 (void) dcmmctl(dev, MO_OFF, DMSET);
421 #ifdef DEBUG
422 if (dcmdebug & DDB_OPENCLOSE)
423 printf("dcmclose: u %x st %x fl %x\n",
424 unit, tp->t_state, tp->t_flags);
425 #endif
426 ttyclose(tp);
427 #if 0
428 ttyfree(tp);
429 dcm_tty[unit] = (struct tty *)0;
430 #endif
431 return (0);
432 }
433
434 int
435 dcmread(dev, uio, flag)
436 dev_t dev;
437 struct uio *uio;
438 int flag;
439 {
440 register struct tty *tp = dcm_tty[UNIT(dev)];
441
442 return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
443 }
444
445 int
446 dcmwrite(dev, uio, flag)
447 dev_t dev;
448 struct uio *uio;
449 int flag;
450 {
451 register struct tty *tp = dcm_tty[UNIT(dev)];
452
453 return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
454 }
455
456 struct tty *
457 dcmtty(dev)
458 dev_t dev;
459 {
460
461 return (dcm_tty[UNIT(dev)]);
462 }
463
464 int
465 dcmintr(brd)
466 register int brd;
467 {
468 register struct dcmdevice *dcm = dcm_addr[brd];
469 register struct dcmischeme *dis;
470 register int unit = MKUNIT(brd, 0);
471 register int code, i;
472 int pcnd[4], mcode, mcnd[4];
473
474 /*
475 * Do all guarded register accesses right off to minimize
476 * block out of hardware.
477 */
478 SEM_LOCK(dcm);
479 if ((dcm->dcm_ic & IC_IR) == 0) {
480 SEM_UNLOCK(dcm);
481 return (0);
482 }
483 for (i = 0; i < 4; i++) {
484 pcnd[i] = dcm->dcm_icrtab[i].dcm_data;
485 dcm->dcm_icrtab[i].dcm_data = 0;
486 code = dcm_modem[unit+i]->mdmin;
487 if (dcmsoftCAR[brd] & FLAG_STDDCE)
488 code = hp2dce_in(code);
489 mcnd[i] = code;
490 }
491 code = dcm->dcm_iir & IIR_MASK;
492 dcm->dcm_iir = 0; /* XXX doc claims read clears interrupt?! */
493 mcode = dcm->dcm_modemintr;
494 dcm->dcm_modemintr = 0;
495 SEM_UNLOCK(dcm);
496
497 #ifdef DEBUG
498 if (dcmdebug & DDB_INTR) {
499 printf("dcmintr(%d): iir %x pc %x/%x/%x/%x ",
500 brd, code, pcnd[0], pcnd[1], pcnd[2], pcnd[3]);
501 printf("miir %x mc %x/%x/%x/%x\n",
502 mcode, mcnd[0], mcnd[1], mcnd[2], mcnd[3]);
503 }
504 #endif
505 if (code & IIR_TIMEO)
506 dcmrint(brd, dcm);
507 if (code & IIR_PORT0)
508 dcmpint(unit+0, pcnd[0], dcm);
509 if (code & IIR_PORT1)
510 dcmpint(unit+1, pcnd[1], dcm);
511 if (code & IIR_PORT2)
512 dcmpint(unit+2, pcnd[2], dcm);
513 if (code & IIR_PORT3)
514 dcmpint(unit+3, pcnd[3], dcm);
515 if (code & IIR_MODM) {
516 if (mcode == 0 || mcode & 0x1) /* mcode==0 -> 98642 board */
517 dcmmint(unit+0, mcnd[0], dcm);
518 if (mcode & 0x2)
519 dcmmint(unit+1, mcnd[1], dcm);
520 if (mcode & 0x4)
521 dcmmint(unit+2, mcnd[2], dcm);
522 if (mcode & 0x8)
523 dcmmint(unit+3, mcnd[3], dcm);
524 }
525
526 dis = &dcmischeme[brd];
527 /*
528 * Chalk up a receiver interrupt if the timer running or one of
529 * the ports reports a special character interrupt.
530 */
531 if ((code & IIR_TIMEO) ||
532 ((pcnd[0]|pcnd[1]|pcnd[2]|pcnd[3]) & IT_SPEC))
533 dis->dis_intr++;
534 /*
535 * See if it is time to check/change the interrupt rate.
536 */
537 if (dcmistype < 0 &&
538 (i = time.tv_sec - dis->dis_time) >= dcminterval) {
539 /*
540 * If currently per-character and averaged over 70 interrupts
541 * per-second (66 is threshold of 600 baud) in last interval,
542 * switch to timer mode.
543 *
544 * XXX decay counts ala load average to avoid spikes?
545 */
546 if (dis->dis_perchar && dis->dis_intr > 70 * i)
547 dcmsetischeme(brd, DIS_TIMER);
548 /*
549 * If currently using timer and had more interrupts than
550 * received characters in the last interval, switch back
551 * to per-character. Note that after changing to per-char
552 * we must process any characters already in the queue
553 * since they may have arrived before the bitmap was setup.
554 *
555 * XXX decay counts?
556 */
557 else if (!dis->dis_perchar && dis->dis_intr > dis->dis_char) {
558 dcmsetischeme(brd, DIS_PERCHAR);
559 dcmrint(brd, dcm);
560 }
561 dis->dis_intr = dis->dis_char = 0;
562 dis->dis_time = time.tv_sec;
563 }
564 return (1);
565 }
566
567 /*
568 * Port interrupt. Can be two things:
569 * First, it might be a special character (exception interrupt);
570 * Second, it may be a buffer empty (transmit interrupt);
571 */
572 dcmpint(unit, code, dcm)
573 int unit, code;
574 struct dcmdevice *dcm;
575 {
576 struct tty *tp = dcm_tty[unit];
577
578 if (code & IT_SPEC)
579 dcmreadbuf(unit, dcm, tp);
580 if (code & IT_TX)
581 dcmxint(unit, dcm, tp);
582 }
583
584 dcmrint(brd, dcm)
585 int brd;
586 register struct dcmdevice *dcm;
587 {
588 register int i, unit;
589 register struct tty *tp;
590
591 unit = MKUNIT(brd, 0);
592 tp = dcm_tty[unit];
593 for (i = 0; i < 4; i++, tp++, unit++)
594 dcmreadbuf(unit, dcm, tp);
595 }
596
597 dcmreadbuf(unit, dcm, tp)
598 int unit;
599 register struct dcmdevice *dcm;
600 register struct tty *tp;
601 {
602 int port = PORT(unit);
603 register struct dcmpreg *pp = dcm_preg(dcm, port);
604 register struct dcmrfifo *fifo;
605 register int c, stat;
606 register unsigned head;
607 int nch = 0;
608 #ifdef DCMSTATS
609 struct dcmstats *dsp = &dcmstats[BOARD(unit)];
610
611 dsp->rints++;
612 #endif
613 if ((tp->t_state & TS_ISOPEN) == 0) {
614 #ifdef KGDB
615 if ((makedev(dcmmajor, unit) == kgdb_dev) &&
616 (head = pp->r_head & RX_MASK) != (pp->r_tail & RX_MASK) &&
617 dcm->dcm_rfifos[3-port][head>>1].data_char == FRAME_START) {
618 pp->r_head = (head + 2) & RX_MASK;
619 kgdb_connect(0); /* trap into kgdb */
620 return;
621 }
622 #endif /* KGDB */
623 pp->r_head = pp->r_tail & RX_MASK;
624 return;
625 }
626
627 head = pp->r_head & RX_MASK;
628 fifo = &dcm->dcm_rfifos[3-port][head>>1];
629 /*
630 * XXX upper bound on how many chars we will take in one swallow?
631 */
632 while (head != (pp->r_tail & RX_MASK)) {
633 /*
634 * Get character/status and update head pointer as fast
635 * as possible to make room for more characters.
636 */
637 c = fifo->data_char;
638 stat = fifo->data_stat;
639 head = (head + 2) & RX_MASK;
640 pp->r_head = head;
641 fifo = head ? fifo+1 : &dcm->dcm_rfifos[3-port][0];
642 nch++;
643
644 #ifdef DEBUG
645 if (dcmdebug & DDB_INPUT)
646 printf("dcmreadbuf(%d): c%x('%c') s%x f%x h%x t%x\n",
647 unit, c&0xFF, c, stat&0xFF,
648 tp->t_flags, head, pp->r_tail);
649 #endif
650 /*
651 * Check for and handle errors
652 */
653 if (stat & RD_MASK) {
654 #ifdef DEBUG
655 if (dcmdebug & (DDB_INPUT|DDB_SIOERR))
656 printf("dcmreadbuf(%d): err: c%x('%c') s%x\n",
657 unit, stat, c&0xFF, c);
658 #endif
659 if (stat & (RD_BD | RD_FE))
660 c |= TTY_FE;
661 else if (stat & RD_PE)
662 c |= TTY_PE;
663 else if (stat & RD_OVF)
664 log(LOG_WARNING,
665 "dcm%d: silo overflow\n", unit);
666 else if (stat & RD_OE)
667 log(LOG_WARNING,
668 "dcm%d: uart overflow\n", unit);
669 }
670 (*linesw[tp->t_line].l_rint)(c, tp);
671 }
672 dcmischeme[BOARD(unit)].dis_char += nch;
673 #ifdef DCMSTATS
674 dsp->rchars += nch;
675 if (nch <= DCMRBSIZE)
676 dsp->rsilo[nch]++;
677 else
678 dsp->rsilo[DCMRBSIZE+1]++;
679 #endif
680 }
681
682 dcmxint(unit, dcm, tp)
683 int unit;
684 struct dcmdevice *dcm;
685 register struct tty *tp;
686 {
687 tp->t_state &= ~TS_BUSY;
688 if (tp->t_state & TS_FLUSH)
689 tp->t_state &= ~TS_FLUSH;
690 (*linesw[tp->t_line].l_start)(tp);
691 }
692
693 dcmmint(unit, mcnd, dcm)
694 register int unit;
695 register struct dcmdevice *dcm;
696 int mcnd;
697 {
698 register struct tty *tp;
699 int delta;
700
701 #ifdef DEBUG
702 if (dcmdebug & DDB_MODEM)
703 printf("dcmmint: port %d mcnd %x mcndlast %x\n",
704 unit, mcnd, mcndlast[unit]);
705 #endif
706 tp = dcm_tty[unit];
707 delta = mcnd ^ mcndlast[unit];
708 mcndlast[unit] = mcnd;
709 if ((delta & MI_CTS) && (tp->t_state & TS_ISOPEN) &&
710 (tp->t_flags & CCTS_OFLOW)) {
711 if (mcnd & MI_CTS) {
712 tp->t_state &= ~TS_TTSTOP;
713 ttstart(tp);
714 } else
715 tp->t_state |= TS_TTSTOP; /* inline dcmstop */
716 }
717 if (delta & MI_CD) {
718 if (mcnd & MI_CD)
719 (void)(*linesw[tp->t_line].l_modem)(tp, 1);
720 else if ((dcmsoftCAR[BOARD(unit)] & (1 << PORT(unit))) == 0 &&
721 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) {
722 dcm_modem[unit]->mdmout = MO_OFF;
723 SEM_LOCK(dcm);
724 dcm->dcm_modemchng |= 1<<(unit & 3);
725 dcm->dcm_cr |= CR_MODM;
726 SEM_UNLOCK(dcm);
727 DELAY(10); /* time to change lines */
728 }
729 }
730 }
731
732 int
733 dcmioctl(dev, cmd, data, flag, p)
734 dev_t dev;
735 int cmd;
736 caddr_t data;
737 int flag;
738 struct proc *p;
739 {
740 register struct tty *tp;
741 register int unit = UNIT(dev);
742 register struct dcmdevice *dcm;
743 register int port;
744 int error, s;
745
746 #ifdef DEBUG
747 if (dcmdebug & DDB_IOCTL)
748 printf("dcmioctl: unit %d cmd %x data %x flag %x\n",
749 unit, cmd, *data, flag);
750 #endif
751 tp = dcm_tty[unit];
752 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
753 if (error >= 0)
754 return (error);
755 error = ttioctl(tp, cmd, data, flag, p);
756 if (error >= 0)
757 return (error);
758
759 port = PORT(unit);
760 dcm = dcm_addr[BOARD(unit)];
761 switch (cmd) {
762 case TIOCSBRK:
763 /*
764 * Wait for transmitter buffer to empty
765 */
766 s = spltty();
767 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
768 DELAY(DCM_USPERCH(tp->t_ospeed));
769 SEM_LOCK(dcm);
770 dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
771 dcm->dcm_cr |= (1 << port); /* start break */
772 SEM_UNLOCK(dcm);
773 splx(s);
774 break;
775
776 case TIOCCBRK:
777 SEM_LOCK(dcm);
778 dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
779 dcm->dcm_cr |= (1 << port); /* end break */
780 SEM_UNLOCK(dcm);
781 break;
782
783 case TIOCSDTR:
784 (void) dcmmctl(dev, MO_ON, DMBIS);
785 break;
786
787 case TIOCCDTR:
788 (void) dcmmctl(dev, MO_ON, DMBIC);
789 break;
790
791 case TIOCMSET:
792 (void) dcmmctl(dev, *(int *)data, DMSET);
793 break;
794
795 case TIOCMBIS:
796 (void) dcmmctl(dev, *(int *)data, DMBIS);
797 break;
798
799 case TIOCMBIC:
800 (void) dcmmctl(dev, *(int *)data, DMBIC);
801 break;
802
803 case TIOCMGET:
804 *(int *)data = dcmmctl(dev, 0, DMGET);
805 break;
806
807 default:
808 return (ENOTTY);
809 }
810 return (0);
811 }
812
813 int
814 dcmparam(tp, t)
815 register struct tty *tp;
816 register struct termios *t;
817 {
818 register struct dcmdevice *dcm;
819 register int port, mode, cflag = t->c_cflag;
820 int ospeed = ttspeedtab(t->c_ospeed, dcmspeedtab);
821
822 /* check requested parameters */
823 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
824 return (EINVAL);
825 /* and copy to tty */
826 tp->t_ispeed = t->c_ispeed;
827 tp->t_ospeed = t->c_ospeed;
828 tp->t_cflag = cflag;
829 if (ospeed == 0) {
830 (void) dcmmctl(UNIT(tp->t_dev), MO_OFF, DMSET);
831 return (0);
832 }
833
834 mode = 0;
835 switch (cflag&CSIZE) {
836 case CS5:
837 mode = LC_5BITS; break;
838 case CS6:
839 mode = LC_6BITS; break;
840 case CS7:
841 mode = LC_7BITS; break;
842 case CS8:
843 mode = LC_8BITS; break;
844 }
845 if (cflag&PARENB) {
846 if (cflag&PARODD)
847 mode |= LC_PODD;
848 else
849 mode |= LC_PEVEN;
850 }
851 if (cflag&CSTOPB)
852 mode |= LC_2STOP;
853 else
854 mode |= LC_1STOP;
855 #ifdef DEBUG
856 if (dcmdebug & DDB_PARAM)
857 printf("dcmparam(%d): cflag %x mode %x speed %d uperch %d\n",
858 UNIT(tp->t_dev), cflag, mode, tp->t_ospeed,
859 DCM_USPERCH(tp->t_ospeed));
860 #endif
861
862 port = PORT(tp->t_dev);
863 dcm = dcm_addr[BOARD(tp->t_dev)];
864 /*
865 * Wait for transmitter buffer to empty.
866 */
867 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
868 DELAY(DCM_USPERCH(tp->t_ospeed));
869 /*
870 * Make changes known to hardware.
871 */
872 dcm->dcm_data[port].dcm_baud = ospeed;
873 dcm->dcm_data[port].dcm_conf = mode;
874 SEM_LOCK(dcm);
875 dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
876 dcm->dcm_cr |= (1 << port);
877 SEM_UNLOCK(dcm);
878 /*
879 * Delay for config change to take place. Weighted by baud.
880 * XXX why do we do this?
881 */
882 DELAY(16 * DCM_USPERCH(tp->t_ospeed));
883 return (0);
884 }
885
886 void
887 dcmstart(tp)
888 register struct tty *tp;
889 {
890 register struct dcmdevice *dcm;
891 register struct dcmpreg *pp;
892 register struct dcmtfifo *fifo;
893 register char *bp;
894 register unsigned tail, next;
895 register int port, nch;
896 unsigned head;
897 char buf[16];
898 int s;
899 #ifdef DCMSTATS
900 struct dcmstats *dsp = &dcmstats[BOARD(tp->t_dev)];
901 int tch = 0;
902 #endif
903
904 s = spltty();
905 #ifdef DCMSTATS
906 dsp->xints++;
907 #endif
908 #ifdef DEBUG
909 if (dcmdebug & DDB_OUTPUT)
910 printf("dcmstart(%d): state %x flags %x outcc %d\n",
911 UNIT(tp->t_dev), tp->t_state, tp->t_flags,
912 tp->t_outq.c_cc);
913 #endif
914 if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
915 goto out;
916 if (tp->t_outq.c_cc <= tp->t_lowat) {
917 if (tp->t_state&TS_ASLEEP) {
918 tp->t_state &= ~TS_ASLEEP;
919 wakeup((caddr_t)&tp->t_outq);
920 }
921 selwakeup(&tp->t_wsel);
922 }
923 if (tp->t_outq.c_cc == 0) {
924 #ifdef DCMSTATS
925 dsp->xempty++;
926 #endif
927 goto out;
928 }
929
930 dcm = dcm_addr[BOARD(tp->t_dev)];
931 port = PORT(tp->t_dev);
932 pp = dcm_preg(dcm, port);
933 tail = pp->t_tail & TX_MASK;
934 next = (tail + 1) & TX_MASK;
935 head = pp->t_head & TX_MASK;
936 if (head == next)
937 goto out;
938 fifo = &dcm->dcm_tfifos[3-port][tail];
939 again:
940 nch = q_to_b(&tp->t_outq, buf, (head - next) & TX_MASK);
941 #ifdef DCMSTATS
942 tch += nch;
943 #endif
944 #ifdef DEBUG
945 if (dcmdebug & DDB_OUTPUT)
946 printf("\thead %x tail %x nch %d\n", head, tail, nch);
947 #endif
948 /*
949 * Loop transmitting all the characters we can.
950 */
951 for (bp = buf; --nch >= 0; bp++) {
952 fifo->data_char = *bp;
953 pp->t_tail = next;
954 /*
955 * If this is the first character,
956 * get the hardware moving right now.
957 */
958 if (bp == buf) {
959 tp->t_state |= TS_BUSY;
960 SEM_LOCK(dcm);
961 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
962 dcm->dcm_cr |= (1 << port);
963 SEM_UNLOCK(dcm);
964 }
965 tail = next;
966 fifo = tail ? fifo+1 : &dcm->dcm_tfifos[3-port][0];
967 next = (next + 1) & TX_MASK;
968 }
969 /*
970 * Head changed while we were loading the buffer,
971 * go back and load some more if we can.
972 */
973 if (tp->t_outq.c_cc && head != (pp->t_head & TX_MASK)) {
974 #ifdef DCMSTATS
975 dsp->xrestarts++;
976 #endif
977 head = pp->t_head & TX_MASK;
978 goto again;
979 }
980
981 /*
982 * Kick it one last time in case it finished while we were
983 * loading the last bunch.
984 */
985 if (bp > &buf[1]) {
986 tp->t_state |= TS_BUSY;
987 SEM_LOCK(dcm);
988 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
989 dcm->dcm_cr |= (1 << port);
990 SEM_UNLOCK(dcm);
991 }
992 #ifdef DEBUG
993 if (dcmdebug & DDB_INTR)
994 printf("dcmstart(%d): head %x tail %x outqcc %d\n",
995 UNIT(tp->t_dev), head, tail, tp->t_outq.c_cc);
996 #endif
997 out:
998 #ifdef DCMSTATS
999 dsp->xchars += tch;
1000 if (tch <= DCMXBSIZE)
1001 dsp->xsilo[tch]++;
1002 else
1003 dsp->xsilo[DCMXBSIZE+1]++;
1004 #endif
1005 splx(s);
1006 }
1007
1008 /*
1009 * Stop output on a line.
1010 */
1011 int
1012 dcmstop(tp, flag)
1013 register struct tty *tp;
1014 int flag;
1015 {
1016 int s;
1017
1018 s = spltty();
1019 if (tp->t_state & TS_BUSY) {
1020 /* XXX is there some way to safely stop transmission? */
1021 if ((tp->t_state&TS_TTSTOP) == 0)
1022 tp->t_state |= TS_FLUSH;
1023 }
1024 splx(s);
1025 }
1026
1027 /*
1028 * Modem control
1029 */
1030 dcmmctl(dev, bits, how)
1031 dev_t dev;
1032 int bits, how;
1033 {
1034 register struct dcmdevice *dcm;
1035 int s, unit, brd, hit = 0;
1036
1037 unit = UNIT(dev);
1038 #ifdef DEBUG
1039 if (dcmdebug & DDB_MODEM)
1040 printf("dcmmctl(%d) unit %d bits 0x%x how %x\n",
1041 BOARD(unit), unit, bits, how);
1042 #endif
1043
1044 brd = BOARD(unit);
1045 dcm = dcm_addr[brd];
1046 s = spltty();
1047 switch (how) {
1048
1049 case DMSET:
1050 dcm_modem[unit]->mdmout = bits;
1051 hit++;
1052 break;
1053
1054 case DMBIS:
1055 dcm_modem[unit]->mdmout |= bits;
1056 hit++;
1057 break;
1058
1059 case DMBIC:
1060 dcm_modem[unit]->mdmout &= ~bits;
1061 hit++;
1062 break;
1063
1064 case DMGET:
1065 bits = dcm_modem[unit]->mdmin;
1066 if (dcmsoftCAR[brd] & FLAG_STDDCE)
1067 bits = hp2dce_in(bits);
1068 break;
1069 }
1070 if (hit) {
1071 SEM_LOCK(dcm);
1072 dcm->dcm_modemchng |= 1<<(unit & 3);
1073 dcm->dcm_cr |= CR_MODM;
1074 SEM_UNLOCK(dcm);
1075 DELAY(10); /* delay until done */
1076 (void) splx(s);
1077 }
1078 return (bits);
1079 }
1080
1081 /*
1082 * Set board to either interrupt per-character or at a fixed interval.
1083 */
1084 dcmsetischeme(brd, flags)
1085 int brd, flags;
1086 {
1087 register struct dcmdevice *dcm = dcm_addr[brd];
1088 register struct dcmischeme *dis = &dcmischeme[brd];
1089 register int i;
1090 u_char mask;
1091 int perchar = flags & DIS_PERCHAR;
1092
1093 #ifdef DEBUG
1094 if (dcmdebug & DDB_INTSCHM)
1095 printf("dcmsetischeme(%d, %d): cur %d, ints %d, chars %d\n",
1096 brd, perchar, dis->dis_perchar,
1097 dis->dis_intr, dis->dis_char);
1098 if ((flags & DIS_RESET) == 0 && perchar == dis->dis_perchar) {
1099 printf("dcmsetischeme(%d): redundent request %d\n",
1100 brd, perchar);
1101 return;
1102 }
1103 #endif
1104 /*
1105 * If perchar is non-zero, we enable interrupts on all characters
1106 * otherwise we disable perchar interrupts and use periodic
1107 * polling interrupts.
1108 */
1109 dis->dis_perchar = perchar;
1110 mask = perchar ? 0xf : 0x0;
1111 for (i = 0; i < 256; i++)
1112 dcm->dcm_bmap[i].data_data = mask;
1113 /*
1114 * Don't slow down tandem mode, interrupt on flow control
1115 * chars for any port on the board.
1116 */
1117 if (!perchar) {
1118 register struct tty *tp = dcm_tty[MKUNIT(brd, 0)];
1119 int c;
1120
1121 for (i = 0; i < 4; i++, tp++) {
1122 if ((c = tp->t_cc[VSTART]) != _POSIX_VDISABLE)
1123 dcm->dcm_bmap[c].data_data |= (1 << i);
1124 if ((c = tp->t_cc[VSTOP]) != _POSIX_VDISABLE)
1125 dcm->dcm_bmap[c].data_data |= (1 << i);
1126 }
1127 }
1128 /*
1129 * Board starts with timer disabled so if first call is to
1130 * set perchar mode then we don't want to toggle the timer.
1131 */
1132 if (flags == (DIS_RESET|DIS_PERCHAR))
1133 return;
1134 /*
1135 * Toggle card 16.7ms interrupts (we first make sure that card
1136 * has cleared the bit so it will see the toggle).
1137 */
1138 while (dcm->dcm_cr & CR_TIMER)
1139 ;
1140 SEM_LOCK(dcm);
1141 dcm->dcm_cr |= CR_TIMER;
1142 SEM_UNLOCK(dcm);
1143 }
1144
1145 /*
1146 * Following are all routines needed for DCM to act as console
1147 */
1148 #include <dev/cons.h>
1149
1150 void
1151 dcmcnprobe(cp)
1152 struct consdev *cp;
1153 {
1154 register struct hp_hw *hw;
1155 int unit;
1156
1157 /* locate the major number */
1158 for (dcmmajor = 0; dcmmajor < nchrdev; dcmmajor++)
1159 if (cdevsw[dcmmajor].d_open == dcmopen)
1160 break;
1161
1162 /*
1163 * Implicitly assigns the lowest select code DCM card found to be
1164 * logical unit 0 (actually CONUNIT). If your config file does
1165 * anything different, you're screwed.
1166 */
1167 for (hw = sc_table; hw->hw_type; hw++)
1168 if (HW_ISDEV(hw, D_COMMDCM) && !badaddr((short *)hw->hw_kva))
1169 break;
1170 if (!HW_ISDEV(hw, D_COMMDCM)) {
1171 cp->cn_pri = CN_DEAD;
1172 return;
1173 }
1174 unit = CONUNIT;
1175 dcm_addr[BOARD(CONUNIT)] = (struct dcmdevice *)hw->hw_kva;
1176
1177 /* initialize required fields */
1178 cp->cn_dev = makedev(dcmmajor, unit);
1179 switch (dcm_addr[BOARD(unit)]->dcm_rsid) {
1180 case DCMID:
1181 cp->cn_pri = CN_NORMAL;
1182 break;
1183 case DCMID|DCMCON:
1184 cp->cn_pri = CN_REMOTE;
1185 break;
1186 default:
1187 cp->cn_pri = CN_DEAD;
1188 return;
1189 }
1190 /*
1191 * If dcmconsole is initialized, raise our priority.
1192 */
1193 if (dcmconsole == UNIT(unit))
1194 cp->cn_pri = CN_REMOTE;
1195 #ifdef KGDB_CHEAT
1196 /*
1197 * This doesn't currently work, at least not with ite consoles;
1198 * the console hasn't been initialized yet.
1199 */
1200 if (major(kgdb_dev) == dcmmajor && BOARD(kgdb_dev) == BOARD(unit)) {
1201 (void) dcminit(kgdb_dev, kgdb_rate);
1202 if (kgdb_debug_init) {
1203 /*
1204 * We assume that console is ready for us...
1205 * this assumes that a dca or ite console
1206 * has been selected already and will init
1207 * on the first putc.
1208 */
1209 printf("dcm%d: ", UNIT(kgdb_dev));
1210 kgdb_connect(1);
1211 }
1212 }
1213 #endif
1214 }
1215
1216 void
1217 dcmcninit(cp)
1218 struct consdev *cp;
1219 {
1220 dcminit(cp->cn_dev, dcmdefaultrate);
1221 dcmconsinit = 1;
1222 dcmconsole = UNIT(cp->cn_dev);
1223 }
1224
1225 dcminit(dev, rate)
1226 dev_t dev;
1227 int rate;
1228 {
1229 register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
1230 int s, mode, port;
1231
1232 port = PORT(dev);
1233 mode = LC_8BITS | LC_1STOP;
1234 s = splhigh();
1235 /*
1236 * Wait for transmitter buffer to empty.
1237 */
1238 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
1239 DELAY(DCM_USPERCH(rate));
1240 /*
1241 * Make changes known to hardware.
1242 */
1243 dcm->dcm_data[port].dcm_baud = ttspeedtab(rate, dcmspeedtab);
1244 dcm->dcm_data[port].dcm_conf = mode;
1245 SEM_LOCK(dcm);
1246 dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
1247 dcm->dcm_cr |= (1 << port);
1248 SEM_UNLOCK(dcm);
1249 /*
1250 * Delay for config change to take place. Weighted by baud.
1251 * XXX why do we do this?
1252 */
1253 DELAY(16 * DCM_USPERCH(rate));
1254 splx(s);
1255 }
1256
1257 int
1258 dcmcngetc(dev)
1259 dev_t dev;
1260 {
1261 register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
1262 register struct dcmrfifo *fifo;
1263 register struct dcmpreg *pp;
1264 register unsigned head;
1265 int s, c, stat, port;
1266
1267 port = PORT(dev);
1268 pp = dcm_preg(dcm, port);
1269 s = splhigh();
1270 head = pp->r_head & RX_MASK;
1271 fifo = &dcm->dcm_rfifos[3-port][head>>1];
1272 while (head == (pp->r_tail & RX_MASK))
1273 ;
1274 /*
1275 * If board interrupts are enabled, just let our received char
1276 * interrupt through in case some other port on the board was
1277 * busy. Otherwise we must clear the interrupt.
1278 */
1279 SEM_LOCK(dcm);
1280 if ((dcm->dcm_ic & IC_IE) == 0)
1281 stat = dcm->dcm_iir;
1282 SEM_UNLOCK(dcm);
1283 c = fifo->data_char;
1284 stat = fifo->data_stat;
1285 pp->r_head = (head + 2) & RX_MASK;
1286 splx(s);
1287 return (c);
1288 }
1289
1290 /*
1291 * Console kernel output character routine.
1292 */
1293 void
1294 dcmcnputc(dev, c)
1295 dev_t dev;
1296 int c;
1297 {
1298 register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
1299 register struct dcmpreg *pp;
1300 unsigned tail;
1301 int s, port, stat;
1302
1303 port = PORT(dev);
1304 pp = dcm_preg(dcm, port);
1305 s = splhigh();
1306 #ifdef KGDB
1307 if (dev != kgdb_dev)
1308 #endif
1309 if (dcmconsinit == 0) {
1310 (void) dcminit(dev, dcmdefaultrate);
1311 dcmconsinit = 1;
1312 }
1313 tail = pp->t_tail & TX_MASK;
1314 while (tail != (pp->t_head & TX_MASK))
1315 ;
1316 dcm->dcm_tfifos[3-port][tail].data_char = c;
1317 pp->t_tail = tail = (tail + 1) & TX_MASK;
1318 SEM_LOCK(dcm);
1319 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
1320 dcm->dcm_cr |= (1 << port);
1321 SEM_UNLOCK(dcm);
1322 while (tail != (pp->t_head & TX_MASK))
1323 ;
1324 /*
1325 * If board interrupts are enabled, just let our completion
1326 * interrupt through in case some other port on the board
1327 * was busy. Otherwise we must clear the interrupt.
1328 */
1329 if ((dcm->dcm_ic & IC_IE) == 0) {
1330 SEM_LOCK(dcm);
1331 stat = dcm->dcm_iir;
1332 SEM_UNLOCK(dcm);
1333 }
1334 splx(s);
1335 }
1336 #endif
1337