dcm.c revision 1.18 1 /* $NetBSD: dcm.c,v 1.18 1995/10/04 06:39:06 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1982, 1986, 1990, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the University of
23 * California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 * from Utah: $Hdr: dcm.c 1.29 92/01/21$
41 *
42 * @(#)dcm.c 8.4 (Berkeley) 1/12/94
43 */
44
45 /*
46 * TODO:
47 * Timeouts
48 * Test console support.
49 */
50
51 #include "dcm.h"
52 #if NDCM > 0
53 /*
54 * 98642/MUX
55 */
56 #include <sys/param.h>
57 #include <sys/systm.h>
58 #include <sys/ioctl.h>
59 #include <sys/proc.h>
60 #include <sys/tty.h>
61 #include <sys/conf.h>
62 #include <sys/file.h>
63 #include <sys/uio.h>
64 #include <sys/kernel.h>
65 #include <sys/syslog.h>
66 #include <sys/time.h>
67
68 #include <machine/cpu.h>
69
70 #include <hp300/dev/device.h>
71 #include <hp300/dev/dcmreg.h>
72 #include <hp300/hp300/isr.h>
73
74 #ifndef DEFAULT_BAUD_RATE
75 #define DEFAULT_BAUD_RATE 9600
76 #endif
77
78 int dcmprobe(), dcmintr(), dcmparam();
79 void dcmstart();
80 struct driver dcmdriver = {
81 dcmprobe, "dcm",
82 };
83
84 #define NDCMLINE (NDCM*4)
85
86 struct tty *dcm_tty[NDCMLINE];
87 struct modemreg *dcm_modem[NDCMLINE];
88 char mcndlast[NDCMLINE]; /* XXX last modem status for line */
89 int ndcm = NDCMLINE;
90
91 int dcm_active;
92 int dcmsoftCAR[NDCM];
93 struct dcmdevice *dcm_addr[NDCM];
94 struct isr dcmisr[NDCM];
95
96 struct speedtab dcmspeedtab[] = {
97 0, BR_0,
98 50, BR_50,
99 75, BR_75,
100 110, BR_110,
101 134, BR_134,
102 150, BR_150,
103 300, BR_300,
104 600, BR_600,
105 1200, BR_1200,
106 1800, BR_1800,
107 2400, BR_2400,
108 4800, BR_4800,
109 9600, BR_9600,
110 19200, BR_19200,
111 38400, BR_38400,
112 -1, -1
113 };
114
115 /* u-sec per character based on baudrate (assumes 1 start/8 data/1 stop bit) */
116 #define DCM_USPERCH(s) (10000000 / (s))
117
118 /*
119 * Per board interrupt scheme. 16.7ms is the polling interrupt rate
120 * (16.7ms is about 550 baud, 38.4k is 72 chars in 16.7ms).
121 */
122 #define DIS_TIMER 0
123 #define DIS_PERCHAR 1
124 #define DIS_RESET 2
125
126 int dcmistype = -1; /* -1 == dynamic, 0 == timer, 1 == perchar */
127 int dcminterval = 5; /* interval (secs) between checks */
128 struct dcmischeme {
129 int dis_perchar; /* non-zero if interrupting per char */
130 long dis_time; /* last time examined */
131 int dis_intr; /* recv interrupts during last interval */
132 int dis_char; /* characters read during last interval */
133 } dcmischeme[NDCM];
134
135 /*
136 * Console support
137 */
138 #ifdef DCMCONSOLE
139 int dcmconsole = DCMCONSOLE;
140 #else
141 int dcmconsole = -1;
142 #endif
143 int dcmconsinit;
144 int dcmdefaultrate = DEFAULT_BAUD_RATE;
145 int dcmconbrdbusy = 0;
146 int dcmmajor;
147
148 #ifdef KGDB
149 /*
150 * Kernel GDB support
151 */
152 #include <machine/remote-sl.h>
153
154 extern dev_t kgdb_dev;
155 extern int kgdb_rate;
156 extern int kgdb_debug_init;
157 #endif
158
159 /* #define DCMSTATS */
160
161 #ifdef DEBUG
162 int dcmdebug = 0x0;
163 #define DDB_SIOERR 0x01
164 #define DDB_PARAM 0x02
165 #define DDB_INPUT 0x04
166 #define DDB_OUTPUT 0x08
167 #define DDB_INTR 0x10
168 #define DDB_IOCTL 0x20
169 #define DDB_INTSCHM 0x40
170 #define DDB_MODEM 0x80
171 #define DDB_OPENCLOSE 0x100
172 #endif
173
174 #ifdef DCMSTATS
175 #define DCMRBSIZE 94
176 #define DCMXBSIZE 24
177
178 struct dcmstats {
179 long xints; /* # of xmit ints */
180 long xchars; /* # of xmit chars */
181 long xempty; /* times outq is empty in dcmstart */
182 long xrestarts; /* times completed while xmitting */
183 long rints; /* # of recv ints */
184 long rchars; /* # of recv chars */
185 long xsilo[DCMXBSIZE+2]; /* times this many chars xmit on one int */
186 long rsilo[DCMRBSIZE+2]; /* times this many chars read on one int */
187 } dcmstats[NDCM];
188 #endif
189
190 #define UNIT(x) minor(x)
191 #define BOARD(x) (((x) >> 2) & 0x3f)
192 #define PORT(x) ((x) & 3)
193 #define MKUNIT(b,p) (((b) << 2) | (p))
194
195 /*
196 * Conversion from "HP DCE" to almost-normal DCE: on the 638 8-port mux,
197 * the distribution panel uses "HP DCE" conventions. If requested via
198 * the device flags, we swap the inputs to something closer to normal DCE,
199 * allowing a straight-through cable to a DTE or a reversed cable
200 * to a DCE (reversing 2-3, 4-5, 8-20 and leaving 6 unconnected;
201 * this gets "DCD" on pin 20 and "CTS" on 4, but doesn't connect
202 * DSR or make RTS work, though). The following gives the full
203 * details of a cable from this mux panel to a modem:
204 *
205 * HP modem
206 * name pin pin name
207 * HP inputs:
208 * "Rx" 2 3 Tx
209 * CTS 4 5 CTS (only needed for CCTS_OFLOW)
210 * DCD 20 8 DCD
211 * "DSR" 9 6 DSR (unneeded)
212 * RI 22 22 RI (unneeded)
213 *
214 * HP outputs:
215 * "Tx" 3 2 Rx
216 * "DTR" 6 not connected
217 * "RTS" 8 20 DTR
218 * "SR" 23 4 RTS (often not needed)
219 */
220 #define FLAG_STDDCE 0x10 /* map inputs if this bit is set in flags */
221 #define hp2dce_in(ibits) (iconv[(ibits) & 0xf])
222 static char iconv[16] = {
223 0, MI_DM, MI_CTS, MI_CTS|MI_DM,
224 MI_CD, MI_CD|MI_DM, MI_CD|MI_CTS, MI_CD|MI_CTS|MI_DM,
225 MI_RI, MI_RI|MI_DM, MI_RI|MI_CTS, MI_RI|MI_CTS|MI_DM,
226 MI_RI|MI_CD, MI_RI|MI_CD|MI_DM, MI_RI|MI_CD|MI_CTS,
227 MI_RI|MI_CD|MI_CTS|MI_DM
228 };
229
230 dcmprobe(hd)
231 register struct hp_device *hd;
232 {
233 register struct dcmdevice *dcm;
234 register int i;
235 register int timo = 0;
236 int s, brd, isconsole, mbits;
237
238 dcm = (struct dcmdevice *)hd->hp_addr;
239 if ((dcm->dcm_rsid & 0x1f) != DCMID)
240 return (0);
241 brd = hd->hp_unit;
242 isconsole = (brd == BOARD(dcmconsole));
243 /*
244 * XXX selected console device (CONSUNIT) as determined by
245 * dcmcnprobe does not agree with logical numbering imposed
246 * by the config file (i.e. lowest address DCM is not unit
247 * CONSUNIT). Don't recognize this card.
248 */
249 if (isconsole && dcm != dcm_addr[BOARD(dcmconsole)])
250 return (0);
251
252 /*
253 * Empirically derived self-test magic
254 */
255 s = spltty();
256 dcm->dcm_rsid = DCMRS;
257 DELAY(50000); /* 5000 is not long enough */
258 dcm->dcm_rsid = 0;
259 dcm->dcm_ic = IC_IE;
260 dcm->dcm_cr = CR_SELFT;
261 while ((dcm->dcm_ic & IC_IR) == 0)
262 if (++timo == 20000)
263 return (0);
264 DELAY(50000) /* XXX why is this needed ???? */
265 while ((dcm->dcm_iir & IIR_SELFT) == 0)
266 if (++timo == 400000)
267 return (0);
268 DELAY(50000) /* XXX why is this needed ???? */
269 if (dcm->dcm_stcon != ST_OK) {
270 if (!isconsole)
271 printf("dcm%d: self test failed: %x\n",
272 brd, dcm->dcm_stcon);
273 return (0);
274 }
275 dcm->dcm_ic = IC_ID;
276 splx(s);
277
278 hd->hp_ipl = DCMIPL(dcm->dcm_ic);
279 dcm_addr[brd] = dcm;
280 dcm_active |= 1 << brd;
281 dcmsoftCAR[brd] = hd->hp_flags;
282 dcmisr[brd].isr_ipl = hd->hp_ipl;
283 dcmisr[brd].isr_arg = brd;
284 dcmisr[brd].isr_intr = dcmintr;
285 isrlink(&dcmisr[brd]);
286 #ifdef KGDB
287 if (major(kgdb_dev) == dcmmajor && BOARD(kgdb_dev) == brd) {
288 if (dcmconsole == UNIT(kgdb_dev))
289 kgdb_dev = NODEV; /* can't debug over console port */
290 #ifndef KGDB_CHEAT
291 /*
292 * The following could potentially be replaced
293 * by the corresponding code in dcmcnprobe.
294 */
295 else {
296 (void) dcminit(kgdb_dev, kgdb_rate);
297 if (kgdb_debug_init) {
298 printf("dcm%d: ", UNIT(kgdb_dev));
299 kgdb_connect(1);
300 } else
301 printf("dcm%d: kgdb enabled\n", UNIT(kgdb_dev));
302 }
303 /* end could be replaced */
304 #endif
305 }
306 #endif
307 if (dcmistype == DIS_TIMER)
308 dcmsetischeme(brd, DIS_RESET|DIS_TIMER);
309 else
310 dcmsetischeme(brd, DIS_RESET|DIS_PERCHAR);
311
312 /* load pointers to modem control */
313 dcm_modem[MKUNIT(brd, 0)] = &dcm->dcm_modem0;
314 dcm_modem[MKUNIT(brd, 1)] = &dcm->dcm_modem1;
315 dcm_modem[MKUNIT(brd, 2)] = &dcm->dcm_modem2;
316 dcm_modem[MKUNIT(brd, 3)] = &dcm->dcm_modem3;
317 /* set DCD (modem) and CTS (flow control) on all ports */
318 if (dcmsoftCAR[brd] & FLAG_STDDCE)
319 mbits = hp2dce_in(MI_CD|MI_CTS);
320 else
321 mbits = MI_CD|MI_CTS;
322 for (i = 0; i < 4; i++)
323 dcm_modem[MKUNIT(brd, i)]->mdmmsk = mbits;
324
325 dcm->dcm_ic = IC_IE; /* turn all interrupts on */
326 /*
327 * Need to reset baud rate, etc. of next print so reset dcmconsole.
328 * Also make sure console is always "hardwired"
329 */
330 if (isconsole) {
331 dcmconsinit = 0;
332 dcmsoftCAR[brd] |= (1 << PORT(dcmconsole));
333 printf("dcm%d: console\n");
334 }
335 return (1);
336 }
337
338 /* ARGSUSED */
339 int
340 dcmopen(dev, flag, mode, p)
341 dev_t dev;
342 int flag, mode;
343 struct proc *p;
344 {
345 register struct tty *tp;
346 register int unit, brd;
347 int error = 0, mbits, s;
348
349 unit = UNIT(dev);
350 brd = BOARD(unit);
351 if (unit >= NDCMLINE || (dcm_active & (1 << brd)) == 0)
352 return (ENXIO);
353 if (!dcm_tty[unit])
354 tp = dcm_tty[unit] = ttymalloc();
355 else
356 tp = dcm_tty[unit];
357 tp->t_oproc = dcmstart;
358 tp->t_param = dcmparam;
359 tp->t_dev = dev;
360
361 if ((tp->t_state & TS_ISOPEN) == 0) {
362 /*
363 * Sanity clause: reset the card on first open.
364 * The card might be left in an inconsistent state
365 * if the card memory is read inadvertently.
366 */
367 dcminit(dev, dcmdefaultrate);
368
369 tp->t_state |= TS_WOPEN;
370 ttychars(tp);
371 tp->t_iflag = TTYDEF_IFLAG;
372 tp->t_oflag = TTYDEF_OFLAG;
373 tp->t_cflag = TTYDEF_CFLAG;
374 tp->t_lflag = TTYDEF_LFLAG;
375 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
376
377 s = spltty();
378
379 (void) dcmparam(tp, &tp->t_termios);
380 ttsetwater(tp);
381 } else if (tp->t_state & TS_XCLUDE && p->p_ucred->cr_uid != 0)
382 return (EBUSY);
383 else
384 s = spltty();
385
386 /* Set modem control state. */
387 mbits = MO_ON;
388 if (dcmsoftCAR[brd] & FLAG_STDDCE)
389 mbits |= MO_SR; /* pin 23, could be used as RTS */
390 (void) dcmmctl(dev, mbits, DMSET); /* enable port */
391
392 /* Set soft-carrier if so configured. */
393 if ((dcmsoftCAR[brd] & (1 << PORT(unit))) ||
394 (dcmmctl(dev, MO_OFF, DMGET) & MI_CD))
395 tp->t_state |= TS_CARR_ON;
396
397 #ifdef DEBUG
398 if (dcmdebug & DDB_MODEM)
399 printf("dcm%d: dcmopen port %d softcarr %c\n",
400 brd, unit, (tp->t_state & TS_CARR_ON) ? '1' : '0');
401 #endif
402
403 /* Wait for carrier if necessary. */
404 if ((flag & O_NONBLOCK) == 0)
405 while ((tp->t_cflag & CLOCAL) == 0 &&
406 (tp->t_state & TS_CARR_ON) == 0) {
407 tp->t_state |= TS_WOPEN;
408 error = ttysleep(tp, (caddr_t)&tp->t_rawq,
409 TTIPRI | PCATCH, ttopen, 0);
410 if (error) {
411 splx(s);
412 return (error);
413 }
414 }
415
416 splx(s);
417
418 #ifdef DEBUG
419 if (dcmdebug & DDB_OPENCLOSE)
420 printf("dcmopen: u %x st %x fl %x\n",
421 unit, tp->t_state, tp->t_flags);
422 #endif
423 if (error == 0)
424 error = (*linesw[tp->t_line].l_open)(dev, tp);
425
426 return (error);
427 }
428
429 /*ARGSUSED*/
430 int
431 dcmclose(dev, flag, mode, p)
432 dev_t dev;
433 int flag, mode;
434 struct proc *p;
435 {
436 register struct tty *tp;
437 int s, unit;
438
439 unit = UNIT(dev);
440 tp = dcm_tty[unit];
441 (*linesw[tp->t_line].l_close)(tp, flag);
442
443 s = spltty();
444
445 if (tp->t_cflag & HUPCL || tp->t_state & TS_WOPEN ||
446 (tp->t_state & TS_ISOPEN) == 0)
447 (void) dcmmctl(dev, MO_OFF, DMSET);
448 #ifdef DEBUG
449 if (dcmdebug & DDB_OPENCLOSE)
450 printf("dcmclose: u %x st %x fl %x\n",
451 unit, tp->t_state, tp->t_flags);
452 #endif
453 splx(s);
454 ttyclose(tp);
455 #if 0
456 ttyfree(tp);
457 dcm_tty[unit] = (struct tty *)0;
458 #endif
459 return (0);
460 }
461
462 int
463 dcmread(dev, uio, flag)
464 dev_t dev;
465 struct uio *uio;
466 int flag;
467 {
468 register struct tty *tp = dcm_tty[UNIT(dev)];
469
470 return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
471 }
472
473 int
474 dcmwrite(dev, uio, flag)
475 dev_t dev;
476 struct uio *uio;
477 int flag;
478 {
479 register struct tty *tp = dcm_tty[UNIT(dev)];
480
481 return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
482 }
483
484 struct tty *
485 dcmtty(dev)
486 dev_t dev;
487 {
488
489 return (dcm_tty[UNIT(dev)]);
490 }
491
492 int
493 dcmintr(brd)
494 register int brd;
495 {
496 register struct dcmdevice *dcm = dcm_addr[brd];
497 register struct dcmischeme *dis;
498 register int unit = MKUNIT(brd, 0);
499 register int code, i;
500 int pcnd[4], mcode, mcnd[4];
501
502 /*
503 * Do all guarded register accesses right off to minimize
504 * block out of hardware.
505 */
506 SEM_LOCK(dcm);
507 if ((dcm->dcm_ic & IC_IR) == 0) {
508 SEM_UNLOCK(dcm);
509 return (0);
510 }
511 for (i = 0; i < 4; i++) {
512 pcnd[i] = dcm->dcm_icrtab[i].dcm_data;
513 dcm->dcm_icrtab[i].dcm_data = 0;
514 code = dcm_modem[unit+i]->mdmin;
515 if (dcmsoftCAR[brd] & FLAG_STDDCE)
516 code = hp2dce_in(code);
517 mcnd[i] = code;
518 }
519 code = dcm->dcm_iir & IIR_MASK;
520 dcm->dcm_iir = 0; /* XXX doc claims read clears interrupt?! */
521 mcode = dcm->dcm_modemintr;
522 dcm->dcm_modemintr = 0;
523 SEM_UNLOCK(dcm);
524
525 #ifdef DEBUG
526 if (dcmdebug & DDB_INTR) {
527 printf("dcmintr(%d): iir %x pc %x/%x/%x/%x ",
528 brd, code, pcnd[0], pcnd[1], pcnd[2], pcnd[3]);
529 printf("miir %x mc %x/%x/%x/%x\n",
530 mcode, mcnd[0], mcnd[1], mcnd[2], mcnd[3]);
531 }
532 #endif
533 if (code & IIR_TIMEO)
534 dcmrint(brd, dcm);
535 if (code & IIR_PORT0)
536 dcmpint(unit+0, pcnd[0], dcm);
537 if (code & IIR_PORT1)
538 dcmpint(unit+1, pcnd[1], dcm);
539 if (code & IIR_PORT2)
540 dcmpint(unit+2, pcnd[2], dcm);
541 if (code & IIR_PORT3)
542 dcmpint(unit+3, pcnd[3], dcm);
543 if (code & IIR_MODM) {
544 if (mcode == 0 || mcode & 0x1) /* mcode==0 -> 98642 board */
545 dcmmint(unit+0, mcnd[0], dcm);
546 if (mcode & 0x2)
547 dcmmint(unit+1, mcnd[1], dcm);
548 if (mcode & 0x4)
549 dcmmint(unit+2, mcnd[2], dcm);
550 if (mcode & 0x8)
551 dcmmint(unit+3, mcnd[3], dcm);
552 }
553
554 dis = &dcmischeme[brd];
555 /*
556 * Chalk up a receiver interrupt if the timer running or one of
557 * the ports reports a special character interrupt.
558 */
559 if ((code & IIR_TIMEO) ||
560 ((pcnd[0]|pcnd[1]|pcnd[2]|pcnd[3]) & IT_SPEC))
561 dis->dis_intr++;
562 /*
563 * See if it is time to check/change the interrupt rate.
564 */
565 if (dcmistype < 0 &&
566 (i = time.tv_sec - dis->dis_time) >= dcminterval) {
567 /*
568 * If currently per-character and averaged over 70 interrupts
569 * per-second (66 is threshold of 600 baud) in last interval,
570 * switch to timer mode.
571 *
572 * XXX decay counts ala load average to avoid spikes?
573 */
574 if (dis->dis_perchar && dis->dis_intr > 70 * i)
575 dcmsetischeme(brd, DIS_TIMER);
576 /*
577 * If currently using timer and had more interrupts than
578 * received characters in the last interval, switch back
579 * to per-character. Note that after changing to per-char
580 * we must process any characters already in the queue
581 * since they may have arrived before the bitmap was setup.
582 *
583 * XXX decay counts?
584 */
585 else if (!dis->dis_perchar && dis->dis_intr > dis->dis_char) {
586 dcmsetischeme(brd, DIS_PERCHAR);
587 dcmrint(brd, dcm);
588 }
589 dis->dis_intr = dis->dis_char = 0;
590 dis->dis_time = time.tv_sec;
591 }
592 return (1);
593 }
594
595 /*
596 * Port interrupt. Can be two things:
597 * First, it might be a special character (exception interrupt);
598 * Second, it may be a buffer empty (transmit interrupt);
599 */
600 dcmpint(unit, code, dcm)
601 int unit, code;
602 struct dcmdevice *dcm;
603 {
604 struct tty *tp = dcm_tty[unit];
605
606 if (code & IT_SPEC)
607 dcmreadbuf(unit, dcm, tp);
608 if (code & IT_TX)
609 dcmxint(unit, dcm, tp);
610 }
611
612 dcmrint(brd, dcm)
613 int brd;
614 register struct dcmdevice *dcm;
615 {
616 register int i, unit;
617 register struct tty *tp;
618
619 unit = MKUNIT(brd, 0);
620 tp = dcm_tty[unit];
621 for (i = 0; i < 4; i++, tp++, unit++)
622 dcmreadbuf(unit, dcm, tp);
623 }
624
625 dcmreadbuf(unit, dcm, tp)
626 int unit;
627 register struct dcmdevice *dcm;
628 register struct tty *tp;
629 {
630 int port = PORT(unit);
631 register struct dcmpreg *pp = dcm_preg(dcm, port);
632 register struct dcmrfifo *fifo;
633 register int c, stat;
634 register unsigned head;
635 int nch = 0;
636 #ifdef DCMSTATS
637 struct dcmstats *dsp = &dcmstats[BOARD(unit)];
638
639 dsp->rints++;
640 #endif
641 if ((tp->t_state & TS_ISOPEN) == 0) {
642 #ifdef KGDB
643 if ((makedev(dcmmajor, unit) == kgdb_dev) &&
644 (head = pp->r_head & RX_MASK) != (pp->r_tail & RX_MASK) &&
645 dcm->dcm_rfifos[3-port][head>>1].data_char == FRAME_START) {
646 pp->r_head = (head + 2) & RX_MASK;
647 kgdb_connect(0); /* trap into kgdb */
648 return;
649 }
650 #endif /* KGDB */
651 pp->r_head = pp->r_tail & RX_MASK;
652 return;
653 }
654
655 head = pp->r_head & RX_MASK;
656 fifo = &dcm->dcm_rfifos[3-port][head>>1];
657 /*
658 * XXX upper bound on how many chars we will take in one swallow?
659 */
660 while (head != (pp->r_tail & RX_MASK)) {
661 /*
662 * Get character/status and update head pointer as fast
663 * as possible to make room for more characters.
664 */
665 c = fifo->data_char;
666 stat = fifo->data_stat;
667 head = (head + 2) & RX_MASK;
668 pp->r_head = head;
669 fifo = head ? fifo+1 : &dcm->dcm_rfifos[3-port][0];
670 nch++;
671
672 #ifdef DEBUG
673 if (dcmdebug & DDB_INPUT)
674 printf("dcmreadbuf(%d): c%x('%c') s%x f%x h%x t%x\n",
675 unit, c&0xFF, c, stat&0xFF,
676 tp->t_flags, head, pp->r_tail);
677 #endif
678 /*
679 * Check for and handle errors
680 */
681 if (stat & RD_MASK) {
682 #ifdef DEBUG
683 if (dcmdebug & (DDB_INPUT|DDB_SIOERR))
684 printf("dcmreadbuf(%d): err: c%x('%c') s%x\n",
685 unit, stat, c&0xFF, c);
686 #endif
687 if (stat & (RD_BD | RD_FE))
688 c |= TTY_FE;
689 else if (stat & RD_PE)
690 c |= TTY_PE;
691 else if (stat & RD_OVF)
692 log(LOG_WARNING,
693 "dcm%d: silo overflow\n", unit);
694 else if (stat & RD_OE)
695 log(LOG_WARNING,
696 "dcm%d: uart overflow\n", unit);
697 }
698 (*linesw[tp->t_line].l_rint)(c, tp);
699 }
700 dcmischeme[BOARD(unit)].dis_char += nch;
701 #ifdef DCMSTATS
702 dsp->rchars += nch;
703 if (nch <= DCMRBSIZE)
704 dsp->rsilo[nch]++;
705 else
706 dsp->rsilo[DCMRBSIZE+1]++;
707 #endif
708 }
709
710 dcmxint(unit, dcm, tp)
711 int unit;
712 struct dcmdevice *dcm;
713 register struct tty *tp;
714 {
715 tp->t_state &= ~TS_BUSY;
716 if (tp->t_state & TS_FLUSH)
717 tp->t_state &= ~TS_FLUSH;
718 (*linesw[tp->t_line].l_start)(tp);
719 }
720
721 dcmmint(unit, mcnd, dcm)
722 register int unit;
723 register struct dcmdevice *dcm;
724 int mcnd;
725 {
726 register struct tty *tp;
727 int delta;
728
729 #ifdef DEBUG
730 if (dcmdebug & DDB_MODEM)
731 printf("dcmmint: port %d mcnd %x mcndlast %x\n",
732 unit, mcnd, mcndlast[unit]);
733 #endif
734 tp = dcm_tty[unit];
735 delta = mcnd ^ mcndlast[unit];
736 mcndlast[unit] = mcnd;
737 if ((delta & MI_CTS) && (tp->t_state & TS_ISOPEN) &&
738 (tp->t_flags & CCTS_OFLOW)) {
739 if (mcnd & MI_CTS) {
740 tp->t_state &= ~TS_TTSTOP;
741 ttstart(tp);
742 } else
743 tp->t_state |= TS_TTSTOP; /* inline dcmstop */
744 }
745 if (delta & MI_CD) {
746 if (mcnd & MI_CD)
747 (void)(*linesw[tp->t_line].l_modem)(tp, 1);
748 else if ((dcmsoftCAR[BOARD(unit)] & (1 << PORT(unit))) == 0 &&
749 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) {
750 dcm_modem[unit]->mdmout = MO_OFF;
751 SEM_LOCK(dcm);
752 dcm->dcm_modemchng |= 1<<(unit & 3);
753 dcm->dcm_cr |= CR_MODM;
754 SEM_UNLOCK(dcm);
755 DELAY(10); /* time to change lines */
756 }
757 }
758 }
759
760 int
761 dcmioctl(dev, cmd, data, flag, p)
762 dev_t dev;
763 int cmd;
764 caddr_t data;
765 int flag;
766 struct proc *p;
767 {
768 register struct tty *tp;
769 register int unit = UNIT(dev);
770 register struct dcmdevice *dcm;
771 register int board, port;
772 int error, s;
773
774 #ifdef DEBUG
775 if (dcmdebug & DDB_IOCTL)
776 printf("dcmioctl: unit %d cmd %x data %x flag %x\n",
777 unit, cmd, *data, flag);
778 #endif
779 tp = dcm_tty[unit];
780 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
781 if (error >= 0)
782 return (error);
783 error = ttioctl(tp, cmd, data, flag, p);
784 if (error >= 0)
785 return (error);
786
787 port = PORT(unit);
788 board = BOARD(unit);
789 dcm = dcm_addr[board];
790 switch (cmd) {
791 case TIOCSBRK:
792 /*
793 * Wait for transmitter buffer to empty
794 */
795 s = spltty();
796 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
797 DELAY(DCM_USPERCH(tp->t_ospeed));
798 SEM_LOCK(dcm);
799 dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
800 dcm->dcm_cr |= (1 << port); /* start break */
801 SEM_UNLOCK(dcm);
802 splx(s);
803 break;
804
805 case TIOCCBRK:
806 SEM_LOCK(dcm);
807 dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
808 dcm->dcm_cr |= (1 << port); /* end break */
809 SEM_UNLOCK(dcm);
810 break;
811
812 case TIOCSDTR:
813 (void) dcmmctl(dev, MO_ON, DMBIS);
814 break;
815
816 case TIOCCDTR:
817 (void) dcmmctl(dev, MO_ON, DMBIC);
818 break;
819
820 case TIOCMSET:
821 (void) dcmmctl(dev, *(int *)data, DMSET);
822 break;
823
824 case TIOCMBIS:
825 (void) dcmmctl(dev, *(int *)data, DMBIS);
826 break;
827
828 case TIOCMBIC:
829 (void) dcmmctl(dev, *(int *)data, DMBIC);
830 break;
831
832 case TIOCMGET:
833 *(int *)data = dcmmctl(dev, 0, DMGET);
834 break;
835
836 case TIOCGFLAGS: {
837 int bits = 0;
838
839 if ((dcmsoftCAR[board] & (1 << port)))
840 bits |= TIOCFLAG_SOFTCAR;
841
842 if (tp->t_cflag & CLOCAL)
843 bits |= TIOCFLAG_CLOCAL;
844
845 *(int *)data = bits;
846 break;
847 }
848
849 case TIOCSFLAGS: {
850 int userbits;
851
852 error = suser(p->p_ucred, &p->p_acflag);
853 if (error)
854 return (EPERM);
855
856 userbits = *(int *)data;
857
858 if ((userbits & TIOCFLAG_SOFTCAR) ||
859 ((board == BOARD(dcmconsole)) &&
860 (port == PORT(dcmconsole))))
861 dcmsoftCAR[board] |= (1 << port);
862
863 if (userbits & TIOCFLAG_CLOCAL)
864 tp->t_cflag |= CLOCAL;
865
866 break;
867 }
868
869 default:
870 return (ENOTTY);
871 }
872 return (0);
873 }
874
875 int
876 dcmparam(tp, t)
877 register struct tty *tp;
878 register struct termios *t;
879 {
880 register struct dcmdevice *dcm;
881 register int port, mode, cflag = t->c_cflag;
882 int ospeed = ttspeedtab(t->c_ospeed, dcmspeedtab);
883
884 /* check requested parameters */
885 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
886 return (EINVAL);
887 /* and copy to tty */
888 tp->t_ispeed = t->c_ispeed;
889 tp->t_ospeed = t->c_ospeed;
890 tp->t_cflag = cflag;
891 if (ospeed == 0) {
892 (void) dcmmctl(UNIT(tp->t_dev), MO_OFF, DMSET);
893 return (0);
894 }
895
896 mode = 0;
897 switch (cflag&CSIZE) {
898 case CS5:
899 mode = LC_5BITS; break;
900 case CS6:
901 mode = LC_6BITS; break;
902 case CS7:
903 mode = LC_7BITS; break;
904 case CS8:
905 mode = LC_8BITS; break;
906 }
907 if (cflag&PARENB) {
908 if (cflag&PARODD)
909 mode |= LC_PODD;
910 else
911 mode |= LC_PEVEN;
912 }
913 if (cflag&CSTOPB)
914 mode |= LC_2STOP;
915 else
916 mode |= LC_1STOP;
917 #ifdef DEBUG
918 if (dcmdebug & DDB_PARAM)
919 printf("dcmparam(%d): cflag %x mode %x speed %d uperch %d\n",
920 UNIT(tp->t_dev), cflag, mode, tp->t_ospeed,
921 DCM_USPERCH(tp->t_ospeed));
922 #endif
923
924 port = PORT(tp->t_dev);
925 dcm = dcm_addr[BOARD(tp->t_dev)];
926 /*
927 * Wait for transmitter buffer to empty.
928 */
929 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
930 DELAY(DCM_USPERCH(tp->t_ospeed));
931 /*
932 * Make changes known to hardware.
933 */
934 dcm->dcm_data[port].dcm_baud = ospeed;
935 dcm->dcm_data[port].dcm_conf = mode;
936 SEM_LOCK(dcm);
937 dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
938 dcm->dcm_cr |= (1 << port);
939 SEM_UNLOCK(dcm);
940 /*
941 * Delay for config change to take place. Weighted by baud.
942 * XXX why do we do this?
943 */
944 DELAY(16 * DCM_USPERCH(tp->t_ospeed));
945 return (0);
946 }
947
948 void
949 dcmstart(tp)
950 register struct tty *tp;
951 {
952 register struct dcmdevice *dcm;
953 register struct dcmpreg *pp;
954 register struct dcmtfifo *fifo;
955 register char *bp;
956 register unsigned tail, next;
957 register int port, nch;
958 unsigned head;
959 char buf[16];
960 int s;
961 #ifdef DCMSTATS
962 struct dcmstats *dsp = &dcmstats[BOARD(tp->t_dev)];
963 int tch = 0;
964 #endif
965
966 s = spltty();
967 #ifdef DCMSTATS
968 dsp->xints++;
969 #endif
970 #ifdef DEBUG
971 if (dcmdebug & DDB_OUTPUT)
972 printf("dcmstart(%d): state %x flags %x outcc %d\n",
973 UNIT(tp->t_dev), tp->t_state, tp->t_flags,
974 tp->t_outq.c_cc);
975 #endif
976 if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
977 goto out;
978 if (tp->t_outq.c_cc <= tp->t_lowat) {
979 if (tp->t_state&TS_ASLEEP) {
980 tp->t_state &= ~TS_ASLEEP;
981 wakeup((caddr_t)&tp->t_outq);
982 }
983 selwakeup(&tp->t_wsel);
984 }
985 if (tp->t_outq.c_cc == 0) {
986 #ifdef DCMSTATS
987 dsp->xempty++;
988 #endif
989 goto out;
990 }
991
992 dcm = dcm_addr[BOARD(tp->t_dev)];
993 port = PORT(tp->t_dev);
994 pp = dcm_preg(dcm, port);
995 tail = pp->t_tail & TX_MASK;
996 next = (tail + 1) & TX_MASK;
997 head = pp->t_head & TX_MASK;
998 if (head == next)
999 goto out;
1000 fifo = &dcm->dcm_tfifos[3-port][tail];
1001 again:
1002 nch = q_to_b(&tp->t_outq, buf, (head - next) & TX_MASK);
1003 #ifdef DCMSTATS
1004 tch += nch;
1005 #endif
1006 #ifdef DEBUG
1007 if (dcmdebug & DDB_OUTPUT)
1008 printf("\thead %x tail %x nch %d\n", head, tail, nch);
1009 #endif
1010 /*
1011 * Loop transmitting all the characters we can.
1012 */
1013 for (bp = buf; --nch >= 0; bp++) {
1014 fifo->data_char = *bp;
1015 pp->t_tail = next;
1016 /*
1017 * If this is the first character,
1018 * get the hardware moving right now.
1019 */
1020 if (bp == buf) {
1021 tp->t_state |= TS_BUSY;
1022 SEM_LOCK(dcm);
1023 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
1024 dcm->dcm_cr |= (1 << port);
1025 SEM_UNLOCK(dcm);
1026 }
1027 tail = next;
1028 fifo = tail ? fifo+1 : &dcm->dcm_tfifos[3-port][0];
1029 next = (next + 1) & TX_MASK;
1030 }
1031 /*
1032 * Head changed while we were loading the buffer,
1033 * go back and load some more if we can.
1034 */
1035 if (tp->t_outq.c_cc && head != (pp->t_head & TX_MASK)) {
1036 #ifdef DCMSTATS
1037 dsp->xrestarts++;
1038 #endif
1039 head = pp->t_head & TX_MASK;
1040 goto again;
1041 }
1042
1043 /*
1044 * Kick it one last time in case it finished while we were
1045 * loading the last bunch.
1046 */
1047 if (bp > &buf[1]) {
1048 tp->t_state |= TS_BUSY;
1049 SEM_LOCK(dcm);
1050 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
1051 dcm->dcm_cr |= (1 << port);
1052 SEM_UNLOCK(dcm);
1053 }
1054 #ifdef DEBUG
1055 if (dcmdebug & DDB_INTR)
1056 printf("dcmstart(%d): head %x tail %x outqcc %d\n",
1057 UNIT(tp->t_dev), head, tail, tp->t_outq.c_cc);
1058 #endif
1059 out:
1060 #ifdef DCMSTATS
1061 dsp->xchars += tch;
1062 if (tch <= DCMXBSIZE)
1063 dsp->xsilo[tch]++;
1064 else
1065 dsp->xsilo[DCMXBSIZE+1]++;
1066 #endif
1067 splx(s);
1068 }
1069
1070 /*
1071 * Stop output on a line.
1072 */
1073 int
1074 dcmstop(tp, flag)
1075 register struct tty *tp;
1076 int flag;
1077 {
1078 int s;
1079
1080 s = spltty();
1081 if (tp->t_state & TS_BUSY) {
1082 /* XXX is there some way to safely stop transmission? */
1083 if ((tp->t_state&TS_TTSTOP) == 0)
1084 tp->t_state |= TS_FLUSH;
1085 }
1086 splx(s);
1087 }
1088
1089 /*
1090 * Modem control
1091 */
1092 dcmmctl(dev, bits, how)
1093 dev_t dev;
1094 int bits, how;
1095 {
1096 register struct dcmdevice *dcm;
1097 int s, unit, brd, hit = 0;
1098
1099 unit = UNIT(dev);
1100 #ifdef DEBUG
1101 if (dcmdebug & DDB_MODEM)
1102 printf("dcmmctl(%d) unit %d bits 0x%x how %x\n",
1103 BOARD(unit), unit, bits, how);
1104 #endif
1105
1106 brd = BOARD(unit);
1107 dcm = dcm_addr[brd];
1108 s = spltty();
1109 switch (how) {
1110
1111 case DMSET:
1112 dcm_modem[unit]->mdmout = bits;
1113 hit++;
1114 break;
1115
1116 case DMBIS:
1117 dcm_modem[unit]->mdmout |= bits;
1118 hit++;
1119 break;
1120
1121 case DMBIC:
1122 dcm_modem[unit]->mdmout &= ~bits;
1123 hit++;
1124 break;
1125
1126 case DMGET:
1127 bits = dcm_modem[unit]->mdmin;
1128 if (dcmsoftCAR[brd] & FLAG_STDDCE)
1129 bits = hp2dce_in(bits);
1130 break;
1131 }
1132 if (hit) {
1133 SEM_LOCK(dcm);
1134 dcm->dcm_modemchng |= 1<<(unit & 3);
1135 dcm->dcm_cr |= CR_MODM;
1136 SEM_UNLOCK(dcm);
1137 DELAY(10); /* delay until done */
1138 (void) splx(s);
1139 }
1140 return (bits);
1141 }
1142
1143 /*
1144 * Set board to either interrupt per-character or at a fixed interval.
1145 */
1146 dcmsetischeme(brd, flags)
1147 int brd, flags;
1148 {
1149 register struct dcmdevice *dcm = dcm_addr[brd];
1150 register struct dcmischeme *dis = &dcmischeme[brd];
1151 register int i;
1152 u_char mask;
1153 int perchar = flags & DIS_PERCHAR;
1154
1155 #ifdef DEBUG
1156 if (dcmdebug & DDB_INTSCHM)
1157 printf("dcmsetischeme(%d, %d): cur %d, ints %d, chars %d\n",
1158 brd, perchar, dis->dis_perchar,
1159 dis->dis_intr, dis->dis_char);
1160 if ((flags & DIS_RESET) == 0 && perchar == dis->dis_perchar) {
1161 printf("dcmsetischeme(%d): redundent request %d\n",
1162 brd, perchar);
1163 return;
1164 }
1165 #endif
1166 /*
1167 * If perchar is non-zero, we enable interrupts on all characters
1168 * otherwise we disable perchar interrupts and use periodic
1169 * polling interrupts.
1170 */
1171 dis->dis_perchar = perchar;
1172 mask = perchar ? 0xf : 0x0;
1173 for (i = 0; i < 256; i++)
1174 dcm->dcm_bmap[i].data_data = mask;
1175 /*
1176 * Don't slow down tandem mode, interrupt on flow control
1177 * chars for any port on the board.
1178 */
1179 if (!perchar) {
1180 register struct tty *tp = dcm_tty[MKUNIT(brd, 0)];
1181 int c;
1182
1183 for (i = 0; i < 4; i++, tp++) {
1184 if ((c = tp->t_cc[VSTART]) != _POSIX_VDISABLE)
1185 dcm->dcm_bmap[c].data_data |= (1 << i);
1186 if ((c = tp->t_cc[VSTOP]) != _POSIX_VDISABLE)
1187 dcm->dcm_bmap[c].data_data |= (1 << i);
1188 }
1189 }
1190 /*
1191 * Board starts with timer disabled so if first call is to
1192 * set perchar mode then we don't want to toggle the timer.
1193 */
1194 if (flags == (DIS_RESET|DIS_PERCHAR))
1195 return;
1196 /*
1197 * Toggle card 16.7ms interrupts (we first make sure that card
1198 * has cleared the bit so it will see the toggle).
1199 */
1200 while (dcm->dcm_cr & CR_TIMER)
1201 ;
1202 SEM_LOCK(dcm);
1203 dcm->dcm_cr |= CR_TIMER;
1204 SEM_UNLOCK(dcm);
1205 }
1206
1207 /*
1208 * Following are all routines needed for DCM to act as console
1209 */
1210 #include <dev/cons.h>
1211
1212 void
1213 dcmcnprobe(cp)
1214 struct consdev *cp;
1215 {
1216 register struct hp_hw *hw;
1217 int unit;
1218
1219 /* locate the major number */
1220 for (dcmmajor = 0; dcmmajor < nchrdev; dcmmajor++)
1221 if (cdevsw[dcmmajor].d_open == dcmopen)
1222 break;
1223
1224 /*
1225 * Implicitly assigns the lowest select code DCM card found to be
1226 * logical unit 0 (actually CONUNIT). If your config file does
1227 * anything different, you're screwed.
1228 */
1229 for (hw = sc_table; hw->hw_type; hw++)
1230 if (HW_ISDEV(hw, D_COMMDCM) && !badaddr((short *)hw->hw_kva))
1231 break;
1232 if (!HW_ISDEV(hw, D_COMMDCM)) {
1233 cp->cn_pri = CN_DEAD;
1234 return;
1235 }
1236 unit = CONUNIT;
1237 dcm_addr[BOARD(CONUNIT)] = (struct dcmdevice *)hw->hw_kva;
1238
1239 /* initialize required fields */
1240 cp->cn_dev = makedev(dcmmajor, unit);
1241 switch (dcm_addr[BOARD(unit)]->dcm_rsid) {
1242 case DCMID:
1243 cp->cn_pri = CN_NORMAL;
1244 break;
1245 case DCMID|DCMCON:
1246 cp->cn_pri = CN_REMOTE;
1247 break;
1248 default:
1249 cp->cn_pri = CN_DEAD;
1250 return;
1251 }
1252 /*
1253 * If dcmconsole is initialized, raise our priority.
1254 */
1255 if (dcmconsole == UNIT(unit))
1256 cp->cn_pri = CN_REMOTE;
1257 #ifdef KGDB_CHEAT
1258 /*
1259 * This doesn't currently work, at least not with ite consoles;
1260 * the console hasn't been initialized yet.
1261 */
1262 if (major(kgdb_dev) == dcmmajor && BOARD(kgdb_dev) == BOARD(unit)) {
1263 (void) dcminit(kgdb_dev, kgdb_rate);
1264 if (kgdb_debug_init) {
1265 /*
1266 * We assume that console is ready for us...
1267 * this assumes that a dca or ite console
1268 * has been selected already and will init
1269 * on the first putc.
1270 */
1271 printf("dcm%d: ", UNIT(kgdb_dev));
1272 kgdb_connect(1);
1273 }
1274 }
1275 #endif
1276 }
1277
1278 void
1279 dcmcninit(cp)
1280 struct consdev *cp;
1281 {
1282 dcminit(cp->cn_dev, dcmdefaultrate);
1283 dcmconsinit = 1;
1284 dcmconsole = UNIT(cp->cn_dev);
1285 }
1286
1287 dcminit(dev, rate)
1288 dev_t dev;
1289 int rate;
1290 {
1291 register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
1292 int s, mode, port;
1293
1294 port = PORT(dev);
1295 mode = LC_8BITS | LC_1STOP;
1296 s = splhigh();
1297 /*
1298 * Wait for transmitter buffer to empty.
1299 */
1300 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
1301 DELAY(DCM_USPERCH(rate));
1302 /*
1303 * Make changes known to hardware.
1304 */
1305 dcm->dcm_data[port].dcm_baud = ttspeedtab(rate, dcmspeedtab);
1306 dcm->dcm_data[port].dcm_conf = mode;
1307 SEM_LOCK(dcm);
1308 dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
1309 dcm->dcm_cr |= (1 << port);
1310 SEM_UNLOCK(dcm);
1311 /*
1312 * Delay for config change to take place. Weighted by baud.
1313 * XXX why do we do this?
1314 */
1315 DELAY(16 * DCM_USPERCH(rate));
1316 splx(s);
1317 }
1318
1319 int
1320 dcmcngetc(dev)
1321 dev_t dev;
1322 {
1323 register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
1324 register struct dcmrfifo *fifo;
1325 register struct dcmpreg *pp;
1326 register unsigned head;
1327 int s, c, stat, port;
1328
1329 port = PORT(dev);
1330 pp = dcm_preg(dcm, port);
1331 s = splhigh();
1332 head = pp->r_head & RX_MASK;
1333 fifo = &dcm->dcm_rfifos[3-port][head>>1];
1334 while (head == (pp->r_tail & RX_MASK))
1335 ;
1336 /*
1337 * If board interrupts are enabled, just let our received char
1338 * interrupt through in case some other port on the board was
1339 * busy. Otherwise we must clear the interrupt.
1340 */
1341 SEM_LOCK(dcm);
1342 if ((dcm->dcm_ic & IC_IE) == 0)
1343 stat = dcm->dcm_iir;
1344 SEM_UNLOCK(dcm);
1345 c = fifo->data_char;
1346 stat = fifo->data_stat;
1347 pp->r_head = (head + 2) & RX_MASK;
1348 splx(s);
1349 return (c);
1350 }
1351
1352 /*
1353 * Console kernel output character routine.
1354 */
1355 void
1356 dcmcnputc(dev, c)
1357 dev_t dev;
1358 int c;
1359 {
1360 register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
1361 register struct dcmpreg *pp;
1362 unsigned tail;
1363 int s, port, stat;
1364
1365 port = PORT(dev);
1366 pp = dcm_preg(dcm, port);
1367 s = splhigh();
1368 #ifdef KGDB
1369 if (dev != kgdb_dev)
1370 #endif
1371 if (dcmconsinit == 0) {
1372 (void) dcminit(dev, dcmdefaultrate);
1373 dcmconsinit = 1;
1374 }
1375 tail = pp->t_tail & TX_MASK;
1376 while (tail != (pp->t_head & TX_MASK))
1377 ;
1378 dcm->dcm_tfifos[3-port][tail].data_char = c;
1379 pp->t_tail = tail = (tail + 1) & TX_MASK;
1380 SEM_LOCK(dcm);
1381 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
1382 dcm->dcm_cr |= (1 << port);
1383 SEM_UNLOCK(dcm);
1384 while (tail != (pp->t_head & TX_MASK))
1385 ;
1386 /*
1387 * If board interrupts are enabled, just let our completion
1388 * interrupt through in case some other port on the board
1389 * was busy. Otherwise we must clear the interrupt.
1390 */
1391 if ((dcm->dcm_ic & IC_IE) == 0) {
1392 SEM_LOCK(dcm);
1393 stat = dcm->dcm_iir;
1394 SEM_UNLOCK(dcm);
1395 }
1396 splx(s);
1397 }
1398 #endif
1399