dcm.c revision 1.24
1 /* $NetBSD: dcm.c,v 1.24 1996/02/24 00:55:03 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Jason R. Thorpe. All rights reserved. 5 * Copyright (c) 1988 University of Utah. 6 * Copyright (c) 1982, 1986, 1990, 1993 7 * The Regents of the University of California. All rights reserved. 8 * 9 * This code is derived from software contributed to Berkeley by 10 * the Systems Programming Group of the University of Utah Computer 11 * Science Department. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by the University of 24 * California, Berkeley and its contributors. 25 * 4. Neither the name of the University nor the names of its contributors 26 * may be used to endorse or promote products derived from this software 27 * without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * from Utah: $Hdr: dcm.c 1.29 92/01/21$ 42 * 43 * @(#)dcm.c 8.4 (Berkeley) 1/12/94 44 */ 45 46 /* 47 * TODO: 48 * Timeouts 49 * Test console support. 50 */ 51 52 #include "dcm.h" 53 #if NDCM > 0 54 /* 55 * 98642/MUX 56 */ 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/ioctl.h> 60 #include <sys/proc.h> 61 #include <sys/tty.h> 62 #include <sys/conf.h> 63 #include <sys/file.h> 64 #include <sys/uio.h> 65 #include <sys/kernel.h> 66 #include <sys/syslog.h> 67 #include <sys/time.h> 68 69 #include <machine/autoconf.h> 70 #include <machine/cpu.h> 71 72 #include <dev/cons.h> 73 74 #include <hp300/dev/device.h> 75 #include <hp300/dev/dcmreg.h> 76 #include <hp300/hp300/isr.h> 77 78 #ifndef DEFAULT_BAUD_RATE 79 #define DEFAULT_BAUD_RATE 9600 80 #endif 81 82 int dcmmatch(), dcmparam(); 83 void dcmattach(), dcmstart(); 84 struct driver dcmdriver = { 85 dcmmatch, dcmattach, "dcm", 86 }; 87 88 struct speedtab dcmspeedtab[] = { 89 0, BR_0, 90 50, BR_50, 91 75, BR_75, 92 110, BR_110, 93 134, BR_134, 94 150, BR_150, 95 300, BR_300, 96 600, BR_600, 97 1200, BR_1200, 98 1800, BR_1800, 99 2400, BR_2400, 100 4800, BR_4800, 101 9600, BR_9600, 102 19200, BR_19200, 103 38400, BR_38400, 104 -1, -1 105 }; 106 107 /* u-sec per character based on baudrate (assumes 1 start/8 data/1 stop bit) */ 108 #define DCM_USPERCH(s) (10000000 / (s)) 109 110 /* 111 * Per board interrupt scheme. 16.7ms is the polling interrupt rate 112 * (16.7ms is about 550 baud, 38.4k is 72 chars in 16.7ms). 113 */ 114 #define DIS_TIMER 0 115 #define DIS_PERCHAR 1 116 #define DIS_RESET 2 117 118 int dcmistype = -1; /* -1 == dynamic, 0 == timer, 1 == perchar */ 119 int dcminterval = 5; /* interval (secs) between checks */ 120 struct dcmischeme { 121 int dis_perchar; /* non-zero if interrupting per char */ 122 long dis_time; /* last time examined */ 123 int dis_intr; /* recv interrupts during last interval */ 124 int dis_char; /* characters read during last interval */ 125 }; 126 127 /* 128 * Stuff for DCM console support. This could probably be done a little 129 * better. 130 */ 131 static struct dcmdevice *dcm_cn = NULL; /* pointer to hardware */ 132 static int dcm_lastcnpri = CN_DEAD; /* XXX last priority */ 133 static int dcmconsinit; /* has been initialized */ 134 135 int dcmdefaultrate = DEFAULT_BAUD_RATE; 136 int dcmconbrdbusy = 0; 137 int dcmmajor; 138 139 #ifdef KGDB 140 /* 141 * Kernel GDB support 142 */ 143 #include <machine/remote-sl.h> 144 145 extern dev_t kgdb_dev; 146 extern int kgdb_rate; 147 extern int kgdb_debug_init; 148 #endif 149 150 /* #define DCMSTATS */ 151 152 #ifdef DEBUG 153 int dcmdebug = 0x0; 154 #define DDB_SIOERR 0x01 155 #define DDB_PARAM 0x02 156 #define DDB_INPUT 0x04 157 #define DDB_OUTPUT 0x08 158 #define DDB_INTR 0x10 159 #define DDB_IOCTL 0x20 160 #define DDB_INTSCHM 0x40 161 #define DDB_MODEM 0x80 162 #define DDB_OPENCLOSE 0x100 163 #endif 164 165 #ifdef DCMSTATS 166 #define DCMRBSIZE 94 167 #define DCMXBSIZE 24 168 169 struct dcmstats { 170 long xints; /* # of xmit ints */ 171 long xchars; /* # of xmit chars */ 172 long xempty; /* times outq is empty in dcmstart */ 173 long xrestarts; /* times completed while xmitting */ 174 long rints; /* # of recv ints */ 175 long rchars; /* # of recv chars */ 176 long xsilo[DCMXBSIZE+2]; /* times this many chars xmit on one int */ 177 long rsilo[DCMRBSIZE+2]; /* times this many chars read on one int */ 178 }; 179 #endif 180 181 #define DCMUNIT(x) minor(x) 182 #define DCMBOARD(x) (((x) >> 2) & 0x3f) 183 #define DCMPORT(x) ((x) & 3) 184 185 /* 186 * Conversion from "HP DCE" to almost-normal DCE: on the 638 8-port mux, 187 * the distribution panel uses "HP DCE" conventions. If requested via 188 * the device flags, we swap the inputs to something closer to normal DCE, 189 * allowing a straight-through cable to a DTE or a reversed cable 190 * to a DCE (reversing 2-3, 4-5, 8-20 and leaving 6 unconnected; 191 * this gets "DCD" on pin 20 and "CTS" on 4, but doesn't connect 192 * DSR or make RTS work, though). The following gives the full 193 * details of a cable from this mux panel to a modem: 194 * 195 * HP modem 196 * name pin pin name 197 * HP inputs: 198 * "Rx" 2 3 Tx 199 * CTS 4 5 CTS (only needed for CCTS_OFLOW) 200 * DCD 20 8 DCD 201 * "DSR" 9 6 DSR (unneeded) 202 * RI 22 22 RI (unneeded) 203 * 204 * HP outputs: 205 * "Tx" 3 2 Rx 206 * "DTR" 6 not connected 207 * "RTS" 8 20 DTR 208 * "SR" 23 4 RTS (often not needed) 209 */ 210 #define hp2dce_in(ibits) (iconv[(ibits) & 0xf]) 211 static char iconv[16] = { 212 0, MI_DM, MI_CTS, MI_CTS|MI_DM, 213 MI_CD, MI_CD|MI_DM, MI_CD|MI_CTS, MI_CD|MI_CTS|MI_DM, 214 MI_RI, MI_RI|MI_DM, MI_RI|MI_CTS, MI_RI|MI_CTS|MI_DM, 215 MI_RI|MI_CD, MI_RI|MI_CD|MI_DM, MI_RI|MI_CD|MI_CTS, 216 MI_RI|MI_CD|MI_CTS|MI_DM 217 }; 218 219 /* 220 * Note that 8-port boards appear as 2 4-port boards at consecutive 221 * select codes. 222 */ 223 #define NDCMPORT 4 224 225 struct dcm_softc { 226 struct hp_device *sc_hd; /* device info */ 227 struct dcmdevice *sc_dcm; /* pointer to hardware */ 228 struct tty *sc_tty[NDCMPORT]; /* our tty instances */ 229 struct modemreg *sc_modem[NDCMPORT]; /* modem control */ 230 char sc_mcndlast[NDCMPORT]; /* XXX last modem status for port */ 231 short sc_softCAR; /* mask of ports with soft-carrier */ 232 struct dcmischeme sc_scheme; /* interrupt scheme for board */ 233 234 /* 235 * Mask of soft-carrier bits in config flags. 236 */ 237 #define DCM_SOFTCAR 0x0000000f 238 239 int sc_flags; /* misc. configuration info */ 240 241 /* 242 * Bits for sc_flags 243 */ 244 #define DCM_ACTIVE 0x00000001 /* indicates board is alive */ 245 #define DCM_ISCONSOLE 0x00000002 /* indicates board is console */ 246 #define DCM_STDDCE 0x00000010 /* re-map DCE to standard */ 247 #define DCM_FLAGMASK (DCM_STDDCE) /* mask of valid bits in config flags */ 248 249 #ifdef DCMSTATS 250 struct dcmstats sc_stats; /* metrics gathering */ 251 #endif 252 } dcm_softc[NDCM]; 253 254 void dcminit __P((struct dcmdevice *, int, int)); 255 int dcmintr __P((void *)); 256 257 int 258 dcmmatch(hd) 259 register struct hp_device *hd; 260 { 261 struct dcm_softc *sc = &dcm_softc[hd->hp_unit]; 262 struct dcmdevice *dcm; 263 int i, timo = 0; 264 int s, brd, mbits; 265 266 dcm = (struct dcmdevice *)hd->hp_addr; 267 if ((dcm->dcm_rsid & 0x1f) != DCMID) 268 return (0); 269 270 brd = hd->hp_unit; 271 272 sc->sc_hd = hd; 273 hd->hp_ipl = DCMIPL(dcm->dcm_ic); 274 275 /* 276 * Empirically derived self-test magic 277 */ 278 s = spltty(); 279 dcm->dcm_rsid = DCMRS; 280 DELAY(50000); /* 5000 is not long enough */ 281 dcm->dcm_rsid = 0; 282 dcm->dcm_ic = IC_IE; 283 dcm->dcm_cr = CR_SELFT; 284 while ((dcm->dcm_ic & IC_IR) == 0) 285 if (++timo == 20000) 286 return (0); 287 DELAY(50000) /* XXX why is this needed ???? */ 288 while ((dcm->dcm_iir & IIR_SELFT) == 0) 289 if (++timo == 400000) 290 return (0); 291 DELAY(50000) /* XXX why is this needed ???? */ 292 if (dcm->dcm_stcon != ST_OK) { 293 if (hd->hp_args->hw_sc != conscode) 294 printf("dcm%d: self test failed: %x\n", 295 brd, dcm->dcm_stcon); 296 return (0); 297 } 298 dcm->dcm_ic = IC_ID; 299 splx(s); 300 301 return (1); 302 } 303 304 void 305 dcmattach(hd) 306 register struct hp_device *hd; 307 { 308 struct dcm_softc *sc = &dcm_softc[hd->hp_unit]; 309 struct dcmdevice *dcm; 310 int i, timo = 0; 311 int s, brd, mbits; 312 313 dcm = sc->sc_dcm = (struct dcmdevice *)hd->hp_addr; 314 315 brd = hd->hp_unit; 316 if (hd->hp_args->hw_sc == conscode) { 317 sc->sc_flags |= DCM_ISCONSOLE; 318 319 /* 320 * We didn't know which unit this would be during 321 * the console probe, so we have to fixup cn_dev here. 322 * Note that we always assume port 1 on the board. 323 */ 324 cn_tab->cn_dev = makedev(dcmmajor, (brd << 2) | DCMCONSPORT); 325 } 326 327 /* Extract configuration info from flags. */ 328 sc->sc_softCAR = (hd->hp_flags & DCM_SOFTCAR); 329 sc->sc_flags = (hd->hp_flags & DCM_FLAGMASK); 330 331 /* Mark our unit as configured. */ 332 sc->sc_flags |= DCM_ACTIVE; 333 334 /* Establish the interrupt handler. */ 335 isrlink(dcmintr, sc, hd->hp_ipl, ISRPRI_TTY); 336 337 if (dcmistype == DIS_TIMER) 338 dcmsetischeme(brd, DIS_RESET|DIS_TIMER); 339 else 340 dcmsetischeme(brd, DIS_RESET|DIS_PERCHAR); 341 342 /* load pointers to modem control */ 343 sc->sc_modem[0] = &dcm->dcm_modem0; 344 sc->sc_modem[1] = &dcm->dcm_modem1; 345 sc->sc_modem[2] = &dcm->dcm_modem2; 346 sc->sc_modem[3] = &dcm->dcm_modem3; 347 348 /* set DCD (modem) and CTS (flow control) on all ports */ 349 if (sc->sc_flags & DCM_STDDCE) 350 mbits = hp2dce_in(MI_CD|MI_CTS); 351 else 352 mbits = MI_CD|MI_CTS; 353 354 for (i = 0; i < NDCMPORT; i++) 355 sc->sc_modem[i]->mdmmsk = mbits; 356 357 dcm->dcm_ic = IC_IE; /* turn all interrupts on */ 358 359 /* 360 * Need to reset baud rate, etc. of next print so reset dcmconsinit. 361 * Also make sure console is always "hardwired" 362 */ 363 if (sc->sc_flags & DCM_ISCONSOLE) { 364 dcmconsinit = 0; 365 sc->sc_softCAR |= (1 << DCMCONSPORT); 366 printf(": console on port %d\n", DCMCONSPORT); 367 } else 368 printf("\n"); 369 370 #ifdef KGDB 371 if (major(kgdb_dev) == dcmmajor && 372 DCMBOARD(DCMUNIT(kgdb_dev)) == brd) { 373 if (dcmconsole == DCMUNIT(kgdb_dev)) /* XXX fixme */ 374 kgdb_dev = NODEV; /* can't debug over console port */ 375 #ifndef KGDB_CHEAT 376 /* 377 * The following could potentially be replaced 378 * by the corresponding code in dcmcnprobe. 379 */ 380 else { 381 dcminit(dcm, DCMPORT(DCMUNIT(kgdb_dev)), 382 kgdb_rate); 383 if (kgdb_debug_init) { 384 printf("%s port %d: ", sc->sc_hd->hp_xname, 385 DCMPORT(DCMUNIT(kgdb_dev))); 386 kgdb_connect(1); 387 } else 388 printf("%s port %d: kgdb enabled\n", 389 sc->sc_hd->hp_xname, 390 DCMPORT(DCMUNIT(kgdb_dev))); 391 } 392 /* end could be replaced */ 393 #endif 394 } 395 #endif 396 } 397 398 /* ARGSUSED */ 399 int 400 dcmopen(dev, flag, mode, p) 401 dev_t dev; 402 int flag, mode; 403 struct proc *p; 404 { 405 struct dcm_softc *sc; 406 struct tty *tp; 407 int unit, brd, port; 408 int error = 0, mbits, s; 409 410 unit = DCMUNIT(dev); 411 brd = DCMBOARD(unit); 412 port = DCMPORT(unit); 413 414 if ((brd >= NDCM) || (port >= NDCMPORT)) 415 return (ENXIO); 416 417 sc = &dcm_softc[brd]; 418 if ((sc->sc_flags & DCM_ACTIVE) == 0) 419 return (ENXIO); 420 421 if (sc->sc_tty[port] == NULL) 422 tp = sc->sc_tty[port] = ttymalloc(); 423 else 424 tp = sc->sc_tty[port]; 425 426 tp->t_oproc = dcmstart; 427 tp->t_param = dcmparam; 428 tp->t_dev = dev; 429 430 if ((tp->t_state & TS_ISOPEN) == 0) { 431 /* 432 * Sanity clause: reset the card on first open. 433 * The card might be left in an inconsistent state 434 * if the card memory is read inadvertently. 435 */ 436 dcminit(sc->sc_dcm, port, dcmdefaultrate); 437 438 tp->t_state |= TS_WOPEN; 439 ttychars(tp); 440 tp->t_iflag = TTYDEF_IFLAG; 441 tp->t_oflag = TTYDEF_OFLAG; 442 tp->t_cflag = TTYDEF_CFLAG; 443 tp->t_lflag = TTYDEF_LFLAG; 444 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 445 446 s = spltty(); 447 448 (void) dcmparam(tp, &tp->t_termios); 449 ttsetwater(tp); 450 } else if (tp->t_state & TS_XCLUDE && p->p_ucred->cr_uid != 0) 451 return (EBUSY); 452 else 453 s = spltty(); 454 455 /* Set modem control state. */ 456 mbits = MO_ON; 457 if (sc->sc_flags & DCM_STDDCE) 458 mbits |= MO_SR; /* pin 23, could be used as RTS */ 459 460 (void) dcmmctl(dev, mbits, DMSET); /* enable port */ 461 462 /* Set soft-carrier if so configured. */ 463 if ((sc->sc_softCAR & (1 << port)) || 464 (dcmmctl(dev, MO_OFF, DMGET) & MI_CD)) 465 tp->t_state |= TS_CARR_ON; 466 467 #ifdef DEBUG 468 if (dcmdebug & DDB_MODEM) 469 printf("%s: dcmopen port %d softcarr %c\n", 470 sc->sc_hd->hp_xname, port, 471 (tp->t_state & TS_CARR_ON) ? '1' : '0'); 472 #endif 473 474 /* Wait for carrier if necessary. */ 475 if ((flag & O_NONBLOCK) == 0) 476 while ((tp->t_cflag & CLOCAL) == 0 && 477 (tp->t_state & TS_CARR_ON) == 0) { 478 tp->t_state |= TS_WOPEN; 479 error = ttysleep(tp, (caddr_t)&tp->t_rawq, 480 TTIPRI | PCATCH, ttopen, 0); 481 if (error) { 482 splx(s); 483 return (error); 484 } 485 } 486 487 splx(s); 488 489 #ifdef DEBUG 490 if (dcmdebug & DDB_OPENCLOSE) 491 printf("%s port %d: dcmopen: st %x fl %x\n", 492 sc->sc_hd->hp_xname, port, tp->t_state, tp->t_flags); 493 #endif 494 if (error == 0) 495 error = (*linesw[tp->t_line].l_open)(dev, tp); 496 497 return (error); 498 } 499 500 /*ARGSUSED*/ 501 int 502 dcmclose(dev, flag, mode, p) 503 dev_t dev; 504 int flag, mode; 505 struct proc *p; 506 { 507 int s, unit, board, port; 508 struct dcm_softc *sc; 509 struct tty *tp; 510 511 unit = DCMUNIT(dev); 512 board = DCMBOARD(unit); 513 port = DCMPORT(unit); 514 515 sc = &dcm_softc[board]; 516 tp = sc->sc_tty[port]; 517 518 (*linesw[tp->t_line].l_close)(tp, flag); 519 520 s = spltty(); 521 522 if (tp->t_cflag & HUPCL || tp->t_state & TS_WOPEN || 523 (tp->t_state & TS_ISOPEN) == 0) 524 (void) dcmmctl(dev, MO_OFF, DMSET); 525 #ifdef DEBUG 526 if (dcmdebug & DDB_OPENCLOSE) 527 printf("%s port %d: dcmclose: st %x fl %x\n", 528 sc->sc_hd->hp_xname, port, tp->t_state, tp->t_flags); 529 #endif 530 splx(s); 531 ttyclose(tp); 532 #if 0 533 ttyfree(tp); 534 sc->sc_tty[port] == NULL; 535 #endif 536 return (0); 537 } 538 539 int 540 dcmread(dev, uio, flag) 541 dev_t dev; 542 struct uio *uio; 543 int flag; 544 { 545 int unit, board, port; 546 struct dcm_softc *sc; 547 register struct tty *tp; 548 549 unit = DCMUNIT(dev); 550 board = DCMBOARD(unit); 551 port = DCMPORT(unit); 552 553 sc = &dcm_softc[board]; 554 tp = sc->sc_tty[port]; 555 556 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 557 } 558 559 int 560 dcmwrite(dev, uio, flag) 561 dev_t dev; 562 struct uio *uio; 563 int flag; 564 { 565 int unit, board, port; 566 struct dcm_softc *sc; 567 register struct tty *tp; 568 569 unit = DCMUNIT(dev); 570 board = DCMBOARD(unit); 571 port = DCMPORT(unit); 572 573 sc = &dcm_softc[board]; 574 tp = sc->sc_tty[port]; 575 576 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 577 } 578 579 struct tty * 580 dcmtty(dev) 581 dev_t dev; 582 { 583 int unit, board, port; 584 struct dcm_softc *sc; 585 586 unit = DCMUNIT(dev); 587 board = DCMBOARD(unit); 588 port = DCMPORT(unit); 589 590 sc = &dcm_softc[board]; 591 592 return (sc->sc_tty[port]); 593 } 594 595 int 596 dcmintr(arg) 597 void *arg; 598 { 599 struct dcm_softc *sc = arg; 600 struct dcmdevice *dcm = sc->sc_dcm; 601 struct dcmischeme *dis = &sc->sc_scheme; 602 int brd = sc->sc_hd->hp_unit; 603 int code, i; 604 int pcnd[4], mcode, mcnd[4]; 605 606 /* 607 * Do all guarded register accesses right off to minimize 608 * block out of hardware. 609 */ 610 SEM_LOCK(dcm); 611 if ((dcm->dcm_ic & IC_IR) == 0) { 612 SEM_UNLOCK(dcm); 613 return (0); 614 } 615 for (i = 0; i < 4; i++) { 616 pcnd[i] = dcm->dcm_icrtab[i].dcm_data; 617 dcm->dcm_icrtab[i].dcm_data = 0; 618 code = sc->sc_modem[i]->mdmin; 619 if (sc->sc_flags & DCM_STDDCE) 620 code = hp2dce_in(code); 621 mcnd[i] = code; 622 } 623 code = dcm->dcm_iir & IIR_MASK; 624 dcm->dcm_iir = 0; /* XXX doc claims read clears interrupt?! */ 625 mcode = dcm->dcm_modemintr; 626 dcm->dcm_modemintr = 0; 627 SEM_UNLOCK(dcm); 628 629 #ifdef DEBUG 630 if (dcmdebug & DDB_INTR) { 631 printf("%s: dcmintr: iir %x pc %x/%x/%x/%x ", 632 sc->sc_hd->hp_xname, code, pcnd[0], pcnd[1], 633 pcnd[2], pcnd[3]); 634 printf("miir %x mc %x/%x/%x/%x\n", 635 mcode, mcnd[0], mcnd[1], mcnd[2], mcnd[3]); 636 } 637 #endif 638 if (code & IIR_TIMEO) 639 dcmrint(sc); 640 if (code & IIR_PORT0) 641 dcmpint(sc, 0, pcnd[0]); 642 if (code & IIR_PORT1) 643 dcmpint(sc, 1, pcnd[1]); 644 if (code & IIR_PORT2) 645 dcmpint(sc, 2, pcnd[2]); 646 if (code & IIR_PORT3) 647 dcmpint(sc, 3, pcnd[3]); 648 if (code & IIR_MODM) { 649 if (mcode == 0 || mcode & 0x1) /* mcode==0 -> 98642 board */ 650 dcmmint(sc, 0, mcnd[0]); 651 if (mcode & 0x2) 652 dcmmint(sc, 1, mcnd[1]); 653 if (mcode & 0x4) 654 dcmmint(sc, 2, mcnd[2]); 655 if (mcode & 0x8) 656 dcmmint(sc, 3, mcnd[3]); 657 } 658 659 /* 660 * Chalk up a receiver interrupt if the timer running or one of 661 * the ports reports a special character interrupt. 662 */ 663 if ((code & IIR_TIMEO) || 664 ((pcnd[0]|pcnd[1]|pcnd[2]|pcnd[3]) & IT_SPEC)) 665 dis->dis_intr++; 666 /* 667 * See if it is time to check/change the interrupt rate. 668 */ 669 if (dcmistype < 0 && 670 (i = time.tv_sec - dis->dis_time) >= dcminterval) { 671 /* 672 * If currently per-character and averaged over 70 interrupts 673 * per-second (66 is threshold of 600 baud) in last interval, 674 * switch to timer mode. 675 * 676 * XXX decay counts ala load average to avoid spikes? 677 */ 678 if (dis->dis_perchar && dis->dis_intr > 70 * i) 679 dcmsetischeme(brd, DIS_TIMER); 680 /* 681 * If currently using timer and had more interrupts than 682 * received characters in the last interval, switch back 683 * to per-character. Note that after changing to per-char 684 * we must process any characters already in the queue 685 * since they may have arrived before the bitmap was setup. 686 * 687 * XXX decay counts? 688 */ 689 else if (!dis->dis_perchar && dis->dis_intr > dis->dis_char) { 690 dcmsetischeme(brd, DIS_PERCHAR); 691 dcmrint(sc); 692 } 693 dis->dis_intr = dis->dis_char = 0; 694 dis->dis_time = time.tv_sec; 695 } 696 return (1); 697 } 698 699 /* 700 * Port interrupt. Can be two things: 701 * First, it might be a special character (exception interrupt); 702 * Second, it may be a buffer empty (transmit interrupt); 703 */ 704 dcmpint(sc, port, code) 705 struct dcm_softc *sc; 706 int port, code; 707 { 708 709 if (code & IT_SPEC) 710 dcmreadbuf(sc, port); 711 if (code & IT_TX) 712 dcmxint(sc, port); 713 } 714 715 dcmrint(sc) 716 struct dcm_softc *sc; 717 { 718 int port; 719 720 for (port = 0; port < NDCMPORT; port++) 721 dcmreadbuf(sc, port); 722 } 723 724 dcmreadbuf(sc, port) 725 struct dcm_softc *sc; 726 int port; 727 { 728 struct dcmdevice *dcm = sc->sc_dcm; 729 struct tty *tp = sc->sc_tty[port]; 730 struct dcmpreg *pp = dcm_preg(dcm, port); 731 struct dcmrfifo *fifo; 732 int c, stat; 733 u_int head; 734 int nch = 0; 735 #ifdef DCMSTATS 736 struct dcmstats *dsp = &sc->sc_stats; 737 738 dsp->rints++; 739 #endif 740 if ((tp->t_state & TS_ISOPEN) == 0) { 741 #ifdef KGDB 742 if ((makedev(dcmmajor, minor(tp->t_dev)) == kgdb_dev) && 743 (head = pp->r_head & RX_MASK) != (pp->r_tail & RX_MASK) && 744 dcm->dcm_rfifos[3-port][head>>1].data_char == FRAME_START) { 745 pp->r_head = (head + 2) & RX_MASK; 746 kgdb_connect(0); /* trap into kgdb */ 747 return; 748 } 749 #endif /* KGDB */ 750 pp->r_head = pp->r_tail & RX_MASK; 751 return; 752 } 753 754 head = pp->r_head & RX_MASK; 755 fifo = &dcm->dcm_rfifos[3-port][head>>1]; 756 /* 757 * XXX upper bound on how many chars we will take in one swallow? 758 */ 759 while (head != (pp->r_tail & RX_MASK)) { 760 /* 761 * Get character/status and update head pointer as fast 762 * as possible to make room for more characters. 763 */ 764 c = fifo->data_char; 765 stat = fifo->data_stat; 766 head = (head + 2) & RX_MASK; 767 pp->r_head = head; 768 fifo = head ? fifo+1 : &dcm->dcm_rfifos[3-port][0]; 769 nch++; 770 771 #ifdef DEBUG 772 if (dcmdebug & DDB_INPUT) 773 printf("%s port %d: dcmreadbuf: c%x('%c') s%x f%x h%x t%x\n", 774 sc->sc_hd->hp_xname, port, 775 c&0xFF, c, stat&0xFF, 776 tp->t_flags, head, pp->r_tail); 777 #endif 778 /* 779 * Check for and handle errors 780 */ 781 if (stat & RD_MASK) { 782 #ifdef DEBUG 783 if (dcmdebug & (DDB_INPUT|DDB_SIOERR)) 784 printf("%s port %d: dcmreadbuf: err: c%x('%c') s%x\n", 785 sc->sc_hd->hp_xname, port, 786 stat, c&0xFF, c); 787 #endif 788 if (stat & (RD_BD | RD_FE)) 789 c |= TTY_FE; 790 else if (stat & RD_PE) 791 c |= TTY_PE; 792 else if (stat & RD_OVF) 793 log(LOG_WARNING, 794 "%s port %d: silo overflow\n", 795 sc->sc_hd->hp_xname, port); 796 else if (stat & RD_OE) 797 log(LOG_WARNING, 798 "%s port %d: uart overflow\n", 799 sc->sc_hd->hp_xname, port); 800 } 801 (*linesw[tp->t_line].l_rint)(c, tp); 802 } 803 sc->sc_scheme.dis_char += nch; 804 805 #ifdef DCMSTATS 806 dsp->rchars += nch; 807 if (nch <= DCMRBSIZE) 808 dsp->rsilo[nch]++; 809 else 810 dsp->rsilo[DCMRBSIZE+1]++; 811 #endif 812 } 813 814 dcmxint(sc, port) 815 struct dcm_softc *sc; 816 int port; 817 { 818 struct tty *tp = sc->sc_tty[port]; 819 820 tp->t_state &= ~TS_BUSY; 821 if (tp->t_state & TS_FLUSH) 822 tp->t_state &= ~TS_FLUSH; 823 (*linesw[tp->t_line].l_start)(tp); 824 } 825 826 dcmmint(sc, port, mcnd) 827 struct dcm_softc *sc; 828 int port, mcnd; 829 { 830 int delta; 831 struct tty *tp; 832 struct dcmdevice *dcm = sc->sc_dcm; 833 834 tp = sc->sc_tty[port]; 835 836 #ifdef DEBUG 837 if (dcmdebug & DDB_MODEM) 838 printf("%s port %d: dcmmint: mcnd %x mcndlast %x\n", 839 sc->sc_hd->hp_xname, port, mcnd, sc->sc_mcndlast[port]); 840 #endif 841 delta = mcnd ^ sc->sc_mcndlast[port]; 842 sc->sc_mcndlast[port] = mcnd; 843 if ((delta & MI_CTS) && (tp->t_state & TS_ISOPEN) && 844 (tp->t_flags & CCTS_OFLOW)) { 845 if (mcnd & MI_CTS) { 846 tp->t_state &= ~TS_TTSTOP; 847 ttstart(tp); 848 } else 849 tp->t_state |= TS_TTSTOP; /* inline dcmstop */ 850 } 851 if (delta & MI_CD) { 852 if (mcnd & MI_CD) 853 (void)(*linesw[tp->t_line].l_modem)(tp, 1); 854 else if ((sc->sc_softCAR & (1 << port)) == 0 && 855 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) { 856 sc->sc_modem[port]->mdmout = MO_OFF; 857 SEM_LOCK(dcm); 858 dcm->dcm_modemchng |= (1 << port); 859 dcm->dcm_cr |= CR_MODM; 860 SEM_UNLOCK(dcm); 861 DELAY(10); /* time to change lines */ 862 } 863 } 864 } 865 866 int 867 dcmioctl(dev, cmd, data, flag, p) 868 dev_t dev; 869 int cmd; 870 caddr_t data; 871 int flag; 872 struct proc *p; 873 { 874 struct dcm_softc *sc; 875 struct tty *tp; 876 struct dcmdevice *dcm; 877 int board, port, unit = DCMUNIT(dev); 878 int error, s; 879 880 port = DCMPORT(unit); 881 board = DCMBOARD(unit); 882 883 sc = &dcm_softc[board]; 884 dcm = sc->sc_dcm; 885 tp = sc->sc_tty[port]; 886 887 #ifdef DEBUG 888 if (dcmdebug & DDB_IOCTL) 889 printf("%s port %d: dcmioctl: cmd %x data %x flag %x\n", 890 sc->sc_hd->hp_xname, port, cmd, *data, flag); 891 #endif 892 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 893 if (error >= 0) 894 return (error); 895 error = ttioctl(tp, cmd, data, flag, p); 896 if (error >= 0) 897 return (error); 898 899 switch (cmd) { 900 case TIOCSBRK: 901 /* 902 * Wait for transmitter buffer to empty 903 */ 904 s = spltty(); 905 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr) 906 DELAY(DCM_USPERCH(tp->t_ospeed)); 907 SEM_LOCK(dcm); 908 dcm->dcm_cmdtab[port].dcm_data |= CT_BRK; 909 dcm->dcm_cr |= (1 << port); /* start break */ 910 SEM_UNLOCK(dcm); 911 splx(s); 912 break; 913 914 case TIOCCBRK: 915 SEM_LOCK(dcm); 916 dcm->dcm_cmdtab[port].dcm_data |= CT_BRK; 917 dcm->dcm_cr |= (1 << port); /* end break */ 918 SEM_UNLOCK(dcm); 919 break; 920 921 case TIOCSDTR: 922 (void) dcmmctl(dev, MO_ON, DMBIS); 923 break; 924 925 case TIOCCDTR: 926 (void) dcmmctl(dev, MO_ON, DMBIC); 927 break; 928 929 case TIOCMSET: 930 (void) dcmmctl(dev, *(int *)data, DMSET); 931 break; 932 933 case TIOCMBIS: 934 (void) dcmmctl(dev, *(int *)data, DMBIS); 935 break; 936 937 case TIOCMBIC: 938 (void) dcmmctl(dev, *(int *)data, DMBIC); 939 break; 940 941 case TIOCMGET: 942 *(int *)data = dcmmctl(dev, 0, DMGET); 943 break; 944 945 case TIOCGFLAGS: { 946 int bits = 0; 947 948 if ((sc->sc_softCAR & (1 << port))) 949 bits |= TIOCFLAG_SOFTCAR; 950 951 if (tp->t_cflag & CLOCAL) 952 bits |= TIOCFLAG_CLOCAL; 953 954 *(int *)data = bits; 955 break; 956 } 957 958 case TIOCSFLAGS: { 959 int userbits; 960 961 error = suser(p->p_ucred, &p->p_acflag); 962 if (error) 963 return (EPERM); 964 965 userbits = *(int *)data; 966 967 if ((userbits & TIOCFLAG_SOFTCAR) || 968 ((sc->sc_flags & DCM_ISCONSOLE) && 969 (port == DCMCONSPORT))) 970 sc->sc_softCAR |= (1 << port); 971 972 if (userbits & TIOCFLAG_CLOCAL) 973 tp->t_cflag |= CLOCAL; 974 975 break; 976 } 977 978 default: 979 return (ENOTTY); 980 } 981 return (0); 982 } 983 984 int 985 dcmparam(tp, t) 986 register struct tty *tp; 987 register struct termios *t; 988 { 989 struct dcm_softc *sc; 990 struct dcmdevice *dcm; 991 int unit, board, port, mode, cflag = t->c_cflag; 992 int ospeed = ttspeedtab(t->c_ospeed, dcmspeedtab); 993 994 unit = DCMUNIT(tp->t_dev); 995 board = DCMBOARD(unit); 996 port = DCMPORT(unit); 997 998 sc = &dcm_softc[board]; 999 dcm = sc->sc_dcm; 1000 1001 /* check requested parameters */ 1002 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed)) 1003 return (EINVAL); 1004 /* and copy to tty */ 1005 tp->t_ispeed = t->c_ispeed; 1006 tp->t_ospeed = t->c_ospeed; 1007 tp->t_cflag = cflag; 1008 if (ospeed == 0) { 1009 (void) dcmmctl(DCMUNIT(tp->t_dev), MO_OFF, DMSET); 1010 return (0); 1011 } 1012 1013 mode = 0; 1014 switch (cflag&CSIZE) { 1015 case CS5: 1016 mode = LC_5BITS; break; 1017 case CS6: 1018 mode = LC_6BITS; break; 1019 case CS7: 1020 mode = LC_7BITS; break; 1021 case CS8: 1022 mode = LC_8BITS; break; 1023 } 1024 if (cflag&PARENB) { 1025 if (cflag&PARODD) 1026 mode |= LC_PODD; 1027 else 1028 mode |= LC_PEVEN; 1029 } 1030 if (cflag&CSTOPB) 1031 mode |= LC_2STOP; 1032 else 1033 mode |= LC_1STOP; 1034 #ifdef DEBUG 1035 if (dcmdebug & DDB_PARAM) 1036 printf("%s port %d: dcmparam: cflag %x mode %x speed %d uperch %d\n", 1037 sc->sc_hd->hp_xname, port, cflag, mode, tp->t_ospeed, 1038 DCM_USPERCH(tp->t_ospeed)); 1039 #endif 1040 1041 /* 1042 * Wait for transmitter buffer to empty. 1043 */ 1044 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr) 1045 DELAY(DCM_USPERCH(tp->t_ospeed)); 1046 /* 1047 * Make changes known to hardware. 1048 */ 1049 dcm->dcm_data[port].dcm_baud = ospeed; 1050 dcm->dcm_data[port].dcm_conf = mode; 1051 SEM_LOCK(dcm); 1052 dcm->dcm_cmdtab[port].dcm_data |= CT_CON; 1053 dcm->dcm_cr |= (1 << port); 1054 SEM_UNLOCK(dcm); 1055 /* 1056 * Delay for config change to take place. Weighted by baud. 1057 * XXX why do we do this? 1058 */ 1059 DELAY(16 * DCM_USPERCH(tp->t_ospeed)); 1060 return (0); 1061 } 1062 1063 void 1064 dcmstart(tp) 1065 register struct tty *tp; 1066 { 1067 struct dcm_softc *sc; 1068 struct dcmdevice *dcm; 1069 struct dcmpreg *pp; 1070 struct dcmtfifo *fifo; 1071 char *bp; 1072 u_int head, tail, next; 1073 int unit, board, port, nch; 1074 char buf[16]; 1075 int s; 1076 #ifdef DCMSTATS 1077 struct dcmstats *dsp = &sc->sc_stats; 1078 int tch = 0; 1079 #endif 1080 1081 unit = DCMUNIT(tp->t_dev); 1082 board = DCMBOARD(unit); 1083 port = DCMPORT(unit); 1084 1085 sc = &dcm_softc[board]; 1086 dcm = sc->sc_dcm; 1087 1088 s = spltty(); 1089 #ifdef DCMSTATS 1090 dsp->xints++; 1091 #endif 1092 #ifdef DEBUG 1093 if (dcmdebug & DDB_OUTPUT) 1094 printf("%s port %d: dcmstart: state %x flags %x outcc %d\n", 1095 sc->sc_hd->hp_xname, port, tp->t_state, tp->t_flags, 1096 tp->t_outq.c_cc); 1097 #endif 1098 if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP)) 1099 goto out; 1100 if (tp->t_outq.c_cc <= tp->t_lowat) { 1101 if (tp->t_state&TS_ASLEEP) { 1102 tp->t_state &= ~TS_ASLEEP; 1103 wakeup((caddr_t)&tp->t_outq); 1104 } 1105 selwakeup(&tp->t_wsel); 1106 } 1107 if (tp->t_outq.c_cc == 0) { 1108 #ifdef DCMSTATS 1109 dsp->xempty++; 1110 #endif 1111 goto out; 1112 } 1113 1114 pp = dcm_preg(dcm, port); 1115 tail = pp->t_tail & TX_MASK; 1116 next = (tail + 1) & TX_MASK; 1117 head = pp->t_head & TX_MASK; 1118 if (head == next) 1119 goto out; 1120 fifo = &dcm->dcm_tfifos[3-port][tail]; 1121 again: 1122 nch = q_to_b(&tp->t_outq, buf, (head - next) & TX_MASK); 1123 #ifdef DCMSTATS 1124 tch += nch; 1125 #endif 1126 #ifdef DEBUG 1127 if (dcmdebug & DDB_OUTPUT) 1128 printf("\thead %x tail %x nch %d\n", head, tail, nch); 1129 #endif 1130 /* 1131 * Loop transmitting all the characters we can. 1132 */ 1133 for (bp = buf; --nch >= 0; bp++) { 1134 fifo->data_char = *bp; 1135 pp->t_tail = next; 1136 /* 1137 * If this is the first character, 1138 * get the hardware moving right now. 1139 */ 1140 if (bp == buf) { 1141 tp->t_state |= TS_BUSY; 1142 SEM_LOCK(dcm); 1143 dcm->dcm_cmdtab[port].dcm_data |= CT_TX; 1144 dcm->dcm_cr |= (1 << port); 1145 SEM_UNLOCK(dcm); 1146 } 1147 tail = next; 1148 fifo = tail ? fifo+1 : &dcm->dcm_tfifos[3-port][0]; 1149 next = (next + 1) & TX_MASK; 1150 } 1151 /* 1152 * Head changed while we were loading the buffer, 1153 * go back and load some more if we can. 1154 */ 1155 if (tp->t_outq.c_cc && head != (pp->t_head & TX_MASK)) { 1156 #ifdef DCMSTATS 1157 dsp->xrestarts++; 1158 #endif 1159 head = pp->t_head & TX_MASK; 1160 goto again; 1161 } 1162 1163 /* 1164 * Kick it one last time in case it finished while we were 1165 * loading the last bunch. 1166 */ 1167 if (bp > &buf[1]) { 1168 tp->t_state |= TS_BUSY; 1169 SEM_LOCK(dcm); 1170 dcm->dcm_cmdtab[port].dcm_data |= CT_TX; 1171 dcm->dcm_cr |= (1 << port); 1172 SEM_UNLOCK(dcm); 1173 } 1174 #ifdef DEBUG 1175 if (dcmdebug & DDB_INTR) 1176 printf("%s port %d: dcmstart(%d): head %x tail %x outqcc %d\n", 1177 sc->sc_hd->hp_xname, port, head, tail, tp->t_outq.c_cc); 1178 #endif 1179 out: 1180 #ifdef DCMSTATS 1181 dsp->xchars += tch; 1182 if (tch <= DCMXBSIZE) 1183 dsp->xsilo[tch]++; 1184 else 1185 dsp->xsilo[DCMXBSIZE+1]++; 1186 #endif 1187 splx(s); 1188 } 1189 1190 /* 1191 * Stop output on a line. 1192 */ 1193 int 1194 dcmstop(tp, flag) 1195 register struct tty *tp; 1196 int flag; 1197 { 1198 int s; 1199 1200 s = spltty(); 1201 if (tp->t_state & TS_BUSY) { 1202 /* XXX is there some way to safely stop transmission? */ 1203 if ((tp->t_state&TS_TTSTOP) == 0) 1204 tp->t_state |= TS_FLUSH; 1205 } 1206 splx(s); 1207 } 1208 1209 /* 1210 * Modem control 1211 */ 1212 dcmmctl(dev, bits, how) 1213 dev_t dev; 1214 int bits, how; 1215 { 1216 struct dcm_softc *sc; 1217 struct dcmdevice *dcm; 1218 int s, unit, brd, port, hit = 0; 1219 1220 unit = DCMUNIT(dev); 1221 brd = DCMBOARD(unit); 1222 port = DCMPORT(unit); 1223 sc = &dcm_softc[brd]; 1224 dcm = sc->sc_dcm; 1225 1226 #ifdef DEBUG 1227 if (dcmdebug & DDB_MODEM) 1228 printf("%s port %d: dcmmctl: bits 0x%x how %x\n", 1229 sc->sc_hd->hp_xname, port, bits, how); 1230 #endif 1231 1232 s = spltty(); 1233 1234 switch (how) { 1235 case DMSET: 1236 sc->sc_modem[port]->mdmout = bits; 1237 hit++; 1238 break; 1239 1240 case DMBIS: 1241 sc->sc_modem[port]->mdmout |= bits; 1242 hit++; 1243 break; 1244 1245 case DMBIC: 1246 sc->sc_modem[port]->mdmout &= ~bits; 1247 hit++; 1248 break; 1249 1250 case DMGET: 1251 bits = sc->sc_modem[port]->mdmin; 1252 if (sc->sc_flags & DCM_STDDCE) 1253 bits = hp2dce_in(bits); 1254 break; 1255 } 1256 if (hit) { 1257 SEM_LOCK(dcm); 1258 dcm->dcm_modemchng |= 1<<(unit & 3); 1259 dcm->dcm_cr |= CR_MODM; 1260 SEM_UNLOCK(dcm); 1261 DELAY(10); /* delay until done */ 1262 (void) splx(s); 1263 } 1264 return (bits); 1265 } 1266 1267 /* 1268 * Set board to either interrupt per-character or at a fixed interval. 1269 */ 1270 dcmsetischeme(brd, flags) 1271 int brd, flags; 1272 { 1273 struct dcm_softc *sc = &dcm_softc[brd]; 1274 struct dcmdevice *dcm = sc->sc_dcm; 1275 struct dcmischeme *dis = &sc->sc_scheme; 1276 int i; 1277 u_char mask; 1278 int perchar = flags & DIS_PERCHAR; 1279 1280 #ifdef DEBUG 1281 if (dcmdebug & DDB_INTSCHM) 1282 printf("%s: dcmsetischeme(%d): cur %d, ints %d, chars %d\n", 1283 sc->sc_hd->hp_xname, perchar, dis->dis_perchar, 1284 dis->dis_intr, dis->dis_char); 1285 if ((flags & DIS_RESET) == 0 && perchar == dis->dis_perchar) { 1286 printf("%s: dcmsetischeme: redundent request %d\n", 1287 sc->sc_hd->hp_xname, perchar); 1288 return; 1289 } 1290 #endif 1291 /* 1292 * If perchar is non-zero, we enable interrupts on all characters 1293 * otherwise we disable perchar interrupts and use periodic 1294 * polling interrupts. 1295 */ 1296 dis->dis_perchar = perchar; 1297 mask = perchar ? 0xf : 0x0; 1298 for (i = 0; i < 256; i++) 1299 dcm->dcm_bmap[i].data_data = mask; 1300 /* 1301 * Don't slow down tandem mode, interrupt on flow control 1302 * chars for any port on the board. 1303 */ 1304 if (!perchar) { 1305 register struct tty *tp; 1306 int c; 1307 1308 for (i = 0; i < NDCMPORT; i++) { 1309 tp = sc->sc_tty[i]; 1310 1311 if ((c = tp->t_cc[VSTART]) != _POSIX_VDISABLE) 1312 dcm->dcm_bmap[c].data_data |= (1 << i); 1313 if ((c = tp->t_cc[VSTOP]) != _POSIX_VDISABLE) 1314 dcm->dcm_bmap[c].data_data |= (1 << i); 1315 } 1316 } 1317 /* 1318 * Board starts with timer disabled so if first call is to 1319 * set perchar mode then we don't want to toggle the timer. 1320 */ 1321 if (flags == (DIS_RESET|DIS_PERCHAR)) 1322 return; 1323 /* 1324 * Toggle card 16.7ms interrupts (we first make sure that card 1325 * has cleared the bit so it will see the toggle). 1326 */ 1327 while (dcm->dcm_cr & CR_TIMER) 1328 ; 1329 SEM_LOCK(dcm); 1330 dcm->dcm_cr |= CR_TIMER; 1331 SEM_UNLOCK(dcm); 1332 } 1333 1334 void 1335 dcminit(dcm, port, rate) 1336 struct dcmdevice *dcm; 1337 int port, rate; 1338 { 1339 int s, mode; 1340 1341 mode = LC_8BITS | LC_1STOP; 1342 1343 s = splhigh(); 1344 1345 /* 1346 * Wait for transmitter buffer to empty. 1347 */ 1348 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr) 1349 DELAY(DCM_USPERCH(rate)); 1350 1351 /* 1352 * Make changes known to hardware. 1353 */ 1354 dcm->dcm_data[port].dcm_baud = ttspeedtab(rate, dcmspeedtab); 1355 dcm->dcm_data[port].dcm_conf = mode; 1356 SEM_LOCK(dcm); 1357 dcm->dcm_cmdtab[port].dcm_data |= CT_CON; 1358 dcm->dcm_cr |= (1 << port); 1359 SEM_UNLOCK(dcm); 1360 1361 /* 1362 * Delay for config change to take place. Weighted by baud. 1363 * XXX why do we do this? 1364 */ 1365 DELAY(16 * DCM_USPERCH(rate)); 1366 splx(s); 1367 } 1368 1369 /* 1370 * Following are all routines needed for DCM to act as console 1371 */ 1372 1373 int 1374 dcm_console_scan(scode, va, arg) 1375 int scode; 1376 caddr_t va; 1377 void *arg; 1378 { 1379 struct dcmdevice *dcm = (struct dcmdevice *)va; 1380 struct consdev *cp = arg; 1381 u_char *dioiidev; 1382 int force = 0; 1383 1384 switch (dcm->dcm_rsid) { 1385 case DCMID: 1386 cp->cn_pri = CN_NORMAL; 1387 break; 1388 1389 case DCMID|DCMCON: 1390 cp->cn_pri = CN_REMOTE; 1391 break; 1392 1393 default: 1394 cp->cn_pri = CN_DEAD; 1395 return (0); 1396 } 1397 1398 #ifdef CONSCODE 1399 /* 1400 * Raise our priority, if appropriate. 1401 */ 1402 if (scode == CONSCODE) { 1403 cp->cn_pri = CN_REMOTE; 1404 force = conforced = 1; 1405 } 1406 #endif 1407 1408 /* 1409 * If our priority is higher than the currently-remembered 1410 * console, stash our priority, for the benefit of dcmcninit(). 1411 */ 1412 if ((cp->cn_pri > conpri) || force) { 1413 conpri = cp->cn_pri; 1414 if (scode >= 132) { 1415 dioiidev = (u_char *)va; 1416 return ((dioiidev[0x101] + 1) * 0x100000); 1417 } 1418 return (DIOCSIZE); 1419 } 1420 return (0); 1421 } 1422 1423 void 1424 dcmcnprobe(cp) 1425 struct consdev *cp; 1426 { 1427 1428 /* locate the major number */ 1429 for (dcmmajor = 0; dcmmajor < nchrdev; dcmmajor++) 1430 if (cdevsw[dcmmajor].d_open == dcmopen) 1431 break; 1432 1433 /* initialize required fields */ 1434 cp->cn_dev = makedev(dcmmajor, 0); /* XXX */ 1435 cp->cn_pri = CN_DEAD; 1436 1437 /* Abort early if console already forced. */ 1438 if (conforced) 1439 return; 1440 1441 console_scan(dcm_console_scan, cp); 1442 1443 #ifdef KGDB_CHEAT 1444 /* XXX this needs to be fixed. */ 1445 /* 1446 * This doesn't currently work, at least not with ite consoles; 1447 * the console hasn't been initialized yet. 1448 */ 1449 if (major(kgdb_dev) == dcmmajor && 1450 DCMBOARD(DCMUNIT(kgdb_dev)) == DCMBOARD(unit)) { 1451 dcminit(dcm_cn, DCMPORT(DCMUNIT(kgdb_dev)), kgdb_rate); 1452 if (kgdb_debug_init) { 1453 /* 1454 * We assume that console is ready for us... 1455 * this assumes that a dca or ite console 1456 * has been selected already and will init 1457 * on the first putc. 1458 */ 1459 printf("dcm%d: ", DCMUNIT(kgdb_dev)); 1460 kgdb_connect(1); 1461 } 1462 } 1463 #endif 1464 } 1465 1466 /* ARGSUSED */ 1467 void 1468 dcmcninit(cp) 1469 struct consdev *cp; 1470 { 1471 1472 dcm_cn = (struct dcmdevice *)conaddr; 1473 dcminit(dcm_cn, DCMCONSPORT, dcmdefaultrate); 1474 dcmconsinit = 1; 1475 } 1476 1477 /* ARGSUSED */ 1478 int 1479 dcmcngetc(dev) 1480 dev_t dev; 1481 { 1482 struct dcmrfifo *fifo; 1483 struct dcmpreg *pp; 1484 u_int head; 1485 int s, c, stat; 1486 1487 pp = dcm_preg(dcm_cn, DCMCONSPORT); 1488 1489 s = splhigh(); 1490 head = pp->r_head & RX_MASK; 1491 fifo = &dcm_cn->dcm_rfifos[3-DCMCONSPORT][head>>1]; 1492 while (head == (pp->r_tail & RX_MASK)) 1493 ; 1494 /* 1495 * If board interrupts are enabled, just let our received char 1496 * interrupt through in case some other port on the board was 1497 * busy. Otherwise we must clear the interrupt. 1498 */ 1499 SEM_LOCK(dcm_cn); 1500 if ((dcm_cn->dcm_ic & IC_IE) == 0) 1501 stat = dcm_cn->dcm_iir; 1502 SEM_UNLOCK(dcm_cn); 1503 c = fifo->data_char; 1504 stat = fifo->data_stat; 1505 pp->r_head = (head + 2) & RX_MASK; 1506 splx(s); 1507 return (c); 1508 } 1509 1510 /* 1511 * Console kernel output character routine. 1512 */ 1513 /* ARGSUSED */ 1514 void 1515 dcmcnputc(dev, c) 1516 dev_t dev; 1517 int c; 1518 { 1519 struct dcmpreg *pp; 1520 unsigned tail; 1521 int s, unit, stat; 1522 1523 pp = dcm_preg(dcm_cn, DCMCONSPORT); 1524 1525 s = splhigh(); 1526 #ifdef KGDB 1527 if (dev != kgdb_dev) 1528 #endif 1529 if (dcmconsinit == 0) { 1530 dcminit(dcm_cn, DCMCONSPORT, dcmdefaultrate); 1531 dcmconsinit = 1; 1532 } 1533 tail = pp->t_tail & TX_MASK; 1534 while (tail != (pp->t_head & TX_MASK)) 1535 ; 1536 dcm_cn->dcm_tfifos[3-DCMCONSPORT][tail].data_char = c; 1537 pp->t_tail = tail = (tail + 1) & TX_MASK; 1538 SEM_LOCK(dcm_cn); 1539 dcm_cn->dcm_cmdtab[DCMCONSPORT].dcm_data |= CT_TX; 1540 dcm_cn->dcm_cr |= (1 << DCMCONSPORT); 1541 SEM_UNLOCK(dcm_cn); 1542 while (tail != (pp->t_head & TX_MASK)) 1543 ; 1544 /* 1545 * If board interrupts are enabled, just let our completion 1546 * interrupt through in case some other port on the board 1547 * was busy. Otherwise we must clear the interrupt. 1548 */ 1549 if ((dcm_cn->dcm_ic & IC_IE) == 0) { 1550 SEM_LOCK(dcm_cn); 1551 stat = dcm_cn->dcm_iir; 1552 SEM_UNLOCK(dcm_cn); 1553 } 1554 splx(s); 1555 } 1556 #endif /* NDCM > 0 */ 1557
Indexes created Sat Sep 27 14:09:57 GMT 2025