dcm.c revision 1.29 1 /* $NetBSD: dcm.c,v 1.29 1996/09/02 06:43:47 mycroft Exp $ */
2
3 /*
4 * Copyright (c) 1995, 1996 Jason R. Thorpe. All rights reserved.
5 * Copyright (c) 1988 University of Utah.
6 * Copyright (c) 1982, 1986, 1990, 1993
7 * The Regents of the University of California. All rights reserved.
8 *
9 * This code is derived from software contributed to Berkeley by
10 * the Systems Programming Group of the University of Utah Computer
11 * Science Department.
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. All advertising materials mentioning features or use of this software
22 * must display the following acknowledgement:
23 * This product includes software developed by the University of
24 * California, Berkeley and its contributors.
25 * 4. Neither the name of the University nor the names of its contributors
26 * may be used to endorse or promote products derived from this software
27 * without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * SUCH DAMAGE.
40 *
41 * from Utah: $Hdr: dcm.c 1.29 92/01/21$
42 *
43 * @(#)dcm.c 8.4 (Berkeley) 1/12/94
44 */
45
46 /*
47 * TODO:
48 * Timeouts
49 * Test console support.
50 */
51
52 #include "dcm.h"
53 #if NDCM > 0
54 /*
55 * 98642/MUX
56 */
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/ioctl.h>
60 #include <sys/proc.h>
61 #include <sys/tty.h>
62 #include <sys/conf.h>
63 #include <sys/file.h>
64 #include <sys/uio.h>
65 #include <sys/kernel.h>
66 #include <sys/syslog.h>
67 #include <sys/time.h>
68
69 #include <machine/autoconf.h>
70 #include <machine/cpu.h>
71
72 #include <dev/cons.h>
73
74 #include <hp300/dev/device.h>
75 #include <hp300/dev/dcmreg.h>
76 #include <hp300/hp300/isr.h>
77
78 #ifndef DEFAULT_BAUD_RATE
79 #define DEFAULT_BAUD_RATE 9600
80 #endif
81
82 int dcmmatch(), dcmparam();
83 void dcmattach(), dcmstart();
84 struct driver dcmdriver = {
85 dcmmatch, dcmattach, "dcm",
86 };
87
88 struct speedtab dcmspeedtab[] = {
89 0, BR_0,
90 50, BR_50,
91 75, BR_75,
92 110, BR_110,
93 134, BR_134,
94 150, BR_150,
95 300, BR_300,
96 600, BR_600,
97 1200, BR_1200,
98 1800, BR_1800,
99 2400, BR_2400,
100 4800, BR_4800,
101 9600, BR_9600,
102 19200, BR_19200,
103 38400, BR_38400,
104 -1, -1
105 };
106
107 /* u-sec per character based on baudrate (assumes 1 start/8 data/1 stop bit) */
108 #define DCM_USPERCH(s) (10000000 / (s))
109
110 /*
111 * Per board interrupt scheme. 16.7ms is the polling interrupt rate
112 * (16.7ms is about 550 baud, 38.4k is 72 chars in 16.7ms).
113 */
114 #define DIS_TIMER 0
115 #define DIS_PERCHAR 1
116 #define DIS_RESET 2
117
118 int dcmistype = -1; /* -1 == dynamic, 0 == timer, 1 == perchar */
119 int dcminterval = 5; /* interval (secs) between checks */
120 struct dcmischeme {
121 int dis_perchar; /* non-zero if interrupting per char */
122 long dis_time; /* last time examined */
123 int dis_intr; /* recv interrupts during last interval */
124 int dis_char; /* characters read during last interval */
125 };
126
127 /*
128 * Stuff for DCM console support. This could probably be done a little
129 * better.
130 */
131 static struct dcmdevice *dcm_cn = NULL; /* pointer to hardware */
132 static int dcm_lastcnpri = CN_DEAD; /* XXX last priority */
133 static int dcmconsinit; /* has been initialized */
134
135 int dcmdefaultrate = DEFAULT_BAUD_RATE;
136 int dcmconbrdbusy = 0;
137 int dcmmajor;
138
139 #ifdef KGDB
140 /*
141 * Kernel GDB support
142 */
143 #include <machine/remote-sl.h>
144
145 extern dev_t kgdb_dev;
146 extern int kgdb_rate;
147 extern int kgdb_debug_init;
148 #endif
149
150 /* #define DCMSTATS */
151
152 #ifdef DEBUG
153 int dcmdebug = 0x0;
154 #define DDB_SIOERR 0x01
155 #define DDB_PARAM 0x02
156 #define DDB_INPUT 0x04
157 #define DDB_OUTPUT 0x08
158 #define DDB_INTR 0x10
159 #define DDB_IOCTL 0x20
160 #define DDB_INTSCHM 0x40
161 #define DDB_MODEM 0x80
162 #define DDB_OPENCLOSE 0x100
163 #endif
164
165 #ifdef DCMSTATS
166 #define DCMRBSIZE 94
167 #define DCMXBSIZE 24
168
169 struct dcmstats {
170 long xints; /* # of xmit ints */
171 long xchars; /* # of xmit chars */
172 long xempty; /* times outq is empty in dcmstart */
173 long xrestarts; /* times completed while xmitting */
174 long rints; /* # of recv ints */
175 long rchars; /* # of recv chars */
176 long xsilo[DCMXBSIZE+2]; /* times this many chars xmit on one int */
177 long rsilo[DCMRBSIZE+2]; /* times this many chars read on one int */
178 };
179 #endif
180
181 #define DCMUNIT(x) minor(x)
182 #define DCMBOARD(x) (((x) >> 2) & 0x3f)
183 #define DCMPORT(x) ((x) & 3)
184
185 /*
186 * Conversion from "HP DCE" to almost-normal DCE: on the 638 8-port mux,
187 * the distribution panel uses "HP DCE" conventions. If requested via
188 * the device flags, we swap the inputs to something closer to normal DCE,
189 * allowing a straight-through cable to a DTE or a reversed cable
190 * to a DCE (reversing 2-3, 4-5, 8-20 and leaving 6 unconnected;
191 * this gets "DCD" on pin 20 and "CTS" on 4, but doesn't connect
192 * DSR or make RTS work, though). The following gives the full
193 * details of a cable from this mux panel to a modem:
194 *
195 * HP modem
196 * name pin pin name
197 * HP inputs:
198 * "Rx" 2 3 Tx
199 * CTS 4 5 CTS (only needed for CCTS_OFLOW)
200 * DCD 20 8 DCD
201 * "DSR" 9 6 DSR (unneeded)
202 * RI 22 22 RI (unneeded)
203 *
204 * HP outputs:
205 * "Tx" 3 2 Rx
206 * "DTR" 6 not connected
207 * "RTS" 8 20 DTR
208 * "SR" 23 4 RTS (often not needed)
209 */
210 #define hp2dce_in(ibits) (iconv[(ibits) & 0xf])
211 static char iconv[16] = {
212 0, MI_DM, MI_CTS, MI_CTS|MI_DM,
213 MI_CD, MI_CD|MI_DM, MI_CD|MI_CTS, MI_CD|MI_CTS|MI_DM,
214 MI_RI, MI_RI|MI_DM, MI_RI|MI_CTS, MI_RI|MI_CTS|MI_DM,
215 MI_RI|MI_CD, MI_RI|MI_CD|MI_DM, MI_RI|MI_CD|MI_CTS,
216 MI_RI|MI_CD|MI_CTS|MI_DM
217 };
218
219 /*
220 * Note that 8-port boards appear as 2 4-port boards at consecutive
221 * select codes.
222 */
223 #define NDCMPORT 4
224
225 struct dcm_softc {
226 struct hp_device *sc_hd; /* device info */
227 struct dcmdevice *sc_dcm; /* pointer to hardware */
228 struct tty *sc_tty[NDCMPORT]; /* our tty instances */
229 struct modemreg *sc_modem[NDCMPORT]; /* modem control */
230 char sc_mcndlast[NDCMPORT]; /* XXX last modem status for port */
231 short sc_softCAR; /* mask of ports with soft-carrier */
232 struct dcmischeme sc_scheme; /* interrupt scheme for board */
233
234 /*
235 * Mask of soft-carrier bits in config flags.
236 */
237 #define DCM_SOFTCAR 0x0000000f
238
239 int sc_flags; /* misc. configuration info */
240
241 /*
242 * Bits for sc_flags
243 */
244 #define DCM_ACTIVE 0x00000001 /* indicates board is alive */
245 #define DCM_ISCONSOLE 0x00000002 /* indicates board is console */
246 #define DCM_STDDCE 0x00000010 /* re-map DCE to standard */
247 #define DCM_FLAGMASK (DCM_STDDCE) /* mask of valid bits in config flags */
248
249 #ifdef DCMSTATS
250 struct dcmstats sc_stats; /* metrics gathering */
251 #endif
252 } dcm_softc[NDCM];
253
254 void dcminit __P((struct dcmdevice *, int, int));
255 int dcmintr __P((void *));
256
257 int
258 dcmmatch(hd)
259 register struct hp_device *hd;
260 {
261 struct dcm_softc *sc = &dcm_softc[hd->hp_unit];
262 struct dcmdevice *dcm;
263 int i, timo = 0;
264 int s, brd, mbits;
265
266 dcm = (struct dcmdevice *)hd->hp_addr;
267 if ((dcm->dcm_rsid & 0x1f) != DCMID)
268 return (0);
269
270 brd = hd->hp_unit;
271
272 sc->sc_hd = hd;
273 hd->hp_ipl = DCMIPL(dcm->dcm_ic);
274
275 /*
276 * Empirically derived self-test magic
277 */
278 s = spltty();
279 dcm->dcm_rsid = DCMRS;
280 DELAY(50000); /* 5000 is not long enough */
281 dcm->dcm_rsid = 0;
282 dcm->dcm_ic = IC_IE;
283 dcm->dcm_cr = CR_SELFT;
284 while ((dcm->dcm_ic & IC_IR) == 0)
285 if (++timo == 20000)
286 return (0);
287 DELAY(50000); /* XXX why is this needed ???? */
288 while ((dcm->dcm_iir & IIR_SELFT) == 0)
289 if (++timo == 400000)
290 return (0);
291 DELAY(50000); /* XXX why is this needed ???? */
292 if (dcm->dcm_stcon != ST_OK) {
293 if (hd->hp_args->hw_sc != conscode)
294 printf("dcm%d: self test failed: %x\n",
295 brd, dcm->dcm_stcon);
296 return (0);
297 }
298 dcm->dcm_ic = IC_ID;
299 splx(s);
300
301 return (1);
302 }
303
304 void
305 dcmattach(hd)
306 register struct hp_device *hd;
307 {
308 struct dcm_softc *sc = &dcm_softc[hd->hp_unit];
309 struct dcmdevice *dcm;
310 int i, timo = 0;
311 int s, brd, mbits;
312
313 dcm = sc->sc_dcm = (struct dcmdevice *)hd->hp_addr;
314
315 brd = hd->hp_unit;
316 if (hd->hp_args->hw_sc == conscode) {
317 sc->sc_flags |= DCM_ISCONSOLE;
318
319 /*
320 * We didn't know which unit this would be during
321 * the console probe, so we have to fixup cn_dev here.
322 * Note that we always assume port 1 on the board.
323 */
324 cn_tab->cn_dev = makedev(dcmmajor, (brd << 2) | DCMCONSPORT);
325 }
326
327 /* Extract configuration info from flags. */
328 sc->sc_softCAR = (hd->hp_flags & DCM_SOFTCAR);
329 sc->sc_flags = (hd->hp_flags & DCM_FLAGMASK);
330
331 /* Mark our unit as configured. */
332 sc->sc_flags |= DCM_ACTIVE;
333
334 /* Establish the interrupt handler. */
335 isrlink(dcmintr, sc, hd->hp_ipl, ISRPRI_TTY);
336
337 if (dcmistype == DIS_TIMER)
338 dcmsetischeme(brd, DIS_RESET|DIS_TIMER);
339 else
340 dcmsetischeme(brd, DIS_RESET|DIS_PERCHAR);
341
342 /* load pointers to modem control */
343 sc->sc_modem[0] = &dcm->dcm_modem0;
344 sc->sc_modem[1] = &dcm->dcm_modem1;
345 sc->sc_modem[2] = &dcm->dcm_modem2;
346 sc->sc_modem[3] = &dcm->dcm_modem3;
347
348 /* set DCD (modem) and CTS (flow control) on all ports */
349 if (sc->sc_flags & DCM_STDDCE)
350 mbits = hp2dce_in(MI_CD|MI_CTS);
351 else
352 mbits = MI_CD|MI_CTS;
353
354 for (i = 0; i < NDCMPORT; i++)
355 sc->sc_modem[i]->mdmmsk = mbits;
356
357 dcm->dcm_ic = IC_IE; /* turn all interrupts on */
358
359 /*
360 * Need to reset baud rate, etc. of next print so reset dcmconsinit.
361 * Also make sure console is always "hardwired"
362 */
363 if (sc->sc_flags & DCM_ISCONSOLE) {
364 dcmconsinit = 0;
365 sc->sc_softCAR |= (1 << DCMCONSPORT);
366 printf(": console on port %d\n", DCMCONSPORT);
367 } else
368 printf("\n");
369
370 #ifdef KGDB
371 if (major(kgdb_dev) == dcmmajor &&
372 DCMBOARD(DCMUNIT(kgdb_dev)) == brd) {
373 if (dcmconsole == DCMUNIT(kgdb_dev)) /* XXX fixme */
374 kgdb_dev = NODEV; /* can't debug over console port */
375 #ifndef KGDB_CHEAT
376 /*
377 * The following could potentially be replaced
378 * by the corresponding code in dcmcnprobe.
379 */
380 else {
381 dcminit(dcm, DCMPORT(DCMUNIT(kgdb_dev)),
382 kgdb_rate);
383 if (kgdb_debug_init) {
384 printf("%s port %d: ", sc->sc_hd->hp_xname,
385 DCMPORT(DCMUNIT(kgdb_dev)));
386 kgdb_connect(1);
387 } else
388 printf("%s port %d: kgdb enabled\n",
389 sc->sc_hd->hp_xname,
390 DCMPORT(DCMUNIT(kgdb_dev)));
391 }
392 /* end could be replaced */
393 #endif
394 }
395 #endif
396 }
397
398 /* ARGSUSED */
399 int
400 dcmopen(dev, flag, mode, p)
401 dev_t dev;
402 int flag, mode;
403 struct proc *p;
404 {
405 struct dcm_softc *sc;
406 struct tty *tp;
407 int unit, brd, port;
408 int error = 0, mbits, s;
409
410 unit = DCMUNIT(dev);
411 brd = DCMBOARD(unit);
412 port = DCMPORT(unit);
413
414 if ((brd >= NDCM) || (port >= NDCMPORT))
415 return (ENXIO);
416
417 sc = &dcm_softc[brd];
418 if ((sc->sc_flags & DCM_ACTIVE) == 0)
419 return (ENXIO);
420
421 if (sc->sc_tty[port] == NULL) {
422 tp = sc->sc_tty[port] = ttymalloc();
423 tty_attach(tp);
424 } else
425 tp = sc->sc_tty[port];
426
427 tp->t_oproc = dcmstart;
428 tp->t_param = dcmparam;
429 tp->t_dev = dev;
430
431 if ((tp->t_state & TS_ISOPEN) == 0) {
432 /*
433 * Sanity clause: reset the card on first open.
434 * The card might be left in an inconsistent state
435 * if the card memory is read inadvertently.
436 */
437 dcminit(sc->sc_dcm, port, dcmdefaultrate);
438
439 tp->t_state |= TS_WOPEN;
440 ttychars(tp);
441 tp->t_iflag = TTYDEF_IFLAG;
442 tp->t_oflag = TTYDEF_OFLAG;
443 tp->t_cflag = TTYDEF_CFLAG;
444 tp->t_lflag = TTYDEF_LFLAG;
445 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
446
447 s = spltty();
448
449 (void) dcmparam(tp, &tp->t_termios);
450 ttsetwater(tp);
451 } else if (tp->t_state & TS_XCLUDE && p->p_ucred->cr_uid != 0)
452 return (EBUSY);
453 else
454 s = spltty();
455
456 /* Set modem control state. */
457 mbits = MO_ON;
458 if (sc->sc_flags & DCM_STDDCE)
459 mbits |= MO_SR; /* pin 23, could be used as RTS */
460
461 (void) dcmmctl(dev, mbits, DMSET); /* enable port */
462
463 /* Set soft-carrier if so configured. */
464 if ((sc->sc_softCAR & (1 << port)) ||
465 (dcmmctl(dev, MO_OFF, DMGET) & MI_CD))
466 tp->t_state |= TS_CARR_ON;
467
468 #ifdef DEBUG
469 if (dcmdebug & DDB_MODEM)
470 printf("%s: dcmopen port %d softcarr %c\n",
471 sc->sc_hd->hp_xname, port,
472 (tp->t_state & TS_CARR_ON) ? '1' : '0');
473 #endif
474
475 /* Wait for carrier if necessary. */
476 if ((flag & O_NONBLOCK) == 0)
477 while ((tp->t_cflag & CLOCAL) == 0 &&
478 (tp->t_state & TS_CARR_ON) == 0) {
479 tp->t_state |= TS_WOPEN;
480 error = ttysleep(tp, (caddr_t)&tp->t_rawq,
481 TTIPRI | PCATCH, ttopen, 0);
482 if (error) {
483 splx(s);
484 return (error);
485 }
486 }
487
488 splx(s);
489
490 #ifdef DEBUG
491 if (dcmdebug & DDB_OPENCLOSE)
492 printf("%s port %d: dcmopen: st %x fl %x\n",
493 sc->sc_hd->hp_xname, port, tp->t_state, tp->t_flags);
494 #endif
495 if (error == 0)
496 error = (*linesw[tp->t_line].l_open)(dev, tp);
497
498 return (error);
499 }
500
501 /*ARGSUSED*/
502 int
503 dcmclose(dev, flag, mode, p)
504 dev_t dev;
505 int flag, mode;
506 struct proc *p;
507 {
508 int s, unit, board, port;
509 struct dcm_softc *sc;
510 struct tty *tp;
511
512 unit = DCMUNIT(dev);
513 board = DCMBOARD(unit);
514 port = DCMPORT(unit);
515
516 sc = &dcm_softc[board];
517 tp = sc->sc_tty[port];
518
519 (*linesw[tp->t_line].l_close)(tp, flag);
520
521 s = spltty();
522
523 if (tp->t_cflag & HUPCL || tp->t_state & TS_WOPEN ||
524 (tp->t_state & TS_ISOPEN) == 0)
525 (void) dcmmctl(dev, MO_OFF, DMSET);
526 #ifdef DEBUG
527 if (dcmdebug & DDB_OPENCLOSE)
528 printf("%s port %d: dcmclose: st %x fl %x\n",
529 sc->sc_hd->hp_xname, port, tp->t_state, tp->t_flags);
530 #endif
531 splx(s);
532 ttyclose(tp);
533 #if 0
534 tty_detach(tp);
535 ttyfree(tp);
536 sc->sc_tty[port] == NULL;
537 #endif
538 return (0);
539 }
540
541 int
542 dcmread(dev, uio, flag)
543 dev_t dev;
544 struct uio *uio;
545 int flag;
546 {
547 int unit, board, port;
548 struct dcm_softc *sc;
549 register struct tty *tp;
550
551 unit = DCMUNIT(dev);
552 board = DCMBOARD(unit);
553 port = DCMPORT(unit);
554
555 sc = &dcm_softc[board];
556 tp = sc->sc_tty[port];
557
558 return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
559 }
560
561 int
562 dcmwrite(dev, uio, flag)
563 dev_t dev;
564 struct uio *uio;
565 int flag;
566 {
567 int unit, board, port;
568 struct dcm_softc *sc;
569 register struct tty *tp;
570
571 unit = DCMUNIT(dev);
572 board = DCMBOARD(unit);
573 port = DCMPORT(unit);
574
575 sc = &dcm_softc[board];
576 tp = sc->sc_tty[port];
577
578 return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
579 }
580
581 struct tty *
582 dcmtty(dev)
583 dev_t dev;
584 {
585 int unit, board, port;
586 struct dcm_softc *sc;
587
588 unit = DCMUNIT(dev);
589 board = DCMBOARD(unit);
590 port = DCMPORT(unit);
591
592 sc = &dcm_softc[board];
593
594 return (sc->sc_tty[port]);
595 }
596
597 int
598 dcmintr(arg)
599 void *arg;
600 {
601 struct dcm_softc *sc = arg;
602 struct dcmdevice *dcm = sc->sc_dcm;
603 struct dcmischeme *dis = &sc->sc_scheme;
604 int brd = sc->sc_hd->hp_unit;
605 int code, i;
606 int pcnd[4], mcode, mcnd[4];
607
608 /*
609 * Do all guarded register accesses right off to minimize
610 * block out of hardware.
611 */
612 SEM_LOCK(dcm);
613 if ((dcm->dcm_ic & IC_IR) == 0) {
614 SEM_UNLOCK(dcm);
615 return (0);
616 }
617 for (i = 0; i < 4; i++) {
618 pcnd[i] = dcm->dcm_icrtab[i].dcm_data;
619 dcm->dcm_icrtab[i].dcm_data = 0;
620 code = sc->sc_modem[i]->mdmin;
621 if (sc->sc_flags & DCM_STDDCE)
622 code = hp2dce_in(code);
623 mcnd[i] = code;
624 }
625 code = dcm->dcm_iir & IIR_MASK;
626 dcm->dcm_iir = 0; /* XXX doc claims read clears interrupt?! */
627 mcode = dcm->dcm_modemintr;
628 dcm->dcm_modemintr = 0;
629 SEM_UNLOCK(dcm);
630
631 #ifdef DEBUG
632 if (dcmdebug & DDB_INTR) {
633 printf("%s: dcmintr: iir %x pc %x/%x/%x/%x ",
634 sc->sc_hd->hp_xname, code, pcnd[0], pcnd[1],
635 pcnd[2], pcnd[3]);
636 printf("miir %x mc %x/%x/%x/%x\n",
637 mcode, mcnd[0], mcnd[1], mcnd[2], mcnd[3]);
638 }
639 #endif
640 if (code & IIR_TIMEO)
641 dcmrint(sc);
642 if (code & IIR_PORT0)
643 dcmpint(sc, 0, pcnd[0]);
644 if (code & IIR_PORT1)
645 dcmpint(sc, 1, pcnd[1]);
646 if (code & IIR_PORT2)
647 dcmpint(sc, 2, pcnd[2]);
648 if (code & IIR_PORT3)
649 dcmpint(sc, 3, pcnd[3]);
650 if (code & IIR_MODM) {
651 if (mcode == 0 || mcode & 0x1) /* mcode==0 -> 98642 board */
652 dcmmint(sc, 0, mcnd[0]);
653 if (mcode & 0x2)
654 dcmmint(sc, 1, mcnd[1]);
655 if (mcode & 0x4)
656 dcmmint(sc, 2, mcnd[2]);
657 if (mcode & 0x8)
658 dcmmint(sc, 3, mcnd[3]);
659 }
660
661 /*
662 * Chalk up a receiver interrupt if the timer running or one of
663 * the ports reports a special character interrupt.
664 */
665 if ((code & IIR_TIMEO) ||
666 ((pcnd[0]|pcnd[1]|pcnd[2]|pcnd[3]) & IT_SPEC))
667 dis->dis_intr++;
668 /*
669 * See if it is time to check/change the interrupt rate.
670 */
671 if (dcmistype < 0 &&
672 (i = time.tv_sec - dis->dis_time) >= dcminterval) {
673 /*
674 * If currently per-character and averaged over 70 interrupts
675 * per-second (66 is threshold of 600 baud) in last interval,
676 * switch to timer mode.
677 *
678 * XXX decay counts ala load average to avoid spikes?
679 */
680 if (dis->dis_perchar && dis->dis_intr > 70 * i)
681 dcmsetischeme(brd, DIS_TIMER);
682 /*
683 * If currently using timer and had more interrupts than
684 * received characters in the last interval, switch back
685 * to per-character. Note that after changing to per-char
686 * we must process any characters already in the queue
687 * since they may have arrived before the bitmap was setup.
688 *
689 * XXX decay counts?
690 */
691 else if (!dis->dis_perchar && dis->dis_intr > dis->dis_char) {
692 dcmsetischeme(brd, DIS_PERCHAR);
693 dcmrint(sc);
694 }
695 dis->dis_intr = dis->dis_char = 0;
696 dis->dis_time = time.tv_sec;
697 }
698 return (1);
699 }
700
701 /*
702 * Port interrupt. Can be two things:
703 * First, it might be a special character (exception interrupt);
704 * Second, it may be a buffer empty (transmit interrupt);
705 */
706 dcmpint(sc, port, code)
707 struct dcm_softc *sc;
708 int port, code;
709 {
710
711 if (code & IT_SPEC)
712 dcmreadbuf(sc, port);
713 if (code & IT_TX)
714 dcmxint(sc, port);
715 }
716
717 dcmrint(sc)
718 struct dcm_softc *sc;
719 {
720 int port;
721
722 for (port = 0; port < NDCMPORT; port++)
723 dcmreadbuf(sc, port);
724 }
725
726 dcmreadbuf(sc, port)
727 struct dcm_softc *sc;
728 int port;
729 {
730 struct dcmdevice *dcm = sc->sc_dcm;
731 struct tty *tp = sc->sc_tty[port];
732 struct dcmpreg *pp = dcm_preg(dcm, port);
733 struct dcmrfifo *fifo;
734 int c, stat;
735 u_int head;
736 int nch = 0;
737 #ifdef DCMSTATS
738 struct dcmstats *dsp = &sc->sc_stats;
739
740 dsp->rints++;
741 #endif
742 if ((tp->t_state & TS_ISOPEN) == 0) {
743 #ifdef KGDB
744 if ((makedev(dcmmajor, minor(tp->t_dev)) == kgdb_dev) &&
745 (head = pp->r_head & RX_MASK) != (pp->r_tail & RX_MASK) &&
746 dcm->dcm_rfifos[3-port][head>>1].data_char == FRAME_START) {
747 pp->r_head = (head + 2) & RX_MASK;
748 kgdb_connect(0); /* trap into kgdb */
749 return;
750 }
751 #endif /* KGDB */
752 pp->r_head = pp->r_tail & RX_MASK;
753 return;
754 }
755
756 head = pp->r_head & RX_MASK;
757 fifo = &dcm->dcm_rfifos[3-port][head>>1];
758 /*
759 * XXX upper bound on how many chars we will take in one swallow?
760 */
761 while (head != (pp->r_tail & RX_MASK)) {
762 /*
763 * Get character/status and update head pointer as fast
764 * as possible to make room for more characters.
765 */
766 c = fifo->data_char;
767 stat = fifo->data_stat;
768 head = (head + 2) & RX_MASK;
769 pp->r_head = head;
770 fifo = head ? fifo+1 : &dcm->dcm_rfifos[3-port][0];
771 nch++;
772
773 #ifdef DEBUG
774 if (dcmdebug & DDB_INPUT)
775 printf("%s port %d: dcmreadbuf: c%x('%c') s%x f%x h%x t%x\n",
776 sc->sc_hd->hp_xname, port,
777 c&0xFF, c, stat&0xFF,
778 tp->t_flags, head, pp->r_tail);
779 #endif
780 /*
781 * Check for and handle errors
782 */
783 if (stat & RD_MASK) {
784 #ifdef DEBUG
785 if (dcmdebug & (DDB_INPUT|DDB_SIOERR))
786 printf("%s port %d: dcmreadbuf: err: c%x('%c') s%x\n",
787 sc->sc_hd->hp_xname, port,
788 stat, c&0xFF, c);
789 #endif
790 if (stat & (RD_BD | RD_FE))
791 c |= TTY_FE;
792 else if (stat & RD_PE)
793 c |= TTY_PE;
794 else if (stat & RD_OVF)
795 log(LOG_WARNING,
796 "%s port %d: silo overflow\n",
797 sc->sc_hd->hp_xname, port);
798 else if (stat & RD_OE)
799 log(LOG_WARNING,
800 "%s port %d: uart overflow\n",
801 sc->sc_hd->hp_xname, port);
802 }
803 (*linesw[tp->t_line].l_rint)(c, tp);
804 }
805 sc->sc_scheme.dis_char += nch;
806
807 #ifdef DCMSTATS
808 dsp->rchars += nch;
809 if (nch <= DCMRBSIZE)
810 dsp->rsilo[nch]++;
811 else
812 dsp->rsilo[DCMRBSIZE+1]++;
813 #endif
814 }
815
816 dcmxint(sc, port)
817 struct dcm_softc *sc;
818 int port;
819 {
820 struct tty *tp = sc->sc_tty[port];
821
822 tp->t_state &= ~TS_BUSY;
823 if (tp->t_state & TS_FLUSH)
824 tp->t_state &= ~TS_FLUSH;
825 (*linesw[tp->t_line].l_start)(tp);
826 }
827
828 dcmmint(sc, port, mcnd)
829 struct dcm_softc *sc;
830 int port, mcnd;
831 {
832 int delta;
833 struct tty *tp;
834 struct dcmdevice *dcm = sc->sc_dcm;
835
836 tp = sc->sc_tty[port];
837
838 #ifdef DEBUG
839 if (dcmdebug & DDB_MODEM)
840 printf("%s port %d: dcmmint: mcnd %x mcndlast %x\n",
841 sc->sc_hd->hp_xname, port, mcnd, sc->sc_mcndlast[port]);
842 #endif
843 delta = mcnd ^ sc->sc_mcndlast[port];
844 sc->sc_mcndlast[port] = mcnd;
845 if ((delta & MI_CTS) && (tp->t_state & TS_ISOPEN) &&
846 (tp->t_flags & CCTS_OFLOW)) {
847 if (mcnd & MI_CTS) {
848 tp->t_state &= ~TS_TTSTOP;
849 ttstart(tp);
850 } else
851 tp->t_state |= TS_TTSTOP; /* inline dcmstop */
852 }
853 if (delta & MI_CD) {
854 if (mcnd & MI_CD)
855 (void)(*linesw[tp->t_line].l_modem)(tp, 1);
856 else if ((sc->sc_softCAR & (1 << port)) == 0 &&
857 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) {
858 sc->sc_modem[port]->mdmout = MO_OFF;
859 SEM_LOCK(dcm);
860 dcm->dcm_modemchng |= (1 << port);
861 dcm->dcm_cr |= CR_MODM;
862 SEM_UNLOCK(dcm);
863 DELAY(10); /* time to change lines */
864 }
865 }
866 }
867
868 int
869 dcmioctl(dev, cmd, data, flag, p)
870 dev_t dev;
871 int cmd;
872 caddr_t data;
873 int flag;
874 struct proc *p;
875 {
876 struct dcm_softc *sc;
877 struct tty *tp;
878 struct dcmdevice *dcm;
879 int board, port, unit = DCMUNIT(dev);
880 int error, s;
881
882 port = DCMPORT(unit);
883 board = DCMBOARD(unit);
884
885 sc = &dcm_softc[board];
886 dcm = sc->sc_dcm;
887 tp = sc->sc_tty[port];
888
889 #ifdef DEBUG
890 if (dcmdebug & DDB_IOCTL)
891 printf("%s port %d: dcmioctl: cmd %x data %x flag %x\n",
892 sc->sc_hd->hp_xname, port, cmd, *data, flag);
893 #endif
894 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
895 if (error >= 0)
896 return (error);
897 error = ttioctl(tp, cmd, data, flag, p);
898 if (error >= 0)
899 return (error);
900
901 switch (cmd) {
902 case TIOCSBRK:
903 /*
904 * Wait for transmitter buffer to empty
905 */
906 s = spltty();
907 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
908 DELAY(DCM_USPERCH(tp->t_ospeed));
909 SEM_LOCK(dcm);
910 dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
911 dcm->dcm_cr |= (1 << port); /* start break */
912 SEM_UNLOCK(dcm);
913 splx(s);
914 break;
915
916 case TIOCCBRK:
917 SEM_LOCK(dcm);
918 dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
919 dcm->dcm_cr |= (1 << port); /* end break */
920 SEM_UNLOCK(dcm);
921 break;
922
923 case TIOCSDTR:
924 (void) dcmmctl(dev, MO_ON, DMBIS);
925 break;
926
927 case TIOCCDTR:
928 (void) dcmmctl(dev, MO_ON, DMBIC);
929 break;
930
931 case TIOCMSET:
932 (void) dcmmctl(dev, *(int *)data, DMSET);
933 break;
934
935 case TIOCMBIS:
936 (void) dcmmctl(dev, *(int *)data, DMBIS);
937 break;
938
939 case TIOCMBIC:
940 (void) dcmmctl(dev, *(int *)data, DMBIC);
941 break;
942
943 case TIOCMGET:
944 *(int *)data = dcmmctl(dev, 0, DMGET);
945 break;
946
947 case TIOCGFLAGS: {
948 int bits = 0;
949
950 if ((sc->sc_softCAR & (1 << port)))
951 bits |= TIOCFLAG_SOFTCAR;
952
953 if (tp->t_cflag & CLOCAL)
954 bits |= TIOCFLAG_CLOCAL;
955
956 *(int *)data = bits;
957 break;
958 }
959
960 case TIOCSFLAGS: {
961 int userbits;
962
963 error = suser(p->p_ucred, &p->p_acflag);
964 if (error)
965 return (EPERM);
966
967 userbits = *(int *)data;
968
969 if ((userbits & TIOCFLAG_SOFTCAR) ||
970 ((sc->sc_flags & DCM_ISCONSOLE) &&
971 (port == DCMCONSPORT)))
972 sc->sc_softCAR |= (1 << port);
973
974 if (userbits & TIOCFLAG_CLOCAL)
975 tp->t_cflag |= CLOCAL;
976
977 break;
978 }
979
980 default:
981 return (ENOTTY);
982 }
983 return (0);
984 }
985
986 int
987 dcmparam(tp, t)
988 register struct tty *tp;
989 register struct termios *t;
990 {
991 struct dcm_softc *sc;
992 struct dcmdevice *dcm;
993 int unit, board, port, mode, cflag = t->c_cflag;
994 int ospeed = ttspeedtab(t->c_ospeed, dcmspeedtab);
995
996 unit = DCMUNIT(tp->t_dev);
997 board = DCMBOARD(unit);
998 port = DCMPORT(unit);
999
1000 sc = &dcm_softc[board];
1001 dcm = sc->sc_dcm;
1002
1003 /* check requested parameters */
1004 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
1005 return (EINVAL);
1006 /* and copy to tty */
1007 tp->t_ispeed = t->c_ispeed;
1008 tp->t_ospeed = t->c_ospeed;
1009 tp->t_cflag = cflag;
1010 if (ospeed == 0) {
1011 (void) dcmmctl(DCMUNIT(tp->t_dev), MO_OFF, DMSET);
1012 return (0);
1013 }
1014
1015 mode = 0;
1016 switch (cflag&CSIZE) {
1017 case CS5:
1018 mode = LC_5BITS; break;
1019 case CS6:
1020 mode = LC_6BITS; break;
1021 case CS7:
1022 mode = LC_7BITS; break;
1023 case CS8:
1024 mode = LC_8BITS; break;
1025 }
1026 if (cflag&PARENB) {
1027 if (cflag&PARODD)
1028 mode |= LC_PODD;
1029 else
1030 mode |= LC_PEVEN;
1031 }
1032 if (cflag&CSTOPB)
1033 mode |= LC_2STOP;
1034 else
1035 mode |= LC_1STOP;
1036 #ifdef DEBUG
1037 if (dcmdebug & DDB_PARAM)
1038 printf("%s port %d: dcmparam: cflag %x mode %x speed %d uperch %d\n",
1039 sc->sc_hd->hp_xname, port, cflag, mode, tp->t_ospeed,
1040 DCM_USPERCH(tp->t_ospeed));
1041 #endif
1042
1043 /*
1044 * Wait for transmitter buffer to empty.
1045 */
1046 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
1047 DELAY(DCM_USPERCH(tp->t_ospeed));
1048 /*
1049 * Make changes known to hardware.
1050 */
1051 dcm->dcm_data[port].dcm_baud = ospeed;
1052 dcm->dcm_data[port].dcm_conf = mode;
1053 SEM_LOCK(dcm);
1054 dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
1055 dcm->dcm_cr |= (1 << port);
1056 SEM_UNLOCK(dcm);
1057 /*
1058 * Delay for config change to take place. Weighted by baud.
1059 * XXX why do we do this?
1060 */
1061 DELAY(16 * DCM_USPERCH(tp->t_ospeed));
1062 return (0);
1063 }
1064
1065 void
1066 dcmstart(tp)
1067 register struct tty *tp;
1068 {
1069 struct dcm_softc *sc;
1070 struct dcmdevice *dcm;
1071 struct dcmpreg *pp;
1072 struct dcmtfifo *fifo;
1073 char *bp;
1074 u_int head, tail, next;
1075 int unit, board, port, nch;
1076 char buf[16];
1077 int s;
1078 #ifdef DCMSTATS
1079 struct dcmstats *dsp = &sc->sc_stats;
1080 int tch = 0;
1081 #endif
1082
1083 unit = DCMUNIT(tp->t_dev);
1084 board = DCMBOARD(unit);
1085 port = DCMPORT(unit);
1086
1087 sc = &dcm_softc[board];
1088 dcm = sc->sc_dcm;
1089
1090 s = spltty();
1091 #ifdef DCMSTATS
1092 dsp->xints++;
1093 #endif
1094 #ifdef DEBUG
1095 if (dcmdebug & DDB_OUTPUT)
1096 printf("%s port %d: dcmstart: state %x flags %x outcc %d\n",
1097 sc->sc_hd->hp_xname, port, tp->t_state, tp->t_flags,
1098 tp->t_outq.c_cc);
1099 #endif
1100 if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
1101 goto out;
1102 if (tp->t_outq.c_cc <= tp->t_lowat) {
1103 if (tp->t_state&TS_ASLEEP) {
1104 tp->t_state &= ~TS_ASLEEP;
1105 wakeup((caddr_t)&tp->t_outq);
1106 }
1107 selwakeup(&tp->t_wsel);
1108 }
1109 if (tp->t_outq.c_cc == 0) {
1110 #ifdef DCMSTATS
1111 dsp->xempty++;
1112 #endif
1113 goto out;
1114 }
1115
1116 pp = dcm_preg(dcm, port);
1117 tail = pp->t_tail & TX_MASK;
1118 next = (tail + 1) & TX_MASK;
1119 head = pp->t_head & TX_MASK;
1120 if (head == next)
1121 goto out;
1122 fifo = &dcm->dcm_tfifos[3-port][tail];
1123 again:
1124 nch = q_to_b(&tp->t_outq, buf, (head - next) & TX_MASK);
1125 #ifdef DCMSTATS
1126 tch += nch;
1127 #endif
1128 #ifdef DEBUG
1129 if (dcmdebug & DDB_OUTPUT)
1130 printf("\thead %x tail %x nch %d\n", head, tail, nch);
1131 #endif
1132 /*
1133 * Loop transmitting all the characters we can.
1134 */
1135 for (bp = buf; --nch >= 0; bp++) {
1136 fifo->data_char = *bp;
1137 pp->t_tail = next;
1138 /*
1139 * If this is the first character,
1140 * get the hardware moving right now.
1141 */
1142 if (bp == buf) {
1143 tp->t_state |= TS_BUSY;
1144 SEM_LOCK(dcm);
1145 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
1146 dcm->dcm_cr |= (1 << port);
1147 SEM_UNLOCK(dcm);
1148 }
1149 tail = next;
1150 fifo = tail ? fifo+1 : &dcm->dcm_tfifos[3-port][0];
1151 next = (next + 1) & TX_MASK;
1152 }
1153 /*
1154 * Head changed while we were loading the buffer,
1155 * go back and load some more if we can.
1156 */
1157 if (tp->t_outq.c_cc && head != (pp->t_head & TX_MASK)) {
1158 #ifdef DCMSTATS
1159 dsp->xrestarts++;
1160 #endif
1161 head = pp->t_head & TX_MASK;
1162 goto again;
1163 }
1164
1165 /*
1166 * Kick it one last time in case it finished while we were
1167 * loading the last bunch.
1168 */
1169 if (bp > &buf[1]) {
1170 tp->t_state |= TS_BUSY;
1171 SEM_LOCK(dcm);
1172 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
1173 dcm->dcm_cr |= (1 << port);
1174 SEM_UNLOCK(dcm);
1175 }
1176 #ifdef DEBUG
1177 if (dcmdebug & DDB_INTR)
1178 printf("%s port %d: dcmstart(%d): head %x tail %x outqcc %d\n",
1179 sc->sc_hd->hp_xname, port, head, tail, tp->t_outq.c_cc);
1180 #endif
1181 out:
1182 #ifdef DCMSTATS
1183 dsp->xchars += tch;
1184 if (tch <= DCMXBSIZE)
1185 dsp->xsilo[tch]++;
1186 else
1187 dsp->xsilo[DCMXBSIZE+1]++;
1188 #endif
1189 splx(s);
1190 }
1191
1192 /*
1193 * Stop output on a line.
1194 */
1195 void
1196 dcmstop(tp, flag)
1197 register struct tty *tp;
1198 int flag;
1199 {
1200 int s;
1201
1202 s = spltty();
1203 if (tp->t_state & TS_BUSY) {
1204 /* XXX is there some way to safely stop transmission? */
1205 if ((tp->t_state&TS_TTSTOP) == 0)
1206 tp->t_state |= TS_FLUSH;
1207 }
1208 splx(s);
1209 }
1210
1211 /*
1212 * Modem control
1213 */
1214 dcmmctl(dev, bits, how)
1215 dev_t dev;
1216 int bits, how;
1217 {
1218 struct dcm_softc *sc;
1219 struct dcmdevice *dcm;
1220 int s, unit, brd, port, hit = 0;
1221
1222 unit = DCMUNIT(dev);
1223 brd = DCMBOARD(unit);
1224 port = DCMPORT(unit);
1225 sc = &dcm_softc[brd];
1226 dcm = sc->sc_dcm;
1227
1228 #ifdef DEBUG
1229 if (dcmdebug & DDB_MODEM)
1230 printf("%s port %d: dcmmctl: bits 0x%x how %x\n",
1231 sc->sc_hd->hp_xname, port, bits, how);
1232 #endif
1233
1234 s = spltty();
1235
1236 switch (how) {
1237 case DMSET:
1238 sc->sc_modem[port]->mdmout = bits;
1239 hit++;
1240 break;
1241
1242 case DMBIS:
1243 sc->sc_modem[port]->mdmout |= bits;
1244 hit++;
1245 break;
1246
1247 case DMBIC:
1248 sc->sc_modem[port]->mdmout &= ~bits;
1249 hit++;
1250 break;
1251
1252 case DMGET:
1253 bits = sc->sc_modem[port]->mdmin;
1254 if (sc->sc_flags & DCM_STDDCE)
1255 bits = hp2dce_in(bits);
1256 break;
1257 }
1258 if (hit) {
1259 SEM_LOCK(dcm);
1260 dcm->dcm_modemchng |= 1<<(unit & 3);
1261 dcm->dcm_cr |= CR_MODM;
1262 SEM_UNLOCK(dcm);
1263 DELAY(10); /* delay until done */
1264 (void) splx(s);
1265 }
1266 return (bits);
1267 }
1268
1269 /*
1270 * Set board to either interrupt per-character or at a fixed interval.
1271 */
1272 dcmsetischeme(brd, flags)
1273 int brd, flags;
1274 {
1275 struct dcm_softc *sc = &dcm_softc[brd];
1276 struct dcmdevice *dcm = sc->sc_dcm;
1277 struct dcmischeme *dis = &sc->sc_scheme;
1278 int i;
1279 u_char mask;
1280 int perchar = flags & DIS_PERCHAR;
1281
1282 #ifdef DEBUG
1283 if (dcmdebug & DDB_INTSCHM)
1284 printf("%s: dcmsetischeme(%d): cur %d, ints %d, chars %d\n",
1285 sc->sc_hd->hp_xname, perchar, dis->dis_perchar,
1286 dis->dis_intr, dis->dis_char);
1287 if ((flags & DIS_RESET) == 0 && perchar == dis->dis_perchar) {
1288 printf("%s: dcmsetischeme: redundent request %d\n",
1289 sc->sc_hd->hp_xname, perchar);
1290 return;
1291 }
1292 #endif
1293 /*
1294 * If perchar is non-zero, we enable interrupts on all characters
1295 * otherwise we disable perchar interrupts and use periodic
1296 * polling interrupts.
1297 */
1298 dis->dis_perchar = perchar;
1299 mask = perchar ? 0xf : 0x0;
1300 for (i = 0; i < 256; i++)
1301 dcm->dcm_bmap[i].data_data = mask;
1302 /*
1303 * Don't slow down tandem mode, interrupt on flow control
1304 * chars for any port on the board.
1305 */
1306 if (!perchar) {
1307 register struct tty *tp;
1308 int c;
1309
1310 for (i = 0; i < NDCMPORT; i++) {
1311 tp = sc->sc_tty[i];
1312
1313 if ((c = tp->t_cc[VSTART]) != _POSIX_VDISABLE)
1314 dcm->dcm_bmap[c].data_data |= (1 << i);
1315 if ((c = tp->t_cc[VSTOP]) != _POSIX_VDISABLE)
1316 dcm->dcm_bmap[c].data_data |= (1 << i);
1317 }
1318 }
1319 /*
1320 * Board starts with timer disabled so if first call is to
1321 * set perchar mode then we don't want to toggle the timer.
1322 */
1323 if (flags == (DIS_RESET|DIS_PERCHAR))
1324 return;
1325 /*
1326 * Toggle card 16.7ms interrupts (we first make sure that card
1327 * has cleared the bit so it will see the toggle).
1328 */
1329 while (dcm->dcm_cr & CR_TIMER)
1330 ;
1331 SEM_LOCK(dcm);
1332 dcm->dcm_cr |= CR_TIMER;
1333 SEM_UNLOCK(dcm);
1334 }
1335
1336 void
1337 dcminit(dcm, port, rate)
1338 struct dcmdevice *dcm;
1339 int port, rate;
1340 {
1341 int s, mode;
1342
1343 mode = LC_8BITS | LC_1STOP;
1344
1345 s = splhigh();
1346
1347 /*
1348 * Wait for transmitter buffer to empty.
1349 */
1350 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
1351 DELAY(DCM_USPERCH(rate));
1352
1353 /*
1354 * Make changes known to hardware.
1355 */
1356 dcm->dcm_data[port].dcm_baud = ttspeedtab(rate, dcmspeedtab);
1357 dcm->dcm_data[port].dcm_conf = mode;
1358 SEM_LOCK(dcm);
1359 dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
1360 dcm->dcm_cr |= (1 << port);
1361 SEM_UNLOCK(dcm);
1362
1363 /*
1364 * Delay for config change to take place. Weighted by baud.
1365 * XXX why do we do this?
1366 */
1367 DELAY(16 * DCM_USPERCH(rate));
1368 splx(s);
1369 }
1370
1371 /*
1372 * Following are all routines needed for DCM to act as console
1373 */
1374
1375 int
1376 dcm_console_scan(scode, va, arg)
1377 int scode;
1378 caddr_t va;
1379 void *arg;
1380 {
1381 struct dcmdevice *dcm = (struct dcmdevice *)va;
1382 struct consdev *cp = arg;
1383 u_char *dioiidev;
1384 int force = 0, pri;
1385
1386 switch (dcm->dcm_rsid) {
1387 case DCMID:
1388 pri = CN_NORMAL;
1389 break;
1390
1391 case DCMID|DCMCON:
1392 pri = CN_REMOTE;
1393 break;
1394
1395 default:
1396 return (0);
1397 }
1398
1399 #ifdef CONSCODE
1400 /*
1401 * Raise our priority, if appropriate.
1402 */
1403 if (scode == CONSCODE) {
1404 pri = CN_REMOTE;
1405 force = conforced = 1;
1406 }
1407 #endif
1408
1409 /* Only raise priority. */
1410 if (pri > cp->cn_pri)
1411 cp->cn_pri = pri;
1412
1413 /*
1414 * If our priority is higher than the currently-remembered
1415 * console, stash our priority, for the benefit of dcmcninit().
1416 */
1417 if (((cn_tab == NULL) || (cp->cn_pri > cn_tab->cn_pri)) || force) {
1418 cn_tab = cp;
1419 if (scode >= 132) {
1420 dioiidev = (u_char *)va;
1421 return ((dioiidev[0x101] + 1) * 0x100000);
1422 }
1423 return (DIOCSIZE);
1424 }
1425 return (0);
1426 }
1427
1428 void
1429 dcmcnprobe(cp)
1430 struct consdev *cp;
1431 {
1432
1433 /* locate the major number */
1434 for (dcmmajor = 0; dcmmajor < nchrdev; dcmmajor++)
1435 if (cdevsw[dcmmajor].d_open == dcmopen)
1436 break;
1437
1438 /* initialize required fields */
1439 cp->cn_dev = makedev(dcmmajor, 0); /* XXX */
1440 cp->cn_pri = CN_DEAD;
1441
1442 /* Abort early if console already forced. */
1443 if (conforced)
1444 return;
1445
1446 console_scan(dcm_console_scan, cp);
1447
1448 #ifdef KGDB_CHEAT
1449 /* XXX this needs to be fixed. */
1450 /*
1451 * This doesn't currently work, at least not with ite consoles;
1452 * the console hasn't been initialized yet.
1453 */
1454 if (major(kgdb_dev) == dcmmajor &&
1455 DCMBOARD(DCMUNIT(kgdb_dev)) == DCMBOARD(unit)) {
1456 dcminit(dcm_cn, DCMPORT(DCMUNIT(kgdb_dev)), kgdb_rate);
1457 if (kgdb_debug_init) {
1458 /*
1459 * We assume that console is ready for us...
1460 * this assumes that a dca or ite console
1461 * has been selected already and will init
1462 * on the first putc.
1463 */
1464 printf("dcm%d: ", DCMUNIT(kgdb_dev));
1465 kgdb_connect(1);
1466 }
1467 }
1468 #endif
1469 }
1470
1471 /* ARGSUSED */
1472 void
1473 dcmcninit(cp)
1474 struct consdev *cp;
1475 {
1476
1477 dcm_cn = (struct dcmdevice *)conaddr;
1478 dcminit(dcm_cn, DCMCONSPORT, dcmdefaultrate);
1479 dcmconsinit = 1;
1480 }
1481
1482 /* ARGSUSED */
1483 int
1484 dcmcngetc(dev)
1485 dev_t dev;
1486 {
1487 struct dcmrfifo *fifo;
1488 struct dcmpreg *pp;
1489 u_int head;
1490 int s, c, stat;
1491
1492 pp = dcm_preg(dcm_cn, DCMCONSPORT);
1493
1494 s = splhigh();
1495 head = pp->r_head & RX_MASK;
1496 fifo = &dcm_cn->dcm_rfifos[3-DCMCONSPORT][head>>1];
1497 while (head == (pp->r_tail & RX_MASK))
1498 ;
1499 /*
1500 * If board interrupts are enabled, just let our received char
1501 * interrupt through in case some other port on the board was
1502 * busy. Otherwise we must clear the interrupt.
1503 */
1504 SEM_LOCK(dcm_cn);
1505 if ((dcm_cn->dcm_ic & IC_IE) == 0)
1506 stat = dcm_cn->dcm_iir;
1507 SEM_UNLOCK(dcm_cn);
1508 c = fifo->data_char;
1509 stat = fifo->data_stat;
1510 pp->r_head = (head + 2) & RX_MASK;
1511 splx(s);
1512 return (c);
1513 }
1514
1515 /*
1516 * Console kernel output character routine.
1517 */
1518 /* ARGSUSED */
1519 void
1520 dcmcnputc(dev, c)
1521 dev_t dev;
1522 int c;
1523 {
1524 struct dcmpreg *pp;
1525 unsigned tail;
1526 int s, unit, stat;
1527
1528 pp = dcm_preg(dcm_cn, DCMCONSPORT);
1529
1530 s = splhigh();
1531 #ifdef KGDB
1532 if (dev != kgdb_dev)
1533 #endif
1534 if (dcmconsinit == 0) {
1535 dcminit(dcm_cn, DCMCONSPORT, dcmdefaultrate);
1536 dcmconsinit = 1;
1537 }
1538 tail = pp->t_tail & TX_MASK;
1539 while (tail != (pp->t_head & TX_MASK))
1540 ;
1541 dcm_cn->dcm_tfifos[3-DCMCONSPORT][tail].data_char = c;
1542 pp->t_tail = tail = (tail + 1) & TX_MASK;
1543 SEM_LOCK(dcm_cn);
1544 dcm_cn->dcm_cmdtab[DCMCONSPORT].dcm_data |= CT_TX;
1545 dcm_cn->dcm_cr |= (1 << DCMCONSPORT);
1546 SEM_UNLOCK(dcm_cn);
1547 while (tail != (pp->t_head & TX_MASK))
1548 ;
1549 /*
1550 * If board interrupts are enabled, just let our completion
1551 * interrupt through in case some other port on the board
1552 * was busy. Otherwise we must clear the interrupt.
1553 */
1554 if ((dcm_cn->dcm_ic & IC_IE) == 0) {
1555 SEM_LOCK(dcm_cn);
1556 stat = dcm_cn->dcm_iir;
1557 SEM_UNLOCK(dcm_cn);
1558 }
1559 splx(s);
1560 }
1561 #endif /* NDCM > 0 */
1562