dcm.c revision 1.3 1 /*
2 * Copyright (c) 1988 University of Utah.
3 * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * the Systems Programming Group of the University of Utah Computer
8 * Science Department.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * from: $Hdr: dcm.c 1.26 91/01/21$
39 *
40 * from: @(#)dcm.c 7.14 (Berkeley) 6/27/91
41 * $Id: dcm.c,v 1.3 1993/05/22 11:40:46 cgd Exp $
42 */
43
44 /*
45 * TODO:
46 * Timeouts
47 * Test console support.
48 */
49
50 #include "dcm.h"
51 #if NDCM > 0
52 /*
53 * 98642/MUX
54 */
55 #include "sys/param.h"
56 #include "sys/systm.h"
57 #include "sys/ioctl.h"
58 #include "sys/select.h"
59 #include "sys/tty.h"
60 #include "sys/proc.h"
61 #include "sys/conf.h"
62 #include "sys/file.h"
63 #include "sys/uio.h"
64 #include "sys/kernel.h"
65 #include "sys/syslog.h"
66 #include "sys/time.h"
67
68 #include "device.h"
69 #include "dcmreg.h"
70 #include "machine/cpu.h"
71 #include "../hp300/isr.h"
72
73 #ifndef DEFAULT_BAUD_RATE
74 #define DEFAULT_BAUD_RATE 9600
75 #endif
76
77 int ttrstrt();
78 int dcmprobe(), dcmstart(), dcmintr(), dcmparam();
79
80 struct driver dcmdriver = {
81 dcmprobe, "dcm",
82 };
83
84 #define NDCMLINE (NDCM*4)
85
86 struct tty dcm_tty[NDCMLINE];
87 struct modemreg *dcm_modem[NDCMLINE];
88 char mcndlast[NDCMLINE]; /* XXX last modem status for line */
89 int ndcm = NDCMLINE;
90
91 int dcm_active;
92 int dcmsoftCAR[NDCM];
93 struct dcmdevice *dcm_addr[NDCM];
94 struct isr dcmisr[NDCM];
95
96 struct speedtab dcmspeedtab[] = {
97 0, BR_0,
98 50, BR_50,
99 75, BR_75,
100 110, BR_110,
101 134, BR_134,
102 150, BR_150,
103 300, BR_300,
104 600, BR_600,
105 1200, BR_1200,
106 1800, BR_1800,
107 2400, BR_2400,
108 4800, BR_4800,
109 9600, BR_9600,
110 19200, BR_19200,
111 38400, BR_38400,
112 -1, -1
113 };
114
115 /* u-sec per character based on baudrate (assumes 1 start/8 data/1 stop bit) */
116 #define DCM_USPERCH(s) (10000000 / (s))
117
118 /*
119 * Per board interrupt scheme. 16.7ms is the polling interrupt rate
120 * (16.7ms is about 550 baud, 38.4k is 72 chars in 16.7ms).
121 */
122 #define DIS_TIMER 0
123 #define DIS_PERCHAR 1
124 #define DIS_RESET 2
125
126 int dcmistype = -1; /* -1 == dynamic, 0 == timer, 1 == perchar */
127 int dcminterval = 5; /* interval (secs) between checks */
128 struct dcmischeme {
129 int dis_perchar; /* non-zero if interrupting per char */
130 long dis_time; /* last time examined */
131 int dis_intr; /* recv interrupts during last interval */
132 int dis_char; /* characters read during last interval */
133 } dcmischeme[NDCM];
134
135 /*
136 * Console support
137 */
138 #ifdef DCMCONSOLE
139 int dcmconsole = DCMCONSOLE;
140 #else
141 int dcmconsole = -1;
142 #endif
143 int dcmconsinit;
144 int dcmdefaultrate = DEFAULT_BAUD_RATE;
145 int dcmconbrdbusy = 0;
146 int dcmmajor;
147 extern struct tty *constty;
148
149 #ifdef KGDB
150 /*
151 * Kernel GDB support
152 */
153 #include "machine/remote-sl.h"
154
155 extern dev_t kgdb_dev;
156 extern int kgdb_rate;
157 extern int kgdb_debug_init;
158 #endif
159
160 /* #define IOSTATS */
161
162 #ifdef DEBUG
163 int dcmdebug = 0x0;
164 #define DDB_SIOERR 0x01
165 #define DDB_PARAM 0x02
166 #define DDB_INPUT 0x04
167 #define DDB_OUTPUT 0x08
168 #define DDB_INTR 0x10
169 #define DDB_IOCTL 0x20
170 #define DDB_INTSCHM 0x40
171 #define DDB_MODEM 0x80
172 #define DDB_OPENCLOSE 0x100
173 #endif
174
175 #ifdef IOSTATS
176 #define DCMRBSIZE 94
177 #define DCMXBSIZE 24
178
179 struct dcmstats {
180 long xints; /* # of xmit ints */
181 long xchars; /* # of xmit chars */
182 long xempty; /* times outq is empty in dcmstart */
183 long xrestarts; /* times completed while xmitting */
184 long rints; /* # of recv ints */
185 long rchars; /* # of recv chars */
186 long xsilo[DCMXBSIZE+2]; /* times this many chars xmit on one int */
187 long rsilo[DCMRBSIZE+2]; /* times this many chars read on one int */
188 } dcmstats[NDCM];
189 #endif
190
191 #define UNIT(x) minor(x)
192 #define BOARD(x) (((x) >> 2) & 0x3f)
193 #define PORT(x) ((x) & 3)
194 #define MKUNIT(b,p) (((b) << 2) | (p))
195
196 /*
197 * Conversion from "HP DCE" to almost-normal DCE: on the 638 8-port mux,
198 * the distribution panel uses "HP DCE" conventions. If requested via
199 * the device flags, we swap the inputs to something closer to normal DCE,
200 * allowing a straight-through cable to a DTE or a reversed cable
201 * to a DCE (reversing 2-3, 4-5, 8-20 and leaving 6 unconnected;
202 * this gets "DCD" on pin 20 and "CTS" on 4, but doesn't connect
203 * DSR or make RTS work, though). The following gives the full
204 * details of a cable from this mux panel to a modem:
205 *
206 * HP modem
207 * name pin pin name
208 * HP inputs:
209 * "Rx" 2 3 Tx
210 * CTS 4 5 CTS (only needed for CCTS_OFLOW)
211 * DCD 20 8 DCD
212 * "DSR" 9 6 DSR (unneeded)
213 * RI 22 22 RI (unneeded)
214 *
215 * HP outputs:
216 * "Tx" 3 2 Rx
217 * "DTR" 6 not connected
218 * "RTS" 8 20 DTR
219 * "SR" 23 4 RTS (often not needed)
220 */
221 #define FLAG_STDDCE 0x10 /* map inputs if this bit is set in flags */
222 #define hp2dce_in(ibits) (iconv[(ibits) & 0xf])
223 static char iconv[16] = {
224 0, MI_DM, MI_CTS, MI_CTS|MI_DM,
225 MI_CD, MI_CD|MI_DM, MI_CD|MI_CTS, MI_CD|MI_CTS|MI_DM,
226 MI_RI, MI_RI|MI_DM, MI_RI|MI_CTS, MI_RI|MI_CTS|MI_DM,
227 MI_RI|MI_CD, MI_RI|MI_CD|MI_DM, MI_RI|MI_CD|MI_CTS,
228 MI_RI|MI_CD|MI_CTS|MI_DM
229 };
230
231 dcmprobe(hd)
232 register struct hp_device *hd;
233 {
234 register struct dcmdevice *dcm;
235 register int i;
236 register int timo = 0;
237 int s, brd, isconsole, mbits;
238
239 dcm = (struct dcmdevice *)hd->hp_addr;
240 if ((dcm->dcm_rsid & 0x1f) != DCMID)
241 return (0);
242 brd = hd->hp_unit;
243 isconsole = (brd == BOARD(dcmconsole));
244 /*
245 * XXX selected console device (CONSUNIT) as determined by
246 * dcmcnprobe does not agree with logical numbering imposed
247 * by the config file (i.e. lowest address DCM is not unit
248 * CONSUNIT). Don't recognize this card.
249 */
250 if (isconsole && dcm != dcm_addr[BOARD(dcmconsole)])
251 return (0);
252
253 /*
254 * Empirically derived self-test magic
255 */
256 s = spltty();
257 dcm->dcm_rsid = DCMRS;
258 DELAY(50000); /* 5000 is not long enough */
259 dcm->dcm_rsid = 0;
260 dcm->dcm_ic = IC_IE;
261 dcm->dcm_cr = CR_SELFT;
262 while ((dcm->dcm_ic & IC_IR) == 0)
263 if (++timo == 20000)
264 return (0);
265 DELAY(50000) /* XXX why is this needed ???? */
266 while ((dcm->dcm_iir & IIR_SELFT) == 0)
267 if (++timo == 400000)
268 return (0);
269 DELAY(50000) /* XXX why is this needed ???? */
270 if (dcm->dcm_stcon != ST_OK) {
271 if (!isconsole)
272 printf("dcm%d: self test failed: %x\n",
273 brd, dcm->dcm_stcon);
274 return (0);
275 }
276 dcm->dcm_ic = IC_ID;
277 splx(s);
278
279 hd->hp_ipl = DCMIPL(dcm->dcm_ic);
280 dcm_addr[brd] = dcm;
281 dcm_active |= 1 << brd;
282 dcmsoftCAR[brd] = hd->hp_flags;
283 dcmisr[brd].isr_ipl = hd->hp_ipl;
284 dcmisr[brd].isr_arg = brd;
285 dcmisr[brd].isr_intr = dcmintr;
286 isrlink(&dcmisr[brd]);
287 #ifdef KGDB
288 if (major(kgdb_dev) == dcmmajor && BOARD(kgdb_dev) == brd) {
289 if (dcmconsole == UNIT(kgdb_dev))
290 kgdb_dev = NODEV; /* can't debug over console port */
291 #ifndef KGDB_CHEAT
292 /*
293 * The following could potentially be replaced
294 * by the corresponding code in dcmcnprobe.
295 */
296 else {
297 (void) dcminit(kgdb_dev, kgdb_rate);
298 if (kgdb_debug_init) {
299 printf("dcm%d: ", UNIT(kgdb_dev));
300 kgdb_connect(1);
301 } else
302 printf("dcm%d: kgdb enabled\n", UNIT(kgdb_dev));
303 }
304 /* end could be replaced */
305 #endif
306 }
307 #endif
308 if (dcmistype == DIS_TIMER)
309 dcmsetischeme(brd, DIS_RESET|DIS_TIMER);
310 else
311 dcmsetischeme(brd, DIS_RESET|DIS_PERCHAR);
312
313 /* load pointers to modem control */
314 dcm_modem[MKUNIT(brd, 0)] = &dcm->dcm_modem0;
315 dcm_modem[MKUNIT(brd, 1)] = &dcm->dcm_modem1;
316 dcm_modem[MKUNIT(brd, 2)] = &dcm->dcm_modem2;
317 dcm_modem[MKUNIT(brd, 3)] = &dcm->dcm_modem3;
318 /* set DCD (modem) and CTS (flow control) on all ports */
319 if (dcmsoftCAR[brd] & FLAG_STDDCE)
320 mbits = hp2dce_in(MI_CD|MI_CTS);
321 else
322 mbits = MI_CD|MI_CTS;
323 for (i = 0; i < 4; i++)
324 dcm_modem[MKUNIT(brd, i)]->mdmmsk = mbits;
325
326 dcm->dcm_ic = IC_IE; /* turn all interrupts on */
327 /*
328 * Need to reset baud rate, etc. of next print so reset dcmconsole.
329 * Also make sure console is always "hardwired"
330 */
331 if (isconsole) {
332 dcmconsinit = 0;
333 dcmsoftCAR[brd] |= (1 << PORT(dcmconsole));
334 }
335 return (1);
336 }
337
338 /* ARGSUSED */
339 #ifdef __STDC__
340 dcmopen(dev_t dev, int flag, int mode, struct proc *p)
341 #else
342 dcmopen(dev, flag, mode, p)
343 dev_t dev;
344 int flag, mode;
345 struct proc *p;
346 #endif
347 {
348 register struct tty *tp;
349 register int unit, brd;
350 int error = 0, mbits;
351
352 unit = UNIT(dev);
353 brd = BOARD(unit);
354 if (unit >= NDCMLINE || (dcm_active & (1 << brd)) == 0)
355 return (ENXIO);
356 tp = &dcm_tty[unit];
357 tp->t_oproc = dcmstart;
358 tp->t_param = dcmparam;
359 tp->t_dev = dev;
360 if ((tp->t_state & TS_ISOPEN) == 0) {
361 tp->t_state |= TS_WOPEN;
362 ttychars(tp);
363 if (tp->t_ispeed == 0) {
364 tp->t_iflag = TTYDEF_IFLAG;
365 tp->t_oflag = TTYDEF_OFLAG;
366 tp->t_cflag = TTYDEF_CFLAG;
367 tp->t_lflag = TTYDEF_LFLAG;
368 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
369 }
370 (void) dcmparam(tp, &tp->t_termios);
371 ttsetwater(tp);
372 } else if (tp->t_state&TS_XCLUDE && p->p_ucred->cr_uid != 0)
373 return (EBUSY);
374 mbits = MO_ON;
375 if (dcmsoftCAR[brd] & FLAG_STDDCE)
376 mbits |= MO_SR; /* pin 23, could be used as RTS */
377 (void) dcmmctl(dev, mbits, DMSET); /* enable port */
378 if ((dcmsoftCAR[brd] & (1 << PORT(unit))) ||
379 (dcmmctl(dev, MO_OFF, DMGET) & MI_CD))
380 tp->t_state |= TS_CARR_ON;
381 #ifdef DEBUG
382 if (dcmdebug & DDB_MODEM)
383 printf("dcm%d: dcmopen port %d softcarr %c\n",
384 brd, unit, (tp->t_state & TS_CARR_ON) ? '1' : '0');
385 #endif
386 (void) spltty();
387 while ((flag&O_NONBLOCK) == 0 && (tp->t_cflag&CLOCAL) == 0 &&
388 (tp->t_state & TS_CARR_ON) == 0) {
389 tp->t_state |= TS_WOPEN;
390 if (error = ttysleep(tp, (caddr_t)&tp->t_rawq, TTIPRI | PCATCH,
391 ttopen, 0))
392 break;
393 }
394 (void) spl0();
395
396 #ifdef DEBUG
397 if (dcmdebug & DDB_OPENCLOSE)
398 printf("dcmopen: u %x st %x fl %x\n",
399 unit, tp->t_state, tp->t_flags);
400 #endif
401 if (error == 0)
402 error = (*linesw[tp->t_line].l_open)(dev, tp);
403 return (error);
404 }
405
406 /*ARGSUSED*/
407 dcmclose(dev, flag, mode, p)
408 dev_t dev;
409 int flag, mode;
410 struct proc *p;
411 {
412 register struct tty *tp;
413 int unit;
414
415 unit = UNIT(dev);
416 tp = &dcm_tty[unit];
417 (*linesw[tp->t_line].l_close)(tp, flag);
418 if (tp->t_cflag&HUPCL || tp->t_state&TS_WOPEN ||
419 (tp->t_state&TS_ISOPEN) == 0)
420 (void) dcmmctl(dev, MO_OFF, DMSET);
421 #ifdef DEBUG
422 if (dcmdebug & DDB_OPENCLOSE)
423 printf("dcmclose: u %x st %x fl %x\n",
424 unit, tp->t_state, tp->t_flags);
425 #endif
426 ttyclose(tp);
427 return (0);
428 }
429
430 dcmread(dev, uio, flag)
431 dev_t dev;
432 struct uio *uio;
433 {
434 register struct tty *tp;
435
436 tp = &dcm_tty[UNIT(dev)];
437 return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
438 }
439
440 dcmwrite(dev, uio, flag)
441 dev_t dev;
442 struct uio *uio;
443 {
444 int unit = UNIT(dev);
445 register struct tty *tp;
446
447 tp = &dcm_tty[unit];
448 /*
449 * XXX we disallow virtual consoles if the physical console is
450 * a serial port. This is in case there is a display attached that
451 * is not the console. In that situation we don't need/want the X
452 * server taking over the console.
453 */
454 if (constty && unit == dcmconsole)
455 constty = NULL;
456 return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
457 }
458
459 dcmintr(brd)
460 register int brd;
461 {
462 register struct dcmdevice *dcm = dcm_addr[brd];
463 register struct dcmischeme *dis;
464 register int unit = MKUNIT(brd, 0);
465 register int code, i;
466 int pcnd[4], mcode, mcnd[4];
467
468 /*
469 * Do all guarded register accesses right off to minimize
470 * block out of hardware.
471 */
472 SEM_LOCK(dcm);
473 if ((dcm->dcm_ic & IC_IR) == 0) {
474 SEM_UNLOCK(dcm);
475 return (0);
476 }
477 for (i = 0; i < 4; i++) {
478 pcnd[i] = dcm->dcm_icrtab[i].dcm_data;
479 dcm->dcm_icrtab[i].dcm_data = 0;
480 code = dcm_modem[unit+i]->mdmin;
481 if (dcmsoftCAR[brd] & FLAG_STDDCE)
482 code = hp2dce_in(code);
483 mcnd[i] = code;
484 }
485 code = dcm->dcm_iir & IIR_MASK;
486 dcm->dcm_iir = 0; /* XXX doc claims read clears interrupt?! */
487 mcode = dcm->dcm_modemintr;
488 dcm->dcm_modemintr = 0;
489 SEM_UNLOCK(dcm);
490
491 #ifdef DEBUG
492 if (dcmdebug & DDB_INTR) {
493 printf("dcmintr(%d): iir %x pc %x/%x/%x/%x ",
494 brd, code, pcnd[0], pcnd[1], pcnd[2], pcnd[3]);
495 printf("miir %x mc %x/%x/%x/%x\n",
496 mcode, mcnd[0], mcnd[1], mcnd[2], mcnd[3]);
497 }
498 #endif
499 if (code & IIR_TIMEO)
500 dcmrint(brd, dcm);
501 if (code & IIR_PORT0)
502 dcmpint(unit+0, pcnd[0], dcm);
503 if (code & IIR_PORT1)
504 dcmpint(unit+1, pcnd[1], dcm);
505 if (code & IIR_PORT2)
506 dcmpint(unit+2, pcnd[2], dcm);
507 if (code & IIR_PORT3)
508 dcmpint(unit+3, pcnd[3], dcm);
509 if (code & IIR_MODM) {
510 if (mcode == 0 || mcode & 0x1) /* mcode==0 -> 98642 board */
511 dcmmint(unit+0, mcnd[0], dcm);
512 if (mcode & 0x2)
513 dcmmint(unit+1, mcnd[1], dcm);
514 if (mcode & 0x4)
515 dcmmint(unit+2, mcnd[2], dcm);
516 if (mcode & 0x8)
517 dcmmint(unit+3, mcnd[3], dcm);
518 }
519
520 dis = &dcmischeme[brd];
521 /*
522 * Chalk up a receiver interrupt if the timer running or one of
523 * the ports reports a special character interrupt.
524 */
525 if ((code & IIR_TIMEO) ||
526 ((pcnd[0]|pcnd[1]|pcnd[2]|pcnd[3]) & IT_SPEC))
527 dis->dis_intr++;
528 /*
529 * See if it is time to check/change the interrupt rate.
530 */
531 if (dcmistype < 0 &&
532 (i = time.tv_sec - dis->dis_time) >= dcminterval) {
533 /*
534 * If currently per-character and averaged over 70 interrupts
535 * per-second (66 is threshold of 600 baud) in last interval,
536 * switch to timer mode.
537 *
538 * XXX decay counts ala load average to avoid spikes?
539 */
540 if (dis->dis_perchar && dis->dis_intr > 70 * i)
541 dcmsetischeme(brd, DIS_TIMER);
542 /*
543 * If currently using timer and had more interrupts than
544 * received characters in the last interval, switch back
545 * to per-character. Note that after changing to per-char
546 * we must process any characters already in the queue
547 * since they may have arrived before the bitmap was setup.
548 *
549 * XXX decay counts?
550 */
551 else if (!dis->dis_perchar && dis->dis_intr > dis->dis_char) {
552 dcmsetischeme(brd, DIS_PERCHAR);
553 dcmrint(brd, dcm);
554 }
555 dis->dis_intr = dis->dis_char = 0;
556 dis->dis_time = time.tv_sec;
557 }
558 return (1);
559 }
560
561 /*
562 * Port interrupt. Can be two things:
563 * First, it might be a special character (exception interrupt);
564 * Second, it may be a buffer empty (transmit interrupt);
565 */
566 dcmpint(unit, code, dcm)
567 int unit, code;
568 struct dcmdevice *dcm;
569 {
570 struct tty *tp = &dcm_tty[unit];
571
572 if (code & IT_SPEC)
573 dcmreadbuf(unit, dcm, tp);
574 if (code & IT_TX)
575 dcmxint(unit, dcm, tp);
576 }
577
578 dcmrint(brd, dcm)
579 int brd;
580 register struct dcmdevice *dcm;
581 {
582 register int i, unit;
583 register struct tty *tp;
584
585 unit = MKUNIT(brd, 0);
586 tp = &dcm_tty[unit];
587 for (i = 0; i < 4; i++, tp++, unit++)
588 dcmreadbuf(unit, dcm, tp);
589 }
590
591 dcmreadbuf(unit, dcm, tp)
592 int unit;
593 register struct dcmdevice *dcm;
594 register struct tty *tp;
595 {
596 int port = PORT(unit);
597 register struct dcmpreg *pp = dcm_preg(dcm, port);
598 register struct dcmrfifo *fifo;
599 register int c, stat;
600 register unsigned head;
601 int nch = 0;
602 #ifdef IOSTATS
603 struct dcmstats *dsp = &dcmstats[BOARD(unit)];
604
605 dsp->rints++;
606 #endif
607 if ((tp->t_state & TS_ISOPEN) == 0) {
608 #ifdef KGDB
609 if ((makedev(dcmmajor, unit) == kgdb_dev) &&
610 (head = pp->r_head & RX_MASK) != (pp->r_tail & RX_MASK) &&
611 dcm->dcm_rfifos[3-port][head>>1].data_char == FRAME_END) {
612 pp->r_head = (head + 2) & RX_MASK;
613 kgdb_connect(0); /* trap into kgdb */
614 return;
615 }
616 #endif /* KGDB */
617 pp->r_head = pp->r_tail & RX_MASK;
618 return;
619 }
620
621 head = pp->r_head & RX_MASK;
622 fifo = &dcm->dcm_rfifos[3-port][head>>1];
623 /*
624 * XXX upper bound on how many chars we will take in one swallow?
625 */
626 while (head != (pp->r_tail & RX_MASK)) {
627 /*
628 * Get character/status and update head pointer as fast
629 * as possible to make room for more characters.
630 */
631 c = fifo->data_char;
632 stat = fifo->data_stat;
633 head = (head + 2) & RX_MASK;
634 pp->r_head = head;
635 fifo = head ? fifo+1 : &dcm->dcm_rfifos[3-port][0];
636 nch++;
637
638 #ifdef DEBUG
639 if (dcmdebug & DDB_INPUT)
640 printf("dcmreadbuf(%d): c%x('%c') s%x f%x h%x t%x\n",
641 unit, c&0xFF, c, stat&0xFF,
642 tp->t_flags, head, pp->r_tail);
643 #endif
644 /*
645 * Check for and handle errors
646 */
647 if (stat & RD_MASK) {
648 #ifdef DEBUG
649 if (dcmdebug & (DDB_INPUT|DDB_SIOERR))
650 printf("dcmreadbuf(%d): err: c%x('%c') s%x\n",
651 unit, stat, c&0xFF, c);
652 #endif
653 if (stat & (RD_BD | RD_FE))
654 c |= TTY_FE;
655 else if (stat & RD_PE)
656 c |= TTY_PE;
657 else if (stat & RD_OVF)
658 log(LOG_WARNING,
659 "dcm%d: silo overflow\n", unit);
660 else if (stat & RD_OE)
661 log(LOG_WARNING,
662 "dcm%d: uart overflow\n", unit);
663 }
664 (*linesw[tp->t_line].l_rint)(c, tp);
665 }
666 dcmischeme[BOARD(unit)].dis_char += nch;
667 #ifdef IOSTATS
668 dsp->rchars += nch;
669 if (nch <= DCMRBSIZE)
670 dsp->rsilo[nch]++;
671 else
672 dsp->rsilo[DCMRBSIZE+1]++;
673 #endif
674 }
675
676 dcmxint(unit, dcm, tp)
677 int unit;
678 struct dcmdevice *dcm;
679 register struct tty *tp;
680 {
681 tp->t_state &= ~TS_BUSY;
682 if (tp->t_state & TS_FLUSH)
683 tp->t_state &= ~TS_FLUSH;
684 (*linesw[tp->t_line].l_start)(tp);
685 }
686
687 dcmmint(unit, mcnd, dcm)
688 register int unit;
689 register struct dcmdevice *dcm;
690 int mcnd;
691 {
692 register struct tty *tp;
693 int delta;
694
695 #ifdef DEBUG
696 if (dcmdebug & DDB_MODEM)
697 printf("dcmmint: port %d mcnd %x mcndlast %x\n",
698 unit, mcnd, mcndlast[unit]);
699 #endif
700 tp = &dcm_tty[unit];
701 delta = mcnd ^ mcndlast[unit];
702 mcndlast[unit] = mcnd;
703 if ((delta & MI_CTS) && (tp->t_state & TS_ISOPEN) &&
704 (tp->t_flags & CCTS_OFLOW)) {
705 if (mcnd & MI_CTS) {
706 tp->t_state &= ~TS_TTSTOP;
707 ttstart(tp);
708 } else
709 tp->t_state |= TS_TTSTOP; /* inline dcmstop */
710 }
711 if (delta & MI_CD) {
712 if (mcnd & MI_CD)
713 (void)(*linesw[tp->t_line].l_modem)(tp, 1);
714 else if ((dcmsoftCAR[BOARD(unit)] & (1 << PORT(unit))) == 0 &&
715 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) {
716 dcm_modem[unit]->mdmout = MO_OFF;
717 SEM_LOCK(dcm);
718 dcm->dcm_modemchng |= 1<<(unit & 3);
719 dcm->dcm_cr |= CR_MODM;
720 SEM_UNLOCK(dcm);
721 DELAY(10); /* time to change lines */
722 }
723 }
724 }
725
726 dcmioctl(dev, cmd, data, flag)
727 dev_t dev;
728 caddr_t data;
729 {
730 register struct tty *tp;
731 register int unit = UNIT(dev);
732 register struct dcmdevice *dcm;
733 register int port;
734 int error, s;
735
736 #ifdef DEBUG
737 if (dcmdebug & DDB_IOCTL)
738 printf("dcmioctl: unit %d cmd %x data %x flag %x\n",
739 unit, cmd, *data, flag);
740 #endif
741 tp = &dcm_tty[unit];
742 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag);
743 if (error >= 0)
744 return (error);
745 error = ttioctl(tp, cmd, data, flag);
746 if (error >= 0)
747 return (error);
748
749 port = PORT(unit);
750 dcm = dcm_addr[BOARD(unit)];
751 switch (cmd) {
752 case TIOCSBRK:
753 /*
754 * Wait for transmitter buffer to empty
755 */
756 s = spltty();
757 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
758 DELAY(DCM_USPERCH(tp->t_ospeed));
759 SEM_LOCK(dcm);
760 dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
761 dcm->dcm_cr |= (1 << port); /* start break */
762 SEM_UNLOCK(dcm);
763 splx(s);
764 break;
765
766 case TIOCCBRK:
767 SEM_LOCK(dcm);
768 dcm->dcm_cmdtab[port].dcm_data |= CT_BRK;
769 dcm->dcm_cr |= (1 << port); /* end break */
770 SEM_UNLOCK(dcm);
771 break;
772
773 case TIOCSDTR:
774 (void) dcmmctl(dev, MO_ON, DMBIS);
775 break;
776
777 case TIOCCDTR:
778 (void) dcmmctl(dev, MO_ON, DMBIC);
779 break;
780
781 case TIOCMSET:
782 (void) dcmmctl(dev, *(int *)data, DMSET);
783 break;
784
785 case TIOCMBIS:
786 (void) dcmmctl(dev, *(int *)data, DMBIS);
787 break;
788
789 case TIOCMBIC:
790 (void) dcmmctl(dev, *(int *)data, DMBIC);
791 break;
792
793 case TIOCMGET:
794 *(int *)data = dcmmctl(dev, 0, DMGET);
795 break;
796
797 default:
798 return (ENOTTY);
799 }
800 return (0);
801 }
802
803 dcmparam(tp, t)
804 register struct tty *tp;
805 register struct termios *t;
806 {
807 register struct dcmdevice *dcm;
808 register int port, mode, cflag = t->c_cflag;
809 int ospeed = ttspeedtab(t->c_ospeed, dcmspeedtab);
810
811 /* check requested parameters */
812 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
813 return (EINVAL);
814 /* and copy to tty */
815 tp->t_ispeed = t->c_ispeed;
816 tp->t_ospeed = t->c_ospeed;
817 tp->t_cflag = cflag;
818 if (ospeed == 0) {
819 (void) dcmmctl(UNIT(tp->t_dev), MO_OFF, DMSET);
820 return (0);
821 }
822
823 mode = 0;
824 switch (cflag&CSIZE) {
825 case CS5:
826 mode = LC_5BITS; break;
827 case CS6:
828 mode = LC_6BITS; break;
829 case CS7:
830 mode = LC_7BITS; break;
831 case CS8:
832 mode = LC_8BITS; break;
833 }
834 if (cflag&PARENB) {
835 if (cflag&PARODD)
836 mode |= LC_PODD;
837 else
838 mode |= LC_PEVEN;
839 }
840 if (cflag&CSTOPB)
841 mode |= LC_2STOP;
842 else
843 mode |= LC_1STOP;
844 #ifdef DEBUG
845 if (dcmdebug & DDB_PARAM)
846 printf("dcmparam(%d): cflag %x mode %x speed %d uperch %d\n",
847 UNIT(tp->t_dev), cflag, mode, tp->t_ospeed,
848 DCM_USPERCH(tp->t_ospeed));
849 #endif
850
851 port = PORT(tp->t_dev);
852 dcm = dcm_addr[BOARD(tp->t_dev)];
853 /*
854 * Wait for transmitter buffer to empty.
855 */
856 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
857 DELAY(DCM_USPERCH(tp->t_ospeed));
858 /*
859 * Make changes known to hardware.
860 */
861 dcm->dcm_data[port].dcm_baud = ospeed;
862 dcm->dcm_data[port].dcm_conf = mode;
863 SEM_LOCK(dcm);
864 dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
865 dcm->dcm_cr |= (1 << port);
866 SEM_UNLOCK(dcm);
867 /*
868 * Delay for config change to take place. Weighted by baud.
869 * XXX why do we do this?
870 */
871 DELAY(16 * DCM_USPERCH(tp->t_ospeed));
872 return (0);
873 }
874
875 dcmstart(tp)
876 register struct tty *tp;
877 {
878 register struct dcmdevice *dcm;
879 register struct dcmpreg *pp;
880 register struct dcmtfifo *fifo;
881 register char *bp;
882 register unsigned tail, next;
883 register int port, nch;
884 unsigned head;
885 char buf[16];
886 int s;
887 #ifdef IOSTATS
888 struct dcmstats *dsp = &dcmstats[BOARD(tp->t_dev)];
889 int tch = 0;
890 #endif
891
892 s = spltty();
893 #ifdef IOSTATS
894 dsp->xints++;
895 #endif
896 #ifdef DEBUG
897 if (dcmdebug & DDB_OUTPUT)
898 printf("dcmstart(%d): state %x flags %x outcc %d\n",
899 UNIT(tp->t_dev), tp->t_state, tp->t_flags,
900 tp->t_outq.c_cc);
901 #endif
902 if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
903 goto out;
904 if (tp->t_outq.c_cc <= tp->t_lowat) {
905 if (tp->t_state&TS_ASLEEP) {
906 tp->t_state &= ~TS_ASLEEP;
907 wakeup((caddr_t)&tp->t_outq);
908 }
909 selwakeup(&tp->t_wsel);
910 }
911 if (tp->t_outq.c_cc == 0) {
912 #ifdef IOSTATS
913 dsp->xempty++;
914 #endif
915 goto out;
916 }
917
918 dcm = dcm_addr[BOARD(tp->t_dev)];
919 port = PORT(tp->t_dev);
920 pp = dcm_preg(dcm, port);
921 tail = pp->t_tail & TX_MASK;
922 next = (tail + 1) & TX_MASK;
923 head = pp->t_head & TX_MASK;
924 if (head == next)
925 goto out;
926 fifo = &dcm->dcm_tfifos[3-port][tail];
927 again:
928 nch = q_to_b(&tp->t_outq, buf, (head - next) & TX_MASK);
929 #ifdef IOSTATS
930 tch += nch;
931 #endif
932 #ifdef DEBUG
933 if (dcmdebug & DDB_OUTPUT)
934 printf("\thead %x tail %x nch %d\n", head, tail, nch);
935 #endif
936 /*
937 * Loop transmitting all the characters we can.
938 */
939 for (bp = buf; --nch >= 0; bp++) {
940 fifo->data_char = *bp;
941 pp->t_tail = next;
942 /*
943 * If this is the first character,
944 * get the hardware moving right now.
945 */
946 if (bp == buf) {
947 tp->t_state |= TS_BUSY;
948 SEM_LOCK(dcm);
949 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
950 dcm->dcm_cr |= (1 << port);
951 SEM_UNLOCK(dcm);
952 }
953 tail = next;
954 fifo = tail ? fifo+1 : &dcm->dcm_tfifos[3-port][0];
955 next = (next + 1) & TX_MASK;
956 }
957 /*
958 * Head changed while we were loading the buffer,
959 * go back and load some more if we can.
960 */
961 if (tp->t_outq.c_cc && head != (pp->t_head & TX_MASK)) {
962 #ifdef IOSTATS
963 dsp->xrestarts++;
964 #endif
965 head = pp->t_head & TX_MASK;
966 goto again;
967 }
968
969 /*
970 * Kick it one last time in case it finished while we were
971 * loading the last bunch.
972 */
973 if (bp > &buf[1]) {
974 tp->t_state |= TS_BUSY;
975 SEM_LOCK(dcm);
976 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
977 dcm->dcm_cr |= (1 << port);
978 SEM_UNLOCK(dcm);
979 }
980 #ifdef DEBUG
981 if (dcmdebug & DDB_INTR)
982 printf("dcmstart(%d): head %x tail %x outqcc %d\n",
983 UNIT(tp->t_dev), head, tail, tp->t_outq.c_cc);
984 #endif
985 out:
986 #ifdef IOSTATS
987 dsp->xchars += tch;
988 if (tch <= DCMXBSIZE)
989 dsp->xsilo[tch]++;
990 else
991 dsp->xsilo[DCMXBSIZE+1]++;
992 #endif
993 splx(s);
994 }
995
996 /*
997 * Stop output on a line.
998 */
999 dcmstop(tp, flag)
1000 register struct tty *tp;
1001 {
1002 int s;
1003
1004 s = spltty();
1005 if (tp->t_state & TS_BUSY) {
1006 /* XXX is there some way to safely stop transmission? */
1007 if ((tp->t_state&TS_TTSTOP) == 0)
1008 tp->t_state |= TS_FLUSH;
1009 }
1010 splx(s);
1011 }
1012
1013 /*
1014 * Modem control
1015 */
1016 dcmmctl(dev, bits, how)
1017 dev_t dev;
1018 int bits, how;
1019 {
1020 register struct dcmdevice *dcm;
1021 int s, unit, brd, hit = 0;
1022
1023 unit = UNIT(dev);
1024 #ifdef DEBUG
1025 if (dcmdebug & DDB_MODEM)
1026 printf("dcmmctl(%d) unit %d bits 0x%x how %x\n",
1027 BOARD(unit), unit, bits, how);
1028 #endif
1029
1030 brd = BOARD(unit);
1031 dcm = dcm_addr[brd];
1032 s = spltty();
1033 switch (how) {
1034
1035 case DMSET:
1036 dcm_modem[unit]->mdmout = bits;
1037 hit++;
1038 break;
1039
1040 case DMBIS:
1041 dcm_modem[unit]->mdmout |= bits;
1042 hit++;
1043 break;
1044
1045 case DMBIC:
1046 dcm_modem[unit]->mdmout &= ~bits;
1047 hit++;
1048 break;
1049
1050 case DMGET:
1051 bits = dcm_modem[unit]->mdmin;
1052 if (dcmsoftCAR[brd] & FLAG_STDDCE)
1053 bits = hp2dce_in(bits);
1054 break;
1055 }
1056 if (hit) {
1057 SEM_LOCK(dcm);
1058 dcm->dcm_modemchng |= 1<<(unit & 3);
1059 dcm->dcm_cr |= CR_MODM;
1060 SEM_UNLOCK(dcm);
1061 DELAY(10); /* delay until done */
1062 (void) splx(s);
1063 }
1064 return (bits);
1065 }
1066
1067 /*
1068 * Set board to either interrupt per-character or at a fixed interval.
1069 */
1070 dcmsetischeme(brd, flags)
1071 int brd, flags;
1072 {
1073 register struct dcmdevice *dcm = dcm_addr[brd];
1074 register struct dcmischeme *dis = &dcmischeme[brd];
1075 register int i;
1076 u_char mask;
1077 int perchar = flags & DIS_PERCHAR;
1078
1079 #ifdef DEBUG
1080 if (dcmdebug & DDB_INTSCHM)
1081 printf("dcmsetischeme(%d, %d): cur %d, ints %d, chars %d\n",
1082 brd, perchar, dis->dis_perchar,
1083 dis->dis_intr, dis->dis_char);
1084 if ((flags & DIS_RESET) == 0 && perchar == dis->dis_perchar) {
1085 printf("dcmsetischeme(%d): redundent request %d\n",
1086 brd, perchar);
1087 return;
1088 }
1089 #endif
1090 /*
1091 * If perchar is non-zero, we enable interrupts on all characters
1092 * otherwise we disable perchar interrupts and use periodic
1093 * polling interrupts.
1094 */
1095 dis->dis_perchar = perchar;
1096 mask = perchar ? 0xf : 0x0;
1097 for (i = 0; i < 256; i++)
1098 dcm->dcm_bmap[i].data_data = mask;
1099 /*
1100 * Don't slow down tandem mode, interrupt on flow control
1101 * chars for any port on the board.
1102 */
1103 if (!perchar) {
1104 register struct tty *tp = &dcm_tty[MKUNIT(brd, 0)];
1105 int c;
1106
1107 for (i = 0; i < 4; i++, tp++) {
1108 if ((c = tp->t_cc[VSTART]) != _POSIX_VDISABLE)
1109 dcm->dcm_bmap[c].data_data |= (1 << i);
1110 if ((c = tp->t_cc[VSTOP]) != _POSIX_VDISABLE)
1111 dcm->dcm_bmap[c].data_data |= (1 << i);
1112 }
1113 }
1114 /*
1115 * Board starts with timer disabled so if first call is to
1116 * set perchar mode then we don't want to toggle the timer.
1117 */
1118 if (flags == (DIS_RESET|DIS_PERCHAR))
1119 return;
1120 /*
1121 * Toggle card 16.7ms interrupts (we first make sure that card
1122 * has cleared the bit so it will see the toggle).
1123 */
1124 while (dcm->dcm_cr & CR_TIMER)
1125 ;
1126 SEM_LOCK(dcm);
1127 dcm->dcm_cr |= CR_TIMER;
1128 SEM_UNLOCK(dcm);
1129 }
1130
1131 /*
1132 * Following are all routines needed for DCM to act as console
1133 */
1134 #include "../hp300/cons.h"
1135
1136 dcmcnprobe(cp)
1137 struct consdev *cp;
1138 {
1139 register struct hp_hw *hw;
1140 int unit;
1141
1142 /* locate the major number */
1143 for (dcmmajor = 0; dcmmajor < nchrdev; dcmmajor++)
1144 if (cdevsw[dcmmajor].d_open == dcmopen)
1145 break;
1146
1147 /*
1148 * Implicitly assigns the lowest select code DCM card found to be
1149 * logical unit 0 (actually CONUNIT). If your config file does
1150 * anything different, you're screwed.
1151 */
1152 for (hw = sc_table; hw->hw_type; hw++)
1153 if (HW_ISDEV(hw, D_COMMDCM) && !badaddr((short *)hw->hw_kva))
1154 break;
1155 if (!HW_ISDEV(hw, D_COMMDCM)) {
1156 cp->cn_pri = CN_DEAD;
1157 return;
1158 }
1159 unit = CONUNIT;
1160 dcm_addr[BOARD(CONUNIT)] = (struct dcmdevice *)hw->hw_kva;
1161
1162 /* initialize required fields */
1163 cp->cn_dev = makedev(dcmmajor, unit);
1164 cp->cn_tp = &dcm_tty[unit];
1165 switch (dcm_addr[BOARD(unit)]->dcm_rsid) {
1166 case DCMID:
1167 cp->cn_pri = CN_NORMAL;
1168 break;
1169 case DCMID|DCMCON:
1170 cp->cn_pri = CN_REMOTE;
1171 break;
1172 default:
1173 cp->cn_pri = CN_DEAD;
1174 return;
1175 }
1176 /*
1177 * If dcmconsole is initialized, raise our priority.
1178 */
1179 if (dcmconsole == UNIT(unit))
1180 cp->cn_pri = CN_REMOTE;
1181 #ifdef KGDB_CHEAT
1182 /*
1183 * This doesn't currently work, at least not with ite consoles;
1184 * the console hasn't been initialized yet.
1185 */
1186 if (major(kgdb_dev) == dcmmajor && BOARD(kgdb_dev) == BOARD(unit)) {
1187 (void) dcminit(kgdb_dev, kgdb_rate);
1188 if (kgdb_debug_init) {
1189 /*
1190 * We assume that console is ready for us...
1191 * this assumes that a dca or ite console
1192 * has been selected already and will init
1193 * on the first putc.
1194 */
1195 printf("dcm%d: ", UNIT(kgdb_dev));
1196 kgdb_connect(1);
1197 }
1198 }
1199 #endif
1200 }
1201
1202 dcmcninit(cp)
1203 struct consdev *cp;
1204 {
1205 dcminit(cp->cn_dev, dcmdefaultrate);
1206 dcmconsinit = 1;
1207 dcmconsole = UNIT(cp->cn_dev);
1208 }
1209
1210 dcminit(dev, rate)
1211 dev_t dev;
1212 int rate;
1213 {
1214 register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
1215 int s, mode, port;
1216
1217 port = PORT(dev);
1218 mode = LC_8BITS | LC_1STOP;
1219 s = splhigh();
1220 /*
1221 * Wait for transmitter buffer to empty.
1222 */
1223 while (dcm->dcm_thead[port].ptr != dcm->dcm_ttail[port].ptr)
1224 DELAY(DCM_USPERCH(rate));
1225 /*
1226 * Make changes known to hardware.
1227 */
1228 dcm->dcm_data[port].dcm_baud = ttspeedtab(rate, dcmspeedtab);
1229 dcm->dcm_data[port].dcm_conf = mode;
1230 SEM_LOCK(dcm);
1231 dcm->dcm_cmdtab[port].dcm_data |= CT_CON;
1232 dcm->dcm_cr |= (1 << port);
1233 SEM_UNLOCK(dcm);
1234 /*
1235 * Delay for config change to take place. Weighted by baud.
1236 * XXX why do we do this?
1237 */
1238 DELAY(16 * DCM_USPERCH(rate));
1239 splx(s);
1240 }
1241
1242 dcmcngetc(dev)
1243 dev_t dev;
1244 {
1245 register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
1246 register struct dcmrfifo *fifo;
1247 register struct dcmpreg *pp;
1248 register unsigned head;
1249 int s, c, stat, port;
1250
1251 port = PORT(dev);
1252 pp = dcm_preg(dcm, port);
1253 s = splhigh();
1254 head = pp->r_head & RX_MASK;
1255 fifo = &dcm->dcm_rfifos[3-port][head>>1];
1256 while (head == (pp->r_tail & RX_MASK))
1257 ;
1258 /*
1259 * If board interrupts are enabled, just let our received char
1260 * interrupt through in case some other port on the board was
1261 * busy. Otherwise we must clear the interrupt.
1262 */
1263 SEM_LOCK(dcm);
1264 if ((dcm->dcm_ic & IC_IE) == 0)
1265 stat = dcm->dcm_iir;
1266 SEM_UNLOCK(dcm);
1267 c = fifo->data_char;
1268 stat = fifo->data_stat;
1269 pp->r_head = (head + 2) & RX_MASK;
1270 splx(s);
1271 return (c);
1272 }
1273
1274 /*
1275 * Console kernel output character routine.
1276 */
1277 dcmcnputc(dev, c)
1278 dev_t dev;
1279 int c;
1280 {
1281 register struct dcmdevice *dcm = dcm_addr[BOARD(dev)];
1282 register struct dcmpreg *pp;
1283 unsigned tail;
1284 int s, port, stat;
1285
1286 port = PORT(dev);
1287 pp = dcm_preg(dcm, port);
1288 s = splhigh();
1289 #ifdef KGDB
1290 if (dev != kgdb_dev)
1291 #endif
1292 if (dcmconsinit == 0) {
1293 (void) dcminit(dev, dcmdefaultrate);
1294 dcmconsinit = 1;
1295 }
1296 tail = pp->t_tail & TX_MASK;
1297 while (tail != (pp->t_head & TX_MASK))
1298 ;
1299 dcm->dcm_tfifos[3-port][tail].data_char = c;
1300 pp->t_tail = tail = (tail + 1) & TX_MASK;
1301 SEM_LOCK(dcm);
1302 dcm->dcm_cmdtab[port].dcm_data |= CT_TX;
1303 dcm->dcm_cr |= (1 << port);
1304 SEM_UNLOCK(dcm);
1305 while (tail != (pp->t_head & TX_MASK))
1306 ;
1307 /*
1308 * If board interrupts are enabled, just let our completion
1309 * interrupt through in case some other port on the board
1310 * was busy. Otherwise we must clear the interrupt.
1311 */
1312 if ((dcm->dcm_ic & IC_IE) == 0) {
1313 SEM_LOCK(dcm);
1314 stat = dcm->dcm_iir;
1315 SEM_UNLOCK(dcm);
1316 }
1317 splx(s);
1318 }
1319 #endif
1320