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dcmreg.h revision 1.2
      1  1.1      cgd /*
      2  1.1      cgd  * Copyright (c) 1988 University of Utah.
      3  1.1      cgd  * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
      4  1.1      cgd  * All rights reserved.
      5  1.1      cgd  *
      6  1.1      cgd  * This code is derived from software contributed to Berkeley by
      7  1.1      cgd  * the Systems Programming Group of the University of Utah Computer
      8  1.1      cgd  * Science Department.
      9  1.1      cgd  *
     10  1.1      cgd  * Redistribution and use in source and binary forms, with or without
     11  1.1      cgd  * modification, are permitted provided that the following conditions
     12  1.1      cgd  * are met:
     13  1.1      cgd  * 1. Redistributions of source code must retain the above copyright
     14  1.1      cgd  *    notice, this list of conditions and the following disclaimer.
     15  1.1      cgd  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1      cgd  *    notice, this list of conditions and the following disclaimer in the
     17  1.1      cgd  *    documentation and/or other materials provided with the distribution.
     18  1.1      cgd  * 3. All advertising materials mentioning features or use of this software
     19  1.1      cgd  *    must display the following acknowledgement:
     20  1.1      cgd  *	This product includes software developed by the University of
     21  1.1      cgd  *	California, Berkeley and its contributors.
     22  1.1      cgd  * 4. Neither the name of the University nor the names of its contributors
     23  1.1      cgd  *    may be used to endorse or promote products derived from this software
     24  1.1      cgd  *    without specific prior written permission.
     25  1.1      cgd  *
     26  1.1      cgd  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     27  1.1      cgd  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     28  1.1      cgd  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     29  1.1      cgd  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     30  1.1      cgd  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     31  1.1      cgd  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     32  1.1      cgd  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     33  1.1      cgd  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     34  1.1      cgd  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     35  1.1      cgd  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     36  1.1      cgd  * SUCH DAMAGE.
     37  1.1      cgd  *
     38  1.2  mycroft  *	from: Utah Hdr: dcmreg.h 1.1 90/07/09
     39  1.2  mycroft  *	from: @(#)dcmreg.h	7.4 (Berkeley) 11/4/90
     40  1.2  mycroft  *	$Id: dcmreg.h,v 1.2 1993/08/01 19:24:00 mycroft Exp $
     41  1.1      cgd  */
     42  1.1      cgd 
     43  1.1      cgd struct dcmdevice {	   /* host address, only odd bytes addressed */
     44  1.1      cgd 	u_char	dcm_pad0;
     45  1.1      cgd 	volatile u_char	dcm_rsid;	/* Reset / ID			0001 */
     46  1.1      cgd 	u_char	dcm_pad1;
     47  1.1      cgd 	volatile u_char	dcm_ic;		/* Interrupt control register	0003 */
     48  1.1      cgd 	u_char	dcm_pad2;
     49  1.1      cgd 	volatile u_char	dcm_sem;	/* Semaphore register		0005 */
     50  1.1      cgd 	u_char  dcm_pad3[0x7ffa];	/* Unaddressable	0006-7fff */
     51  1.1      cgd 	u_char	dcm_pad4;
     52  1.1      cgd 	volatile u_char	dcm_iir;	/* Interrupt ident register	8001 */
     53  1.1      cgd 	u_char	dcm_pad5;
     54  1.1      cgd 	volatile u_char	dcm_cr;		/* Command register		8003 */
     55  1.1      cgd 	u_char  dcm_pad6[0x3fc];	/* Card scratch		8004-83ff */
     56  1.1      cgd 	struct	dcmrfifo {
     57  1.1      cgd 		u_char	ptr_pad1;
     58  1.1      cgd 		volatile u_char	data_char;
     59  1.1      cgd 		u_char	ptr_pad2;
     60  1.1      cgd 		volatile u_char	data_stat;
     61  1.1      cgd 	} dcm_rfifos[4][0x80];		/* Receive queues		8400 */
     62  1.1      cgd 	struct  {
     63  1.1      cgd 		u_char	ptr_pad1;
     64  1.1      cgd 		volatile u_char	data_data;
     65  1.1      cgd 	} dcm_bmap[0x100];		/* Bitmap table			8c00 */
     66  1.1      cgd 	struct  {
     67  1.1      cgd 		u_char	ptr_pad;
     68  1.1      cgd 		volatile u_char	ptr;
     69  1.1      cgd 	} dcm_rhead[4];			/* Fifo head - receive		8e00 */
     70  1.1      cgd 	struct  {
     71  1.1      cgd 		u_char  ptr_pad;
     72  1.1      cgd 		volatile u_char  ptr;
     73  1.1      cgd 	} dcm_rtail[4];			/* Fifo tail - receive		8e08 */
     74  1.1      cgd 	struct  {
     75  1.1      cgd 		u_char	ptr_pad;
     76  1.1      cgd 		volatile u_char	ptr;
     77  1.1      cgd 	} dcm_thead[4];			/* Fifo head - transmit		8e10 */
     78  1.1      cgd 	struct  {
     79  1.1      cgd 		u_char	ptr_pad;
     80  1.1      cgd 		volatile u_char	ptr;
     81  1.1      cgd 	} dcm_ttail[4];			/* Fifo tail - transmit		8e18 */
     82  1.1      cgd 	struct  {
     83  1.1      cgd 		u_char	pad1;
     84  1.1      cgd 		volatile u_char	dcm_conf;
     85  1.1      cgd 		u_char	pad2;
     86  1.1      cgd 		volatile u_char	dcm_baud;
     87  1.1      cgd 	} dcm_data[4];			/* Configuration registers	8e20 */
     88  1.1      cgd 	struct	modemreg {
     89  1.1      cgd 		u_char	pad0;
     90  1.1      cgd 		volatile u_char  mdmin;		/* Modem in		8e31 */
     91  1.1      cgd 		u_char  pad1;
     92  1.1      cgd 		volatile u_char  mdmout;	/* Modem out		8e33 */
     93  1.1      cgd 		u_char  pad2;
     94  1.1      cgd 		volatile u_char  mdmmsk;	/* Modem mask		8e35 */
     95  1.1      cgd 	} dcm_modem0;
     96  1.1      cgd 	struct  {
     97  1.1      cgd 		u_char pad1;
     98  1.1      cgd 		volatile u_char dcm_data;
     99  1.1      cgd 	} dcm_cmdtab[4];		/* Command tables		8e36 */
    100  1.1      cgd 	struct  {
    101  1.1      cgd 		u_char pad1;
    102  1.1      cgd 		volatile u_char dcm_data;
    103  1.1      cgd 	} dcm_icrtab[4];		/* Interrupt data		8e3e */
    104  1.1      cgd 	u_char  dcm_pad10;
    105  1.1      cgd 	volatile u_char  dcm_stcon;	/* Self test condition		8e47 */
    106  1.1      cgd 	struct modemreg dcm_modem1;	/* 638 Modem port1		8e48 */
    107  1.1      cgd 	struct modemreg dcm_modem2;	/* 638 Modem port2		8e4e */
    108  1.1      cgd 	struct modemreg dcm_modem3;	/* 638 Modem port3		8e54 */
    109  1.1      cgd 	u_char	dcm_pad11;
    110  1.1      cgd 	volatile u_char	dcm_modemchng;	/* 638 Modem change mask	8e5b */
    111  1.1      cgd 	u_char	dcm_pad12;
    112  1.1      cgd 	volatile u_char	dcm_modemintr;	/* 638 Modem interrupt mask	8e5d */
    113  1.1      cgd 	u_char  dcm_pad13[0x82];	/* Undef Shared Ram	8e5e-8edf */
    114  1.1      cgd 	struct	dcmtfifo {
    115  1.1      cgd 	    u_char  ptr_pad1;
    116  1.1      cgd 	    volatile u_char  data_char;
    117  1.1      cgd 	} dcm_tfifos[4][0x10];		/* Transmit queues		8ee0 */
    118  1.1      cgd };
    119  1.1      cgd 
    120  1.1      cgd /*
    121  1.1      cgd  * Overlay structure for port specific queue "registers".
    122  1.1      cgd  * Starts at offset 0x8E00+(port*2).
    123  1.1      cgd  */
    124  1.1      cgd struct	dcmpreg {
    125  1.1      cgd 	u_char		pad0;		/* +00 */
    126  1.1      cgd 	volatile u_char	r_head;		/* +01 */
    127  1.1      cgd 	u_char		pad1[7];	/* +02 */
    128  1.1      cgd 	volatile u_char	r_tail;		/* +09 */
    129  1.1      cgd 	u_char		pad2[7];	/* +0A */
    130  1.1      cgd 	volatile u_char	t_head;		/* +11 */
    131  1.1      cgd 	u_char		pad3[7];	/* +12 */
    132  1.1      cgd 	volatile u_char	t_tail;		/* +19 */
    133  1.1      cgd };
    134  1.1      cgd #define	dcm_preg(d, p)	((struct dcmpreg *)((u_int)(d)+0x8e00+(p)*2))
    135  1.1      cgd 
    136  1.1      cgd /* interface reset/id */
    137  1.1      cgd #define DCMCON          0x80	/* REMOTE/LOCAL switch, read */
    138  1.1      cgd #define	DCMID		0x5	/* hardwired card id, read */
    139  1.1      cgd #define	DCMRS		0x80	/* software reset, write */
    140  1.1      cgd 
    141  1.1      cgd /* interrupt control */
    142  1.1      cgd #define	DCMIPL(x)	((((x) >> 4) & 3) + 3)	/* interupt level, read */
    143  1.1      cgd #define	IC_IR		0x40	/* interupt request, read */
    144  1.1      cgd #define	IC_IE		0x80	/* interupt enable, write */
    145  1.1      cgd #define	IC_ID		0x00	/* interupt disable, write */
    146  1.1      cgd 
    147  1.1      cgd 
    148  1.1      cgd /* Semaphore control */
    149  1.1      cgd #define	SEM_BSY		0x80	/* read */
    150  1.1      cgd #define SEM_CLR         0xFF	/* write */
    151  1.1      cgd #define SEM_LOCK(dcm)	while ((dcm)->dcm_sem & SEM_BSY)
    152  1.1      cgd #define SEM_UNLOCK(dcm)	(dcm)->dcm_sem = SEM_CLR
    153  1.1      cgd 
    154  1.1      cgd /* command register */
    155  1.1      cgd #define	CR_PORT0	0x1
    156  1.1      cgd #define	CR_PORT1	0x2
    157  1.1      cgd #define	CR_PORT2	0x4
    158  1.1      cgd #define	CR_PORT3	0x8
    159  1.1      cgd #define	CR_MODM		0x10	/* change modem output lines */
    160  1.1      cgd #define	CR_TIMER	0x20	/* 16ms interrupt timer toggle */
    161  1.1      cgd #define	CR_SELFT	0x40	/* run self test */
    162  1.1      cgd #define CR_MASK		0x7f
    163  1.1      cgd 
    164  1.1      cgd /* interrupt ident register */
    165  1.1      cgd #define	IIR_PORT0	0x1
    166  1.1      cgd #define	IIR_PORT1	0x2
    167  1.1      cgd #define	IIR_PORT2	0x4
    168  1.1      cgd #define	IIR_PORT3	0x8
    169  1.1      cgd #define	IIR_SELFT	0x10	/* self test completed */
    170  1.1      cgd #define	IIR_MODM	0x20	/* change in modem input lines */
    171  1.1      cgd #define	IIR_TIMEO	0x40	/* Time out */
    172  1.1      cgd #define IIR_MASK	0x7f
    173  1.1      cgd 
    174  1.1      cgd /* self test cond reg */
    175  1.1      cgd #define ST_OK           0xe0
    176  1.1      cgd 
    177  1.1      cgd /* Line configuration register */
    178  1.1      cgd #define	LC_PNO		0x00
    179  1.1      cgd #define	LC_PODD		0x01
    180  1.1      cgd #define	LC_PEVEN	0x02
    181  1.1      cgd #define	LC_PMSK		0x03
    182  1.1      cgd 
    183  1.1      cgd #define	LC_1STOP	0x00
    184  1.1      cgd #define	LC_1HSTOP	0x04
    185  1.1      cgd #define	LC_2STOP	0x08
    186  1.1      cgd #define	LC_STOPMSK	0x0b
    187  1.1      cgd 
    188  1.1      cgd #define	LC_8BITS	0x30
    189  1.1      cgd #define	LC_7BITS	0x20
    190  1.1      cgd #define	LC_6BITS	0x10
    191  1.1      cgd #define	LC_5BITS	0x00
    192  1.1      cgd #define	LC_BITMSK	0x30
    193  1.1      cgd 
    194  1.1      cgd /* baud reg */
    195  1.1      cgd #define BR_0		0x00
    196  1.1      cgd #define BR_50		0x01
    197  1.1      cgd #define BR_75		0x02
    198  1.1      cgd #define BR_110		0x03
    199  1.1      cgd #define BR_134  	0x04
    200  1.1      cgd #define BR_150		0x05
    201  1.1      cgd #define BR_300		0x06
    202  1.1      cgd #define BR_600		0x07
    203  1.1      cgd #define BR_900		0x08
    204  1.1      cgd #define BR_1200		0x09
    205  1.1      cgd #define BR_1800		0x0a
    206  1.1      cgd #define BR_2400		0x0b
    207  1.1      cgd #define BR_3600		0x0c
    208  1.1      cgd #define BR_4800		0x0d
    209  1.1      cgd #define BR_7200		0x0e
    210  1.1      cgd #define BR_9600		0x0f
    211  1.1      cgd #define BR_19200	0x10
    212  1.1      cgd #define BR_38400	0x11
    213  1.1      cgd 
    214  1.1      cgd /* modem input register */
    215  1.1      cgd #define	MI_CTS		0x08
    216  1.1      cgd #define	MI_DM		0x04
    217  1.1      cgd #define	MI_CD		0x02
    218  1.1      cgd #define	MI_RI		0x01
    219  1.1      cgd 
    220  1.1      cgd /* modem output register */
    221  1.1      cgd #define	MO_SR		0x04
    222  1.1      cgd #define	MO_DTR		0x02
    223  1.1      cgd #define	MO_RTS		0x01
    224  1.1      cgd #define	MO_ON		((MO_DTR) | (MO_RTS))
    225  1.1      cgd #define	MO_OFF		0x00
    226  1.1      cgd 
    227  1.1      cgd /* cmd-tab values, write */
    228  1.1      cgd #define CT_CON		0x1	/* configuration change */
    229  1.1      cgd #define CT_TX		0x2	/* transmit buffer not empty */
    230  1.1      cgd #define CT_BRK		0x4	/* toggle BREAK */
    231  1.1      cgd 
    232  1.1      cgd /* icr-tab values, read */
    233  1.1      cgd #define IT_TX		0x1	/* transmit buffer empty */
    234  1.1      cgd #define IT_SPEC		0x2	/* special character received */
    235  1.1      cgd 
    236  1.1      cgd /* data errors */
    237  1.1      cgd #define RD_OVF		0x08
    238  1.1      cgd #define RD_BD		0x10
    239  1.1      cgd #define RD_PE		0x20
    240  1.1      cgd #define RD_OE		0x40
    241  1.1      cgd #define RD_FE		0x80
    242  1.1      cgd #define RD_MASK		0xf8
    243  1.1      cgd 
    244  1.1      cgd /* Transmit/Receive masks */
    245  1.1      cgd #define TX_MASK		0x0f
    246  1.1      cgd #define RX_MASK		0xff
    247  1.1      cgd 
    248  1.1      cgd /*
    249  1.1      cgd  * WARNING: Serial console is assumed to be the lowest select-code card
    250  1.1      cgd  * and that card must be logical unit 0 in the kernel.  Also, CONUNIT must
    251  1.1      cgd  * be 1, the port affected by the REMOTE/LOCAL switch.
    252  1.1      cgd  */
    253  1.1      cgd #define CONUNIT	(1)
    254