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dmareg.h revision 1.10
      1  1.10   scottr /*	$NetBSD: dmareg.h,v 1.10 1997/04/01 03:10:58 scottr Exp $	*/
      2   1.4      cgd 
      3   1.1      cgd /*
      4   1.3  mycroft  * Copyright (c) 1982, 1990, 1993
      5   1.3  mycroft  *	The Regents of the University of California.  All rights reserved.
      6   1.1      cgd  *
      7   1.1      cgd  * Redistribution and use in source and binary forms, with or without
      8   1.1      cgd  * modification, are permitted provided that the following conditions
      9   1.1      cgd  * are met:
     10   1.1      cgd  * 1. Redistributions of source code must retain the above copyright
     11   1.1      cgd  *    notice, this list of conditions and the following disclaimer.
     12   1.1      cgd  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1      cgd  *    notice, this list of conditions and the following disclaimer in the
     14   1.1      cgd  *    documentation and/or other materials provided with the distribution.
     15   1.1      cgd  * 3. All advertising materials mentioning features or use of this software
     16   1.1      cgd  *    must display the following acknowledgement:
     17   1.1      cgd  *	This product includes software developed by the University of
     18   1.1      cgd  *	California, Berkeley and its contributors.
     19   1.1      cgd  * 4. Neither the name of the University nor the names of its contributors
     20   1.1      cgd  *    may be used to endorse or promote products derived from this software
     21   1.1      cgd  *    without specific prior written permission.
     22   1.1      cgd  *
     23   1.1      cgd  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     24   1.1      cgd  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     25   1.1      cgd  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     26   1.1      cgd  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     27   1.1      cgd  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28   1.1      cgd  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29   1.1      cgd  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30   1.1      cgd  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31   1.1      cgd  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32   1.1      cgd  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33   1.1      cgd  * SUCH DAMAGE.
     34   1.1      cgd  *
     35   1.4      cgd  *	@(#)dmareg.h	8.1 (Berkeley) 6/10/93
     36   1.1      cgd  */
     37   1.1      cgd 
     38   1.3  mycroft #include <hp300/dev/iotypes.h>		/* XXX */
     39   1.3  mycroft 
     40   1.1      cgd /*
     41   1.1      cgd  * Hardware layout for the 98620[ABC]:
     42   1.1      cgd  *	98620A (old 320s?):	byte/word DMA in up to 64K chunks
     43   1.1      cgd  *	98620B (320s only):	98620A with programmable IPL
     44   1.1      cgd  *	98620C (all others):	byte/word/longword DMA in up to 4Gb chunks
     45   1.1      cgd  */
     46   1.1      cgd 
     47   1.1      cgd struct	dmaBdevice {
     48   1.1      cgd 	v_char		*dmaB_addr;
     49   1.1      cgd 	vu_short	dmaB_count;
     50   1.1      cgd 	vu_short	dmaB_cmd;
     51   1.1      cgd #define	dmaB_stat	dmaB_cmd
     52   1.1      cgd };
     53   1.1      cgd 
     54   1.1      cgd struct	dmadevice {
     55   1.1      cgd 	v_char		*dma_addr;
     56   1.1      cgd 	vu_int		dma_count;
     57   1.1      cgd 	vu_short	dma_cmd;
     58   1.1      cgd 	vu_short	dma_stat;
     59   1.1      cgd };
     60   1.1      cgd 
     61   1.1      cgd struct	dmareg {
     62   1.1      cgd 	struct dmaBdevice dma_Bchan0;
     63   1.1      cgd 	struct dmaBdevice dma_Bchan1;
     64   1.1      cgd /* the rest are 98620C specific */
     65   1.1      cgd 	v_char		  dma_id[4];
     66   1.1      cgd 	vu_char		  dma_cr;
     67   1.1      cgd 	char		  dma_pad1[0xEB];
     68   1.1      cgd 	struct dmadevice  dma_chan0;
     69   1.1      cgd 	char		  dma_pad2[0xF4];
     70   1.1      cgd 	struct dmadevice  dma_chan1;
     71   1.1      cgd };
     72   1.1      cgd 
     73   1.6  thorpej /* The hp300 has 2 DMA channels. */
     74   1.6  thorpej #define	NDMACHAN	2
     75   1.1      cgd 
     76   1.1      cgd /* addresses */
     77   1.1      cgd #define	DMA_BASE	IIOV(0x500000)
     78   1.1      cgd 
     79   1.1      cgd /* command bits */
     80   1.1      cgd #define	DMA_ENAB	0x0001
     81   1.1      cgd #define	DMA_WORD	0x0002
     82   1.1      cgd #define	DMA_WRT		0x0004
     83   1.1      cgd #define	DMA_PRI		0x0008
     84   1.1      cgd #define	DMA_IPL(x)	(((x) - 3) << 4)
     85   1.1      cgd #define DMA_LWORD	0x0100
     86   1.1      cgd #define DMA_START	0x8000
     87   1.1      cgd 
     88   1.1      cgd /* status bits */
     89   1.1      cgd #define	DMA_ARMED	0x01
     90   1.1      cgd #define	DMA_INTR	0x02
     91   1.1      cgd #define DMA_ACC		0x04
     92   1.1      cgd #define DMA_HALT	0x08
     93   1.1      cgd #define DMA_BERR	0x10
     94   1.1      cgd #define DMA_ALIGN	0x20
     95   1.1      cgd #define DMA_WRAP	0x40
     96   1.1      cgd 
     97   1.5      jtc #ifdef _KERNEL
     98   1.1      cgd /*
     99   1.1      cgd  * Macros to attempt to hide the HW differences between the 98620B DMA
    100   1.1      cgd  * board and the 1TQ4-0401 DMA chip (68020C "board").  The latter
    101   1.1      cgd  * includes emulation registers for the former but you need to access
    102   1.1      cgd  * the "native-mode" registers directly in order to do 32-bit DMA.
    103   1.1      cgd  *
    104   1.1      cgd  * DMA_CLEAR:	Clear interrupt on DMA board.  We just use the
    105   1.1      cgd  *		emulation registers on the 98620C as that is easiest.
    106   1.1      cgd  * DMA_STAT:	Read status register.  Again, we always read the
    107   1.1      cgd  *		emulation register.  Someday we might want to
    108   1.1      cgd  *		look at the 98620C status to get the extended bits.
    109   1.1      cgd  * DMA_ARM:	Load address, count and kick-off DMA.
    110   1.1      cgd  */
    111  1.10   scottr #define	DMA_CLEAR(dc) do {					\
    112  1.10   scottr 		v_int dmaclr;					\
    113  1.10   scottr 		dmaclr = (int)dc->dm_Bhwaddr->dmaB_addr;	\
    114  1.10   scottr 	} while (0);
    115   1.6  thorpej #define	DMA_STAT(dc)	dc->dm_Bhwaddr->dmaB_stat
    116   1.1      cgd 
    117   1.1      cgd #if defined(HP320)
    118   1.1      cgd #define	DMA_ARM(dc)	\
    119   1.6  thorpej 	if (dc->dm_softc->sc_type == DMA_B) { \
    120   1.9   scottr 		struct dmaBdevice *dma = dc->dm_Bhwaddr; \
    121   1.8  thorpej 		dma->dmaB_addr = dc->dm_chain[dc->dm_cur].dc_addr; \
    122   1.8  thorpej 		dma->dmaB_count = dc->dm_chain[dc->dm_cur].dc_count - 1; \
    123   1.6  thorpej 		dma->dmaB_cmd = dc->dm_cmd; \
    124   1.1      cgd 	} else { \
    125   1.9   scottr 		struct dmadevice *dma = dc->dm_hwaddr; \
    126   1.8  thorpej 		dma->dma_addr = dc->dm_chain[dc->dm_cur].dc_addr; \
    127   1.8  thorpej 		dma->dma_count = dc->dm_chain[dc->dm_cur].dc_count - 1; \
    128   1.6  thorpej 		dma->dma_cmd = dc->dm_cmd; \
    129   1.1      cgd 	}
    130   1.1      cgd #else
    131   1.1      cgd #define	DMA_ARM(dc)	\
    132   1.1      cgd 	{ \
    133   1.9   scottr 		struct dmadevice *dma = dc->dm_hwaddr; \
    134   1.8  thorpej 		dma->dma_addr = dc->dm_chain[dc->dm_cur].dc_addr; \
    135   1.8  thorpej 		dma->dma_count = dc->dm_chain[dc->dm_cur].dc_count - 1; \
    136   1.6  thorpej 		dma->dma_cmd = dc->dm_cmd; \
    137   1.1      cgd 	}
    138   1.1      cgd #endif
    139   1.1      cgd #endif
    140