fhpib.c revision 1.2 1 1.1 cgd /*
2 1.1 cgd * Copyright (c) 1982, 1990 The Regents of the University of California.
3 1.1 cgd * All rights reserved.
4 1.1 cgd *
5 1.1 cgd * Redistribution and use in source and binary forms, with or without
6 1.1 cgd * modification, are permitted provided that the following conditions
7 1.1 cgd * are met:
8 1.1 cgd * 1. Redistributions of source code must retain the above copyright
9 1.1 cgd * notice, this list of conditions and the following disclaimer.
10 1.1 cgd * 2. Redistributions in binary form must reproduce the above copyright
11 1.1 cgd * notice, this list of conditions and the following disclaimer in the
12 1.1 cgd * documentation and/or other materials provided with the distribution.
13 1.1 cgd * 3. All advertising materials mentioning features or use of this software
14 1.1 cgd * must display the following acknowledgement:
15 1.1 cgd * This product includes software developed by the University of
16 1.1 cgd * California, Berkeley and its contributors.
17 1.1 cgd * 4. Neither the name of the University nor the names of its contributors
18 1.1 cgd * may be used to endorse or promote products derived from this software
19 1.1 cgd * without specific prior written permission.
20 1.1 cgd *
21 1.1 cgd * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 1.1 cgd * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 1.1 cgd * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 1.1 cgd * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 1.1 cgd * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 1.1 cgd * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 1.1 cgd * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 1.1 cgd * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 1.1 cgd * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 1.1 cgd * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 1.1 cgd * SUCH DAMAGE.
32 1.1 cgd *
33 1.2 mycroft * from: @(#)fhpib.c 7.3 (Berkeley) 12/16/90
34 1.2 mycroft * $Id: fhpib.c,v 1.2 1993/08/01 19:24:06 mycroft Exp $
35 1.1 cgd */
36 1.1 cgd
37 1.1 cgd /*
38 1.1 cgd * 98625A/B HPIB driver
39 1.1 cgd */
40 1.1 cgd #include "hpib.h"
41 1.1 cgd #if NHPIB > 0
42 1.1 cgd
43 1.1 cgd #include "sys/param.h"
44 1.1 cgd #include "sys/systm.h"
45 1.1 cgd #include "sys/buf.h"
46 1.1 cgd #include "device.h"
47 1.1 cgd #include "fhpibreg.h"
48 1.1 cgd #include "hpibvar.h"
49 1.1 cgd #include "dmavar.h"
50 1.1 cgd
51 1.1 cgd /*
52 1.1 cgd * Inline version of fhpibwait to be used in places where
53 1.1 cgd * we don't worry about getting hung.
54 1.1 cgd */
55 1.1 cgd #define FHPIBWAIT(hd, m) while (((hd)->hpib_intr & (m)) == 0) DELAY(1)
56 1.1 cgd
57 1.1 cgd #ifdef DEBUG
58 1.1 cgd int fhpibdebugunit = -1;
59 1.1 cgd int fhpibdebug = 0;
60 1.1 cgd #define FDB_FAIL 0x01
61 1.1 cgd #define FDB_DMA 0x02
62 1.1 cgd #define FDB_WAIT 0x04
63 1.1 cgd #define FDB_PPOLL 0x08
64 1.1 cgd
65 1.1 cgd int dopriodma = 0; /* use high priority DMA */
66 1.1 cgd int doworddma = 1; /* non-zero if we should attempt word dma */
67 1.1 cgd int doppollint = 1; /* use ppoll interrupts instead of watchdog */
68 1.1 cgd
69 1.1 cgd long fhpibbadint[2] = { 0 };
70 1.1 cgd long fhpibtransfer[NHPIB] = { 0 };
71 1.1 cgd long fhpibnondma[NHPIB] = { 0 };
72 1.1 cgd long fhpibworddma[NHPIB] = { 0 };
73 1.1 cgd #endif
74 1.1 cgd
75 1.1 cgd int fhpibcmd[NHPIB];
76 1.1 cgd
77 1.1 cgd fhpibtype(hc)
78 1.1 cgd register struct hp_ctlr *hc;
79 1.1 cgd {
80 1.1 cgd register struct hpib_softc *hs = &hpib_softc[hc->hp_unit];
81 1.1 cgd register struct fhpibdevice *hd = (struct fhpibdevice *)hc->hp_addr;
82 1.1 cgd
83 1.1 cgd if (hd->hpib_cid != HPIBC)
84 1.1 cgd return(0);
85 1.1 cgd hs->sc_type = HPIBC;
86 1.1 cgd hs->sc_ba = HPIBC_BA;
87 1.1 cgd hc->hp_ipl = HPIB_IPL(hd->hpib_ids);
88 1.1 cgd return(1);
89 1.1 cgd }
90 1.1 cgd
91 1.1 cgd fhpibreset(unit)
92 1.1 cgd {
93 1.1 cgd register struct hpib_softc *hs = &hpib_softc[unit];
94 1.1 cgd register struct fhpibdevice *hd;
95 1.1 cgd
96 1.1 cgd hd = (struct fhpibdevice *)hs->sc_hc->hp_addr;
97 1.1 cgd hd->hpib_cid = 0xFF;
98 1.1 cgd DELAY(100);
99 1.1 cgd hd->hpib_cmd = CT_8BIT;
100 1.1 cgd hd->hpib_ar = AR_ARONC;
101 1.1 cgd fhpibifc(hd);
102 1.1 cgd hd->hpib_ie = IDS_IE;
103 1.1 cgd hd->hpib_data = C_DCL;
104 1.1 cgd DELAY(100000);
105 1.1 cgd /*
106 1.1 cgd * See if we can do word dma.
107 1.1 cgd * If so, we should be able to write and read back the appropos bit.
108 1.1 cgd */
109 1.1 cgd hd->hpib_ie |= IDS_WDMA;
110 1.1 cgd if (hd->hpib_ie & IDS_WDMA) {
111 1.1 cgd hd->hpib_ie &= ~IDS_WDMA;
112 1.1 cgd hs->sc_flags |= HPIBF_DMA16;
113 1.1 cgd #ifdef DEBUG
114 1.1 cgd if (fhpibdebug & FDB_DMA)
115 1.1 cgd printf("fhpibtype: unit %d has word dma\n", unit);
116 1.1 cgd
117 1.1 cgd #endif
118 1.1 cgd }
119 1.1 cgd }
120 1.1 cgd
121 1.1 cgd fhpibifc(hd)
122 1.1 cgd register struct fhpibdevice *hd;
123 1.1 cgd {
124 1.1 cgd hd->hpib_cmd |= CT_IFC;
125 1.1 cgd hd->hpib_cmd |= CT_INITFIFO;
126 1.1 cgd DELAY(100);
127 1.1 cgd hd->hpib_cmd &= ~CT_IFC;
128 1.1 cgd hd->hpib_cmd |= CT_REN;
129 1.1 cgd hd->hpib_stat = ST_ATN;
130 1.1 cgd }
131 1.1 cgd
132 1.1 cgd fhpibsend(unit, slave, sec, addr, origcnt)
133 1.1 cgd register char *addr;
134 1.1 cgd {
135 1.1 cgd register struct hpib_softc *hs = &hpib_softc[unit];
136 1.1 cgd register struct fhpibdevice *hd;
137 1.1 cgd register int cnt = origcnt;
138 1.1 cgd register int timo;
139 1.1 cgd
140 1.1 cgd hd = (struct fhpibdevice *)hs->sc_hc->hp_addr;
141 1.1 cgd hd->hpib_stat = 0;
142 1.1 cgd hd->hpib_imask = IM_IDLE | IM_ROOM;
143 1.1 cgd if (fhpibwait(hd, IM_IDLE) < 0)
144 1.1 cgd goto senderr;
145 1.1 cgd hd->hpib_stat = ST_ATN;
146 1.1 cgd hd->hpib_data = C_UNL;
147 1.1 cgd hd->hpib_data = C_TAG + hs->sc_ba;
148 1.1 cgd hd->hpib_data = C_LAG + slave;
149 1.1 cgd if (sec != -1)
150 1.1 cgd hd->hpib_data = C_SCG + sec;
151 1.1 cgd if (fhpibwait(hd, IM_IDLE) < 0)
152 1.1 cgd goto senderr;
153 1.1 cgd if (cnt) {
154 1.1 cgd hd->hpib_stat = ST_WRITE;
155 1.1 cgd while (--cnt) {
156 1.1 cgd hd->hpib_data = *addr++;
157 1.1 cgd timo = hpibtimeout;
158 1.1 cgd while ((hd->hpib_intr & IM_ROOM) == 0) {
159 1.1 cgd if (--timo <= 0)
160 1.1 cgd goto senderr;
161 1.1 cgd DELAY(1);
162 1.1 cgd }
163 1.1 cgd }
164 1.1 cgd hd->hpib_stat = ST_EOI;
165 1.1 cgd hd->hpib_data = *addr;
166 1.1 cgd FHPIBWAIT(hd, IM_ROOM);
167 1.1 cgd hd->hpib_stat = ST_ATN;
168 1.1 cgd /* XXX: HP-UX claims bug with CS80 transparent messages */
169 1.1 cgd if (sec == 0x12)
170 1.1 cgd DELAY(150);
171 1.1 cgd hd->hpib_data = C_UNL;
172 1.1 cgd (void) fhpibwait(hd, IM_IDLE);
173 1.1 cgd }
174 1.1 cgd hd->hpib_imask = 0;
175 1.1 cgd return (origcnt);
176 1.1 cgd senderr:
177 1.1 cgd hd->hpib_imask = 0;
178 1.1 cgd fhpibifc(hd);
179 1.1 cgd #ifdef DEBUG
180 1.1 cgd if (fhpibdebug & FDB_FAIL) {
181 1.1 cgd printf("hpib%d: fhpibsend failed: slave %d, sec %x, ",
182 1.1 cgd unit, slave, sec);
183 1.1 cgd printf("sent %d of %d bytes\n", origcnt-cnt-1, origcnt);
184 1.1 cgd }
185 1.1 cgd #endif
186 1.1 cgd return(origcnt - cnt - 1);
187 1.1 cgd }
188 1.1 cgd
189 1.1 cgd fhpibrecv(unit, slave, sec, addr, origcnt)
190 1.1 cgd register char *addr;
191 1.1 cgd {
192 1.1 cgd register struct hpib_softc *hs = &hpib_softc[unit];
193 1.1 cgd register struct fhpibdevice *hd;
194 1.1 cgd register int cnt = origcnt;
195 1.1 cgd register int timo;
196 1.1 cgd
197 1.1 cgd hd = (struct fhpibdevice *)hs->sc_hc->hp_addr;
198 1.1 cgd hd->hpib_stat = 0;
199 1.1 cgd hd->hpib_imask = IM_IDLE | IM_ROOM | IM_BYTE;
200 1.1 cgd if (fhpibwait(hd, IM_IDLE) < 0)
201 1.1 cgd goto recverror;
202 1.1 cgd hd->hpib_stat = ST_ATN;
203 1.1 cgd hd->hpib_data = C_UNL;
204 1.1 cgd hd->hpib_data = C_LAG + hs->sc_ba;
205 1.1 cgd hd->hpib_data = C_TAG + slave;
206 1.1 cgd if (sec != -1)
207 1.1 cgd hd->hpib_data = C_SCG + sec;
208 1.1 cgd if (fhpibwait(hd, IM_IDLE) < 0)
209 1.1 cgd goto recverror;
210 1.1 cgd hd->hpib_stat = ST_READ0;
211 1.1 cgd hd->hpib_data = 0;
212 1.1 cgd if (cnt) {
213 1.1 cgd while (--cnt >= 0) {
214 1.1 cgd timo = hpibtimeout;
215 1.1 cgd while ((hd->hpib_intr & IM_BYTE) == 0) {
216 1.1 cgd if (--timo == 0)
217 1.1 cgd goto recvbyteserror;
218 1.1 cgd DELAY(1);
219 1.1 cgd }
220 1.1 cgd *addr++ = hd->hpib_data;
221 1.1 cgd }
222 1.1 cgd FHPIBWAIT(hd, IM_ROOM);
223 1.1 cgd hd->hpib_stat = ST_ATN;
224 1.1 cgd hd->hpib_data = (slave == 31) ? C_UNA : C_UNT;
225 1.1 cgd (void) fhpibwait(hd, IM_IDLE);
226 1.1 cgd }
227 1.1 cgd hd->hpib_imask = 0;
228 1.1 cgd return (origcnt);
229 1.1 cgd
230 1.1 cgd recverror:
231 1.1 cgd fhpibifc(hd);
232 1.1 cgd recvbyteserror:
233 1.1 cgd hd->hpib_imask = 0;
234 1.1 cgd #ifdef DEBUG
235 1.1 cgd if (fhpibdebug & FDB_FAIL) {
236 1.1 cgd printf("hpib%d: fhpibrecv failed: slave %d, sec %x, ",
237 1.1 cgd unit, slave, sec);
238 1.1 cgd printf("got %d of %d bytes\n", origcnt-cnt-1, origcnt);
239 1.1 cgd }
240 1.1 cgd #endif
241 1.1 cgd return(origcnt - cnt - 1);
242 1.1 cgd }
243 1.1 cgd
244 1.1 cgd fhpibgo(unit, slave, sec, addr, count, rw)
245 1.1 cgd register int unit;
246 1.1 cgd char *addr;
247 1.1 cgd {
248 1.1 cgd register struct hpib_softc *hs = &hpib_softc[unit];
249 1.1 cgd register struct fhpibdevice *hd;
250 1.1 cgd register int i;
251 1.1 cgd int flags = 0;
252 1.1 cgd
253 1.1 cgd #ifdef lint
254 1.1 cgd i = unit; if (i) return;
255 1.1 cgd #endif
256 1.1 cgd hd = (struct fhpibdevice *)hs->sc_hc->hp_addr;
257 1.1 cgd hs->sc_flags |= HPIBF_IO;
258 1.1 cgd if (rw == B_READ)
259 1.1 cgd hs->sc_flags |= HPIBF_READ;
260 1.1 cgd #ifdef DEBUG
261 1.1 cgd else if (hs->sc_flags & HPIBF_READ) {
262 1.1 cgd printf("fhpibgo: HPIBF_READ still set\n");
263 1.1 cgd hs->sc_flags &= ~HPIBF_READ;
264 1.1 cgd }
265 1.1 cgd #endif
266 1.1 cgd hs->sc_count = count;
267 1.1 cgd hs->sc_addr = addr;
268 1.1 cgd #ifdef DEBUG
269 1.1 cgd fhpibtransfer[unit]++;
270 1.1 cgd #endif
271 1.1 cgd if ((hs->sc_flags & HPIBF_DMA16) &&
272 1.1 cgd ((int)addr & 1) == 0 && count && (count & 1) == 0
273 1.1 cgd #ifdef DEBUG
274 1.1 cgd && doworddma
275 1.1 cgd #endif
276 1.1 cgd ) {
277 1.1 cgd #ifdef DEBUG
278 1.1 cgd fhpibworddma[unit]++;
279 1.1 cgd #endif
280 1.1 cgd flags |= DMAGO_WORD;
281 1.1 cgd hd->hpib_latch = 0;
282 1.1 cgd }
283 1.1 cgd #ifdef DEBUG
284 1.1 cgd if (dopriodma)
285 1.1 cgd flags |= DMAGO_PRI;
286 1.1 cgd #endif
287 1.1 cgd if (hs->sc_flags & HPIBF_READ) {
288 1.1 cgd fhpibcmd[unit] = CT_REN | CT_8BIT;
289 1.1 cgd hs->sc_curcnt = count;
290 1.1 cgd dmago(hs->sc_dq.dq_ctlr, addr, count, flags|DMAGO_READ);
291 1.1 cgd if (fhpibrecv(unit, slave, sec, 0, 0) < 0) {
292 1.1 cgd #ifdef DEBUG
293 1.1 cgd printf("fhpibgo: recv failed, retrying...\n");
294 1.1 cgd #endif
295 1.1 cgd (void) fhpibrecv(unit, slave, sec, 0, 0);
296 1.1 cgd }
297 1.1 cgd i = hd->hpib_cmd;
298 1.1 cgd hd->hpib_cmd = fhpibcmd[unit];
299 1.1 cgd hd->hpib_ie = IDS_DMA(hs->sc_dq.dq_ctlr) |
300 1.1 cgd ((flags & DMAGO_WORD) ? IDS_WDMA : 0);
301 1.1 cgd return;
302 1.1 cgd }
303 1.1 cgd fhpibcmd[unit] = CT_REN | CT_8BIT | CT_FIFOSEL;
304 1.1 cgd if (count < hpibdmathresh) {
305 1.1 cgd #ifdef DEBUG
306 1.1 cgd fhpibnondma[unit]++;
307 1.1 cgd if (flags & DMAGO_WORD)
308 1.1 cgd fhpibworddma[unit]--;
309 1.1 cgd #endif
310 1.1 cgd hs->sc_curcnt = count;
311 1.1 cgd (void) fhpibsend(unit, slave, sec, addr, count);
312 1.1 cgd fhpibdone(unit);
313 1.1 cgd return;
314 1.1 cgd }
315 1.1 cgd count -= (flags & DMAGO_WORD) ? 2 : 1;
316 1.1 cgd hs->sc_curcnt = count;
317 1.1 cgd dmago(hs->sc_dq.dq_ctlr, addr, count, flags);
318 1.1 cgd if (fhpibsend(unit, slave, sec, 0, 0) < 0) {
319 1.1 cgd #ifdef DEBUG
320 1.1 cgd printf("fhpibgo: send failed, retrying...\n");
321 1.1 cgd #endif
322 1.1 cgd (void) fhpibsend(unit, slave, sec, 0, 0);
323 1.1 cgd }
324 1.1 cgd i = hd->hpib_cmd;
325 1.1 cgd hd->hpib_cmd = fhpibcmd[unit];
326 1.1 cgd hd->hpib_ie = IDS_DMA(hs->sc_dq.dq_ctlr) | IDS_WRITE |
327 1.1 cgd ((flags & DMAGO_WORD) ? IDS_WDMA : 0);
328 1.1 cgd }
329 1.1 cgd
330 1.1 cgd fhpibdone(unit)
331 1.1 cgd {
332 1.1 cgd register struct hpib_softc *hs = &hpib_softc[unit];
333 1.1 cgd register struct fhpibdevice *hd;
334 1.1 cgd register char *addr;
335 1.1 cgd register int cnt;
336 1.1 cgd
337 1.1 cgd hd = (struct fhpibdevice *)hs->sc_hc->hp_addr;
338 1.1 cgd cnt = hs->sc_curcnt;
339 1.1 cgd hs->sc_addr += cnt;
340 1.1 cgd hs->sc_count -= cnt;
341 1.1 cgd #ifdef DEBUG
342 1.1 cgd if ((fhpibdebug & FDB_DMA) && fhpibdebugunit == unit)
343 1.1 cgd printf("fhpibdone: addr %x cnt %d\n",
344 1.1 cgd hs->sc_addr, hs->sc_count);
345 1.1 cgd #endif
346 1.1 cgd if (hs->sc_flags & HPIBF_READ)
347 1.1 cgd hd->hpib_imask = IM_IDLE | IM_BYTE;
348 1.1 cgd else {
349 1.1 cgd cnt = hs->sc_count;
350 1.1 cgd if (cnt) {
351 1.1 cgd addr = hs->sc_addr;
352 1.1 cgd hd->hpib_imask = IM_IDLE | IM_ROOM;
353 1.1 cgd FHPIBWAIT(hd, IM_IDLE);
354 1.1 cgd hd->hpib_stat = ST_WRITE;
355 1.1 cgd while (--cnt) {
356 1.1 cgd hd->hpib_data = *addr++;
357 1.1 cgd FHPIBWAIT(hd, IM_ROOM);
358 1.1 cgd }
359 1.1 cgd hd->hpib_stat = ST_EOI;
360 1.1 cgd hd->hpib_data = *addr;
361 1.1 cgd }
362 1.1 cgd hd->hpib_imask = IM_IDLE;
363 1.1 cgd }
364 1.1 cgd hs->sc_flags |= HPIBF_DONE;
365 1.1 cgd hd->hpib_stat = ST_IENAB;
366 1.1 cgd hd->hpib_ie = IDS_IE;
367 1.1 cgd }
368 1.1 cgd
369 1.1 cgd fhpibintr(unit)
370 1.1 cgd register int unit;
371 1.1 cgd {
372 1.1 cgd register struct hpib_softc *hs = &hpib_softc[unit];
373 1.1 cgd register struct fhpibdevice *hd;
374 1.1 cgd register struct devqueue *dq;
375 1.1 cgd register int stat0;
376 1.1 cgd
377 1.1 cgd hd = (struct fhpibdevice *)hs->sc_hc->hp_addr;
378 1.1 cgd stat0 = hd->hpib_ids;
379 1.1 cgd if ((stat0 & (IDS_IE|IDS_IR)) != (IDS_IE|IDS_IR)) {
380 1.1 cgd #ifdef DEBUG
381 1.1 cgd if ((fhpibdebug & FDB_FAIL) && (stat0 & IDS_IR) &&
382 1.1 cgd (hs->sc_flags & (HPIBF_IO|HPIBF_DONE)) != HPIBF_IO)
383 1.1 cgd printf("hpib%d: fhpibintr: bad status %x\n",
384 1.1 cgd unit, stat0);
385 1.1 cgd fhpibbadint[0]++;
386 1.1 cgd #endif
387 1.1 cgd return(0);
388 1.1 cgd }
389 1.1 cgd if ((hs->sc_flags & (HPIBF_IO|HPIBF_DONE)) == HPIBF_IO) {
390 1.1 cgd #ifdef DEBUG
391 1.1 cgd fhpibbadint[1]++;
392 1.1 cgd #endif
393 1.1 cgd return(0);
394 1.1 cgd }
395 1.1 cgd #ifdef DEBUG
396 1.1 cgd if ((fhpibdebug & FDB_DMA) && fhpibdebugunit == unit)
397 1.1 cgd printf("fhpibintr: flags %x\n", hs->sc_flags);
398 1.1 cgd #endif
399 1.1 cgd dq = hs->sc_sq.dq_forw;
400 1.1 cgd if (hs->sc_flags & HPIBF_IO) {
401 1.1 cgd stat0 = hd->hpib_cmd;
402 1.1 cgd hd->hpib_cmd = fhpibcmd[unit] & ~CT_8BIT;
403 1.1 cgd hd->hpib_stat = 0;
404 1.1 cgd hd->hpib_cmd = CT_REN | CT_8BIT;
405 1.1 cgd stat0 = hd->hpib_intr;
406 1.1 cgd hd->hpib_imask = 0;
407 1.1 cgd hs->sc_flags &= ~(HPIBF_DONE|HPIBF_IO|HPIBF_READ);
408 1.1 cgd dmafree(&hs->sc_dq);
409 1.1 cgd (dq->dq_driver->d_intr)(dq->dq_unit);
410 1.1 cgd } else if (hs->sc_flags & HPIBF_PPOLL) {
411 1.1 cgd stat0 = hd->hpib_intr;
412 1.1 cgd #ifdef DEBUG
413 1.1 cgd if ((fhpibdebug & FDB_FAIL) &&
414 1.1 cgd doppollint && (stat0 & IM_PPRESP) == 0)
415 1.1 cgd printf("hpib%d: fhpibintr: bad intr reg %x\n",
416 1.1 cgd unit, stat0);
417 1.1 cgd #endif
418 1.1 cgd hd->hpib_stat = 0;
419 1.1 cgd hd->hpib_imask = 0;
420 1.1 cgd #ifdef DEBUG
421 1.1 cgd stat0 = fhpibppoll(unit);
422 1.1 cgd if ((fhpibdebug & FDB_PPOLL) && unit == fhpibdebugunit)
423 1.1 cgd printf("fhpibintr: got PPOLL status %x\n", stat0);
424 1.1 cgd if ((stat0 & (0x80 >> dq->dq_slave)) == 0) {
425 1.1 cgd printf("fhpibintr: PPOLL: unit %d slave %d stat %x\n",
426 1.1 cgd unit, dq->dq_slave, stat0);
427 1.1 cgd return(1);
428 1.1 cgd }
429 1.1 cgd #endif
430 1.1 cgd hs->sc_flags &= ~HPIBF_PPOLL;
431 1.1 cgd (dq->dq_driver->d_intr)(dq->dq_unit);
432 1.1 cgd }
433 1.1 cgd return(1);
434 1.1 cgd }
435 1.1 cgd
436 1.1 cgd fhpibppoll(unit)
437 1.1 cgd {
438 1.1 cgd register struct fhpibdevice *hd;
439 1.1 cgd register int ppoll;
440 1.1 cgd
441 1.1 cgd hd = (struct fhpibdevice *)hpib_softc[unit].sc_hc->hp_addr;
442 1.1 cgd hd->hpib_stat = 0;
443 1.1 cgd hd->hpib_psense = 0;
444 1.1 cgd hd->hpib_pmask = 0xFF;
445 1.1 cgd hd->hpib_imask = IM_PPRESP | IM_PABORT;
446 1.1 cgd DELAY(25);
447 1.1 cgd hd->hpib_intr = IM_PABORT;
448 1.1 cgd ppoll = hd->hpib_data;
449 1.1 cgd if (hd->hpib_intr & IM_PABORT)
450 1.1 cgd ppoll = 0;
451 1.1 cgd hd->hpib_imask = 0;
452 1.1 cgd hd->hpib_pmask = 0;
453 1.1 cgd hd->hpib_stat = ST_IENAB;
454 1.1 cgd return(ppoll);
455 1.1 cgd }
456 1.1 cgd
457 1.1 cgd fhpibwait(hd, x)
458 1.1 cgd register struct fhpibdevice *hd;
459 1.1 cgd {
460 1.1 cgd register int timo = hpibtimeout;
461 1.1 cgd
462 1.1 cgd while ((hd->hpib_intr & x) == 0 && --timo)
463 1.1 cgd DELAY(1);
464 1.1 cgd if (timo == 0) {
465 1.1 cgd #ifdef DEBUG
466 1.1 cgd if (fhpibdebug & FDB_FAIL)
467 1.1 cgd printf("fhpibwait(%x, %x) timeout\n", hd, x);
468 1.1 cgd #endif
469 1.1 cgd return(-1);
470 1.1 cgd }
471 1.1 cgd return(0);
472 1.1 cgd }
473 1.1 cgd
474 1.1 cgd /*
475 1.1 cgd * XXX: this will have to change if we every allow more than one
476 1.1 cgd * pending operation per HP-IB.
477 1.1 cgd */
478 1.1 cgd fhpibppwatch(unit)
479 1.1 cgd {
480 1.1 cgd register struct hpib_softc *hs = &hpib_softc[unit];
481 1.1 cgd register struct fhpibdevice *hd;
482 1.1 cgd register int slave;
483 1.1 cgd
484 1.1 cgd if ((hs->sc_flags & HPIBF_PPOLL) == 0)
485 1.1 cgd return;
486 1.1 cgd hd = (struct fhpibdevice *)hs->sc_hc->hp_addr;
487 1.1 cgd slave = (0x80 >> hs->sc_sq.dq_forw->dq_slave);
488 1.1 cgd #ifdef DEBUG
489 1.1 cgd if (!doppollint) {
490 1.1 cgd if (fhpibppoll(unit) & slave) {
491 1.1 cgd hd->hpib_stat = ST_IENAB;
492 1.1 cgd hd->hpib_imask = IM_IDLE | IM_ROOM;
493 1.1 cgd } else
494 1.1 cgd timeout(fhpibppwatch, unit, 1);
495 1.1 cgd return;
496 1.1 cgd }
497 1.1 cgd if ((fhpibdebug & FDB_PPOLL) && unit == fhpibdebugunit)
498 1.1 cgd printf("fhpibppwatch: sense request on %d\n", unit);
499 1.1 cgd #endif
500 1.1 cgd hd->hpib_psense = ~slave;
501 1.1 cgd hd->hpib_pmask = slave;
502 1.1 cgd hd->hpib_stat = ST_IENAB;
503 1.1 cgd hd->hpib_imask = IM_PPRESP | IM_PABORT;
504 1.1 cgd hd->hpib_ie = IDS_IE;
505 1.1 cgd }
506 1.1 cgd #endif
507