fhpib.c revision 1.17
1 /* $NetBSD: fhpib.c,v 1.17 1997/04/14 02:33:19 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1996, 1997 Jason R. Thorpe. All rights reserved. 5 * Copyright (c) 1982, 1990, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)fhpib.c 8.2 (Berkeley) 1/12/94 37 */ 38 39 /* 40 * 98625A/B HPIB driver 41 */ 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/kernel.h> 46 #include <sys/buf.h> 47 #include <sys/device.h> 48 49 #include <machine/autoconf.h> 50 #include <machine/intr.h> 51 52 #include <hp300/dev/dioreg.h> 53 #include <hp300/dev/diovar.h> 54 #include <hp300/dev/diodevs.h> 55 56 #include <hp300/dev/dmavar.h> 57 58 #include <hp300/dev/fhpibreg.h> 59 #include <hp300/dev/hpibvar.h> 60 61 /* 62 * Inline version of fhpibwait to be used in places where 63 * we don't worry about getting hung. 64 */ 65 #define FHPIBWAIT(hd, m) while (((hd)->hpib_intr & (m)) == 0) DELAY(1) 66 67 #ifdef DEBUG 68 int fhpibdebugunit = -1; 69 int fhpibdebug = 0; 70 #define FDB_FAIL 0x01 71 #define FDB_DMA 0x02 72 #define FDB_WAIT 0x04 73 #define FDB_PPOLL 0x08 74 75 int dopriodma = 0; /* use high priority DMA */ 76 int doworddma = 1; /* non-zero if we should attempt word dma */ 77 int doppollint = 1; /* use ppoll interrupts instead of watchdog */ 78 int fhpibppolldelay = 50; 79 #endif 80 81 void fhpibifc __P((struct fhpibdevice *)); 82 void fhpibdmadone __P((void *)); 83 int fhpibwait __P((struct fhpibdevice *, int)); 84 85 void fhpibreset __P((struct hpibbus_softc *)); 86 int fhpibsend __P((struct hpibbus_softc *, int, int, void *, int)); 87 int fhpibrecv __P((struct hpibbus_softc *, int, int, void *, int)); 88 int fhpibppoll __P((struct hpibbus_softc *)); 89 void fhpibppwatch __P((void *)); 90 void fhpibgo __P((struct hpibbus_softc *, int, int, void *, int, int, int)); 91 void fhpibdone __P((struct hpibbus_softc *)); 92 int fhpibintr __P((void *)); 93 94 /* 95 * Our controller ops structure. 96 */ 97 struct hpib_controller fhpib_controller = { 98 fhpibreset, 99 fhpibsend, 100 fhpibrecv, 101 fhpibppoll, 102 fhpibppwatch, 103 fhpibgo, 104 fhpibdone, 105 fhpibintr 106 }; 107 108 struct fhpib_softc { 109 struct device sc_dev; /* generic device glue */ 110 struct fhpibdevice *sc_regs; /* device registers */ 111 int sc_cmd; 112 struct hpibbus_softc *sc_hpibbus; /* XXX */ 113 }; 114 115 int fhpibmatch __P((struct device *, struct cfdata *, void *)); 116 void fhpibattach __P((struct device *, struct device *, void *)); 117 118 struct cfattach fhpib_ca = { 119 sizeof(struct fhpib_softc), fhpibmatch, fhpibattach 120 }; 121 122 struct cfdriver fhpib_cd = { 123 NULL, "fhpib", DV_DULL 124 }; 125 126 int 127 fhpibmatch(parent, match, aux) 128 struct device *parent; 129 struct cfdata *match; 130 void *aux; 131 { 132 struct dio_attach_args *da = aux; 133 134 if (da->da_id == DIO_DEVICE_ID_FHPIB) 135 return (1); 136 137 return (0); 138 } 139 140 void 141 fhpibattach(parent, self, aux) 142 struct device *parent, *self; 143 void *aux; 144 { 145 struct fhpib_softc *sc = (struct fhpib_softc *)self; 146 struct dio_attach_args *da = aux; 147 struct hpibdev_attach_args ha; 148 int ipl; 149 150 sc->sc_regs = (struct fhpibdevice *)iomap(dio_scodetopa(da->da_scode), 151 da->da_size); 152 if (sc->sc_regs == NULL) { 153 printf("\n%s: can't map registers\n", self->dv_xname); 154 return; 155 } 156 157 ipl = DIO_IPL(sc->sc_regs); 158 printf(" ipl %d: %s\n", ipl, DIO_DEVICE_DESC_FHPIB); 159 160 /* Establish the interrupt handler. */ 161 (void) intr_establish(fhpibintr, sc, ipl, IPL_BIO); 162 dmacomputeipl(); 163 164 ha.ha_ops = &fhpib_controller; 165 ha.ha_type = HPIBC; /* XXX */ 166 ha.ha_ba = HPIBC_BA; 167 ha.ha_softcpp = &sc->sc_hpibbus; /* XXX */ 168 (void)config_found(self, &ha, hpibdevprint); 169 } 170 171 void 172 fhpibreset(hs) 173 struct hpibbus_softc *hs; 174 { 175 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 176 struct fhpibdevice *hd = sc->sc_regs; 177 178 hd->hpib_cid = 0xFF; 179 DELAY(100); 180 hd->hpib_cmd = CT_8BIT; 181 hd->hpib_ar = AR_ARONC; 182 fhpibifc(hd); 183 hd->hpib_ie = IDS_IE; 184 hd->hpib_data = C_DCL; 185 DELAY(100000); 186 /* 187 * See if we can do word dma. 188 * If so, we should be able to write and read back the appropos bit. 189 */ 190 hd->hpib_ie |= IDS_WDMA; 191 if (hd->hpib_ie & IDS_WDMA) { 192 hd->hpib_ie &= ~IDS_WDMA; 193 hs->sc_flags |= HPIBF_DMA16; 194 #ifdef DEBUG 195 if (fhpibdebug & FDB_DMA) 196 printf("fhpibtype: %s has word dma\n", 197 sc->sc_dev.dv_xname); 198 199 #endif 200 } 201 } 202 203 void 204 fhpibifc(hd) 205 struct fhpibdevice *hd; 206 { 207 hd->hpib_cmd |= CT_IFC; 208 hd->hpib_cmd |= CT_INITFIFO; 209 DELAY(100); 210 hd->hpib_cmd &= ~CT_IFC; 211 hd->hpib_cmd |= CT_REN; 212 hd->hpib_stat = ST_ATN; 213 } 214 215 int 216 fhpibsend(hs, slave, sec, ptr, origcnt) 217 struct hpibbus_softc *hs; 218 int slave, sec, origcnt; 219 void *ptr; 220 { 221 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 222 struct fhpibdevice *hd = sc->sc_regs; 223 int cnt = origcnt; 224 int timo; 225 char *addr = ptr; 226 227 hd->hpib_stat = 0; 228 hd->hpib_imask = IM_IDLE | IM_ROOM; 229 if (fhpibwait(hd, IM_IDLE) < 0) 230 goto senderr; 231 hd->hpib_stat = ST_ATN; 232 hd->hpib_data = C_UNL; 233 hd->hpib_data = C_TAG + hs->sc_ba; 234 hd->hpib_data = C_LAG + slave; 235 if (sec < 0) { 236 if (sec == -2) /* selected device clear KLUDGE */ 237 hd->hpib_data = C_SDC; 238 } else 239 hd->hpib_data = C_SCG + sec; 240 if (fhpibwait(hd, IM_IDLE) < 0) 241 goto senderr; 242 if (cnt) { 243 hd->hpib_stat = ST_WRITE; 244 while (--cnt) { 245 hd->hpib_data = *addr++; 246 timo = hpibtimeout; 247 while ((hd->hpib_intr & IM_ROOM) == 0) { 248 if (--timo <= 0) 249 goto senderr; 250 DELAY(1); 251 } 252 } 253 hd->hpib_stat = ST_EOI; 254 hd->hpib_data = *addr; 255 FHPIBWAIT(hd, IM_ROOM); 256 hd->hpib_stat = ST_ATN; 257 /* XXX: HP-UX claims bug with CS80 transparent messages */ 258 if (sec == 0x12) 259 DELAY(150); 260 hd->hpib_data = C_UNL; 261 (void) fhpibwait(hd, IM_IDLE); 262 } 263 hd->hpib_imask = 0; 264 return (origcnt); 265 266 senderr: 267 hd->hpib_imask = 0; 268 fhpibifc(hd); 269 #ifdef DEBUG 270 if (fhpibdebug & FDB_FAIL) { 271 printf("%s: fhpibsend failed: slave %d, sec %x, ", 272 sc->sc_dev.dv_xname, slave, sec); 273 printf("sent %d of %d bytes\n", origcnt-cnt-1, origcnt); 274 } 275 #endif 276 return (origcnt - cnt - 1); 277 } 278 279 int 280 fhpibrecv(hs, slave, sec, ptr, origcnt) 281 struct hpibbus_softc *hs; 282 int slave, sec, origcnt; 283 void *ptr; 284 { 285 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 286 struct fhpibdevice *hd = sc->sc_regs; 287 int cnt = origcnt; 288 int timo; 289 char *addr = ptr; 290 291 /* 292 * Slave < 0 implies continuation of a previous receive 293 * that probably timed out. 294 */ 295 if (slave >= 0) { 296 hd->hpib_stat = 0; 297 hd->hpib_imask = IM_IDLE | IM_ROOM | IM_BYTE; 298 if (fhpibwait(hd, IM_IDLE) < 0) 299 goto recverror; 300 hd->hpib_stat = ST_ATN; 301 hd->hpib_data = C_UNL; 302 hd->hpib_data = C_LAG + hs->sc_ba; 303 hd->hpib_data = C_TAG + slave; 304 if (sec != -1) 305 hd->hpib_data = C_SCG + sec; 306 if (fhpibwait(hd, IM_IDLE) < 0) 307 goto recverror; 308 hd->hpib_stat = ST_READ0; 309 hd->hpib_data = 0; 310 } 311 if (cnt) { 312 while (--cnt >= 0) { 313 timo = hpibtimeout; 314 while ((hd->hpib_intr & IM_BYTE) == 0) { 315 if (--timo == 0) 316 goto recvbyteserror; 317 DELAY(1); 318 } 319 *addr++ = hd->hpib_data; 320 } 321 FHPIBWAIT(hd, IM_ROOM); 322 hd->hpib_stat = ST_ATN; 323 hd->hpib_data = (slave == 31) ? C_UNA : C_UNT; 324 (void) fhpibwait(hd, IM_IDLE); 325 } 326 hd->hpib_imask = 0; 327 return (origcnt); 328 329 recverror: 330 fhpibifc(hd); 331 recvbyteserror: 332 hd->hpib_imask = 0; 333 #ifdef DEBUG 334 if (fhpibdebug & FDB_FAIL) { 335 printf("%s: fhpibrecv failed: slave %d, sec %x, ", 336 sc->sc_dev.dv_xname, slave, sec); 337 printf("got %d of %d bytes\n", origcnt-cnt-1, origcnt); 338 } 339 #endif 340 return (origcnt - cnt - 1); 341 } 342 343 void 344 fhpibgo(hs, slave, sec, ptr, count, rw, timo) 345 struct hpibbus_softc *hs; 346 int slave, sec, count, rw, timo; 347 void *ptr; 348 { 349 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 350 struct fhpibdevice *hd = sc->sc_regs; 351 int i; 352 char *addr = ptr; 353 int flags = 0; 354 355 hs->sc_flags |= HPIBF_IO; 356 if (timo) 357 hs->sc_flags |= HPIBF_TIMO; 358 if (rw == B_READ) 359 hs->sc_flags |= HPIBF_READ; 360 #ifdef DEBUG 361 else if (hs->sc_flags & HPIBF_READ) { 362 printf("fhpibgo: HPIBF_READ still set\n"); 363 hs->sc_flags &= ~HPIBF_READ; 364 } 365 #endif 366 hs->sc_count = count; 367 hs->sc_addr = addr; 368 #ifdef DEBUG 369 /* fhpibtransfer[unit]++; XXX */ 370 #endif 371 if ((hs->sc_flags & HPIBF_DMA16) && 372 ((int)addr & 1) == 0 && count && (count & 1) == 0 373 #ifdef DEBUG 374 && doworddma 375 #endif 376 ) { 377 #ifdef DEBUG 378 /* fhpibworddma[unit]++; XXX */ 379 #endif 380 flags |= DMAGO_WORD; 381 hd->hpib_latch = 0; 382 } 383 #ifdef DEBUG 384 if (dopriodma) 385 flags |= DMAGO_PRI; 386 #endif 387 if (hs->sc_flags & HPIBF_READ) { 388 sc->sc_cmd = CT_REN | CT_8BIT; 389 hs->sc_curcnt = count; 390 dmago(hs->sc_dq->dq_chan, addr, count, flags|DMAGO_READ); 391 if (fhpibrecv(hs, slave, sec, 0, 0) < 0) { 392 #ifdef DEBUG 393 printf("fhpibgo: recv failed, retrying...\n"); 394 #endif 395 (void) fhpibrecv(hs, slave, sec, 0, 0); 396 } 397 i = hd->hpib_cmd; 398 hd->hpib_cmd = sc->sc_cmd; 399 hd->hpib_ie = IDS_DMA(hs->sc_dq->dq_chan) | 400 ((flags & DMAGO_WORD) ? IDS_WDMA : 0); 401 return; 402 } 403 sc->sc_cmd = CT_REN | CT_8BIT | CT_FIFOSEL; 404 if (count < hpibdmathresh) { 405 #ifdef DEBUG 406 /* fhpibnondma[unit]++; XXX */ 407 if (flags & DMAGO_WORD) 408 /* fhpibworddma[unit]--; XXX */ ; 409 #endif 410 hs->sc_curcnt = count; 411 (void) fhpibsend(hs, slave, sec, addr, count); 412 fhpibdone(hs); 413 return; 414 } 415 count -= (flags & DMAGO_WORD) ? 2 : 1; 416 hs->sc_curcnt = count; 417 dmago(hs->sc_dq->dq_chan, addr, count, flags); 418 if (fhpibsend(hs, slave, sec, 0, 0) < 0) { 419 #ifdef DEBUG 420 printf("fhpibgo: send failed, retrying...\n"); 421 #endif 422 (void) fhpibsend(hs, slave, sec, 0, 0); 423 } 424 i = hd->hpib_cmd; 425 hd->hpib_cmd = sc->sc_cmd; 426 hd->hpib_ie = IDS_DMA(hs->sc_dq->dq_chan) | IDS_WRITE | 427 ((flags & DMAGO_WORD) ? IDS_WDMA : 0); 428 } 429 430 /* 431 * A DMA read can finish but the device can still be waiting (MAG-tape 432 * with more data than we're waiting for). This timeout routine 433 * takes care of that. Somehow, the thing gets hosed. For now, since 434 * this should be a very rare occurence, we RESET it. 435 */ 436 void 437 fhpibdmadone(arg) 438 void *arg; 439 { 440 struct hpibbus_softc *hs = arg; 441 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 442 int s = splbio(); 443 444 if (hs->sc_flags & HPIBF_IO) { 445 struct fhpibdevice *hd = sc->sc_regs; 446 struct hpibqueue *hq; 447 448 hd->hpib_imask = 0; 449 hd->hpib_cid = 0xFF; 450 DELAY(100); 451 hd->hpib_cmd = CT_8BIT; 452 hd->hpib_ar = AR_ARONC; 453 fhpibifc(hd); 454 hd->hpib_ie = IDS_IE; 455 hs->sc_flags &= ~(HPIBF_DONE|HPIBF_IO|HPIBF_READ|HPIBF_TIMO); 456 dmafree(hs->sc_dq); 457 458 hq = hs->sc_queue.tqh_first; 459 (hq->hq_intr)(hq->hq_softc); 460 } 461 splx(s); 462 } 463 464 void 465 fhpibdone(hs) 466 struct hpibbus_softc *hs; 467 { 468 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 469 struct fhpibdevice *hd = sc->sc_regs; 470 char *addr; 471 int cnt; 472 473 cnt = hs->sc_curcnt; 474 hs->sc_addr += cnt; 475 hs->sc_count -= cnt; 476 #ifdef DEBUG 477 if ((fhpibdebug & FDB_DMA) && fhpibdebugunit == sc->sc_dev.dv_unit) 478 printf("fhpibdone: addr %p cnt %d\n", 479 hs->sc_addr, hs->sc_count); 480 #endif 481 if (hs->sc_flags & HPIBF_READ) { 482 hd->hpib_imask = IM_IDLE | IM_BYTE; 483 if (hs->sc_flags & HPIBF_TIMO) 484 timeout(fhpibdmadone, hs, hz >> 2); 485 } else { 486 cnt = hs->sc_count; 487 if (cnt) { 488 addr = hs->sc_addr; 489 hd->hpib_imask = IM_IDLE | IM_ROOM; 490 FHPIBWAIT(hd, IM_IDLE); 491 hd->hpib_stat = ST_WRITE; 492 while (--cnt) { 493 hd->hpib_data = *addr++; 494 FHPIBWAIT(hd, IM_ROOM); 495 } 496 hd->hpib_stat = ST_EOI; 497 hd->hpib_data = *addr; 498 } 499 hd->hpib_imask = IM_IDLE; 500 } 501 hs->sc_flags |= HPIBF_DONE; 502 hd->hpib_stat = ST_IENAB; 503 hd->hpib_ie = IDS_IE; 504 } 505 506 int 507 fhpibintr(arg) 508 void *arg; 509 { 510 struct fhpib_softc *sc = arg; 511 struct hpibbus_softc *hs = sc->sc_hpibbus; 512 struct fhpibdevice *hd = sc->sc_regs; 513 struct hpibqueue *hq; 514 int stat0; 515 516 stat0 = hd->hpib_ids; 517 if ((stat0 & (IDS_IE|IDS_IR)) != (IDS_IE|IDS_IR)) { 518 #ifdef DEBUG 519 if ((fhpibdebug & FDB_FAIL) && (stat0 & IDS_IR) && 520 (hs->sc_flags & (HPIBF_IO|HPIBF_DONE)) != HPIBF_IO) 521 printf("%s: fhpibintr: bad status %x\n", 522 sc->sc_dev.dv_xname, stat0); 523 /* fhpibbadint[0]++; XXX */ 524 #endif 525 return(0); 526 } 527 if ((hs->sc_flags & (HPIBF_IO|HPIBF_DONE)) == HPIBF_IO) { 528 #ifdef DEBUG 529 /* fhpibbadint[1]++; XXX */ 530 #endif 531 return(0); 532 } 533 #ifdef DEBUG 534 if ((fhpibdebug & FDB_DMA) && fhpibdebugunit == sc->sc_dev.dv_unit) 535 printf("fhpibintr: flags %x\n", hs->sc_flags); 536 #endif 537 hq = hs->sc_queue.tqh_first; 538 if (hs->sc_flags & HPIBF_IO) { 539 if (hs->sc_flags & HPIBF_TIMO) 540 untimeout(fhpibdmadone, hs); 541 stat0 = hd->hpib_cmd; 542 hd->hpib_cmd = sc->sc_cmd & ~CT_8BIT; 543 hd->hpib_stat = 0; 544 hd->hpib_cmd = CT_REN | CT_8BIT; 545 stat0 = hd->hpib_intr; 546 hd->hpib_imask = 0; 547 hs->sc_flags &= ~(HPIBF_DONE|HPIBF_IO|HPIBF_READ|HPIBF_TIMO); 548 dmafree(hs->sc_dq); 549 (hq->hq_intr)(hq->hq_softc); 550 } else if (hs->sc_flags & HPIBF_PPOLL) { 551 stat0 = hd->hpib_intr; 552 #ifdef DEBUG 553 if ((fhpibdebug & FDB_FAIL) && 554 doppollint && (stat0 & IM_PPRESP) == 0) 555 printf("%s: fhpibintr: bad intr reg %x\n", 556 sc->sc_dev.dv_xname, stat0); 557 #endif 558 hd->hpib_stat = 0; 559 hd->hpib_imask = 0; 560 #ifdef DEBUG 561 stat0 = fhpibppoll(hs); 562 if ((fhpibdebug & FDB_PPOLL) && 563 fhpibdebugunit == sc->sc_dev.dv_unit) 564 printf("fhpibintr: got PPOLL status %x\n", stat0); 565 if ((stat0 & (0x80 >> hq->hq_slave)) == 0) { 566 /* 567 * XXX give it another shot (68040) 568 */ 569 /* fhpibppollfail[unit]++; XXX */ 570 DELAY(fhpibppolldelay); 571 stat0 = fhpibppoll(hs); 572 if ((stat0 & (0x80 >> hq->hq_slave)) == 0 && 573 (fhpibdebug & FDB_PPOLL) && 574 fhpibdebugunit == sc->sc_dev.dv_unit) 575 printf("fhpibintr: PPOLL: unit %d slave %d stat %x\n", 576 sc->sc_dev.dv_unit, hq->hq_slave, stat0); 577 } 578 #endif 579 hs->sc_flags &= ~HPIBF_PPOLL; 580 (hq->hq_intr)(hq->hq_softc); 581 } 582 return(1); 583 } 584 585 int 586 fhpibppoll(hs) 587 struct hpibbus_softc *hs; 588 { 589 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 590 struct fhpibdevice *hd = sc->sc_regs; 591 int ppoll; 592 593 hd->hpib_stat = 0; 594 hd->hpib_psense = 0; 595 hd->hpib_pmask = 0xFF; 596 hd->hpib_imask = IM_PPRESP | IM_PABORT; 597 DELAY(25); 598 hd->hpib_intr = IM_PABORT; 599 ppoll = hd->hpib_data; 600 if (hd->hpib_intr & IM_PABORT) 601 ppoll = 0; 602 hd->hpib_imask = 0; 603 hd->hpib_pmask = 0; 604 hd->hpib_stat = ST_IENAB; 605 return(ppoll); 606 } 607 608 int 609 fhpibwait(hd, x) 610 struct fhpibdevice *hd; 611 int x; 612 { 613 int timo = hpibtimeout; 614 615 while ((hd->hpib_intr & x) == 0 && --timo) 616 DELAY(1); 617 if (timo == 0) { 618 #ifdef DEBUG 619 if (fhpibdebug & FDB_FAIL) 620 printf("fhpibwait(%p, %x) timeout\n", hd, x); 621 #endif 622 return(-1); 623 } 624 return(0); 625 } 626 627 /* 628 * XXX: this will have to change if we ever allow more than one 629 * pending operation per HP-IB. 630 */ 631 void 632 fhpibppwatch(arg) 633 void *arg; 634 { 635 struct hpibbus_softc *hs = arg; 636 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 637 struct fhpibdevice *hd = sc->sc_regs; 638 int slave; 639 640 if ((hs->sc_flags & HPIBF_PPOLL) == 0) 641 return; 642 slave = (0x80 >> hs->sc_queue.tqh_first->hq_slave); 643 #ifdef DEBUG 644 if (!doppollint) { 645 if (fhpibppoll(hs) & slave) { 646 hd->hpib_stat = ST_IENAB; 647 hd->hpib_imask = IM_IDLE | IM_ROOM; 648 } else 649 timeout(fhpibppwatch, sc, 1); 650 return; 651 } 652 if ((fhpibdebug & FDB_PPOLL) && sc->sc_dev.dv_unit == fhpibdebugunit) 653 printf("fhpibppwatch: sense request on %s\n", 654 sc->sc_dev.dv_xname); 655 #endif 656 hd->hpib_psense = ~slave; 657 hd->hpib_pmask = slave; 658 hd->hpib_stat = ST_IENAB; 659 hd->hpib_imask = IM_PPRESP | IM_PABORT; 660 hd->hpib_ie = IDS_IE; 661 } 662
Indexes created Tue Sep 30 07:10:03 GMT 2025