fhpib.c revision 1.27
1 /* $NetBSD: fhpib.c,v 1.27 2003/08/07 16:27:28 agc Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1982, 1990, 1993 41 * The Regents of the University of California. All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)fhpib.c 8.2 (Berkeley) 1/12/94 68 */ 69 70 /* 71 * 98625A/B HPIB driver 72 */ 73 74 #include <sys/cdefs.h> 75 __KERNEL_RCSID(0, "$NetBSD: fhpib.c,v 1.27 2003/08/07 16:27:28 agc Exp $"); 76 77 #include <sys/param.h> 78 #include <sys/systm.h> 79 #include <sys/callout.h> 80 #include <sys/kernel.h> 81 #include <sys/buf.h> 82 #include <sys/device.h> 83 84 #include <machine/autoconf.h> 85 #include <machine/intr.h> 86 87 #include <hp300/dev/diovar.h> 88 #include <hp300/dev/diodevs.h> 89 90 #include <hp300/dev/dmavar.h> 91 92 #include <hp300/dev/fhpibreg.h> 93 #include <hp300/dev/hpibvar.h> 94 95 /* 96 * Inline version of fhpibwait to be used in places where 97 * we don't worry about getting hung. 98 */ 99 #define FHPIBWAIT(hd, m) while (((hd)->hpib_intr & (m)) == 0) DELAY(1) 100 101 #ifdef DEBUG 102 int fhpibdebugunit = -1; 103 int fhpibdebug = 0; 104 #define FDB_FAIL 0x01 105 #define FDB_DMA 0x02 106 #define FDB_WAIT 0x04 107 #define FDB_PPOLL 0x08 108 109 int dopriodma = 0; /* use high priority DMA */ 110 int doworddma = 1; /* non-zero if we should attempt word DMA */ 111 int doppollint = 1; /* use ppoll interrupts instead of watchdog */ 112 int fhpibppolldelay = 50; 113 #endif 114 115 void fhpibifc __P((struct fhpibdevice *)); 116 void fhpibdmadone __P((void *)); 117 int fhpibwait __P((struct fhpibdevice *, int)); 118 119 void fhpibreset __P((struct hpibbus_softc *)); 120 int fhpibsend __P((struct hpibbus_softc *, int, int, void *, int)); 121 int fhpibrecv __P((struct hpibbus_softc *, int, int, void *, int)); 122 int fhpibppoll __P((struct hpibbus_softc *)); 123 void fhpibppwatch __P((void *)); 124 void fhpibgo __P((struct hpibbus_softc *, int, int, void *, int, int, int)); 125 void fhpibdone __P((struct hpibbus_softc *)); 126 int fhpibintr __P((void *)); 127 128 /* 129 * Our controller ops structure. 130 */ 131 struct hpib_controller fhpib_controller = { 132 fhpibreset, 133 fhpibsend, 134 fhpibrecv, 135 fhpibppoll, 136 fhpibppwatch, 137 fhpibgo, 138 fhpibdone, 139 fhpibintr 140 }; 141 142 struct fhpib_softc { 143 struct device sc_dev; /* generic device glue */ 144 struct fhpibdevice *sc_regs; /* device registers */ 145 int sc_cmd; 146 struct hpibbus_softc *sc_hpibbus; /* XXX */ 147 struct callout sc_dmadone_ch; 148 struct callout sc_ppwatch_ch; 149 }; 150 151 int fhpibmatch __P((struct device *, struct cfdata *, void *)); 152 void fhpibattach __P((struct device *, struct device *, void *)); 153 154 CFATTACH_DECL(fhpib, sizeof(struct fhpib_softc), 155 fhpibmatch, fhpibattach, NULL, NULL); 156 157 int 158 fhpibmatch(parent, match, aux) 159 struct device *parent; 160 struct cfdata *match; 161 void *aux; 162 { 163 struct dio_attach_args *da = aux; 164 165 if (da->da_id == DIO_DEVICE_ID_FHPIB) 166 return (1); 167 168 return (0); 169 } 170 171 void 172 fhpibattach(parent, self, aux) 173 struct device *parent, *self; 174 void *aux; 175 { 176 struct fhpib_softc *sc = (struct fhpib_softc *)self; 177 struct dio_attach_args *da = aux; 178 struct hpibdev_attach_args ha; 179 180 sc->sc_regs = (struct fhpibdevice *)iomap(dio_scodetopa(da->da_scode), 181 da->da_size); 182 if (sc->sc_regs == NULL) { 183 printf("\n%s: can't map registers\n", self->dv_xname); 184 return; 185 } 186 187 printf(": %s\n", DIO_DEVICE_DESC_FHPIB); 188 189 /* Establish the interrupt handler. */ 190 (void) dio_intr_establish(fhpibintr, sc, da->da_ipl, IPL_BIO); 191 192 callout_init(&sc->sc_dmadone_ch); 193 callout_init(&sc->sc_ppwatch_ch); 194 195 ha.ha_ops = &fhpib_controller; 196 ha.ha_type = HPIBC; /* XXX */ 197 ha.ha_ba = HPIBC_BA; 198 ha.ha_softcpp = &sc->sc_hpibbus; /* XXX */ 199 (void)config_found(self, &ha, hpibdevprint); 200 } 201 202 void 203 fhpibreset(hs) 204 struct hpibbus_softc *hs; 205 { 206 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 207 struct fhpibdevice *hd = sc->sc_regs; 208 209 hd->hpib_cid = 0xFF; 210 DELAY(100); 211 hd->hpib_cmd = CT_8BIT; 212 hd->hpib_ar = AR_ARONC; 213 fhpibifc(hd); 214 hd->hpib_ie = IDS_IE; 215 hd->hpib_data = C_DCL; 216 DELAY(100000); 217 /* 218 * See if we can do word DMA. 219 * If so, we should be able to write and read back the appropos bit. 220 */ 221 hd->hpib_ie |= IDS_WDMA; 222 if (hd->hpib_ie & IDS_WDMA) { 223 hd->hpib_ie &= ~IDS_WDMA; 224 hs->sc_flags |= HPIBF_DMA16; 225 #ifdef DEBUG 226 if (fhpibdebug & FDB_DMA) 227 printf("fhpibtype: %s has word DMA\n", 228 sc->sc_dev.dv_xname); 229 230 #endif 231 } 232 } 233 234 void 235 fhpibifc(hd) 236 struct fhpibdevice *hd; 237 { 238 hd->hpib_cmd |= CT_IFC; 239 hd->hpib_cmd |= CT_INITFIFO; 240 DELAY(100); 241 hd->hpib_cmd &= ~CT_IFC; 242 hd->hpib_cmd |= CT_REN; 243 hd->hpib_stat = ST_ATN; 244 } 245 246 int 247 fhpibsend(hs, slave, sec, ptr, origcnt) 248 struct hpibbus_softc *hs; 249 int slave, sec, origcnt; 250 void *ptr; 251 { 252 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 253 struct fhpibdevice *hd = sc->sc_regs; 254 int cnt = origcnt; 255 int timo; 256 char *addr = ptr; 257 258 hd->hpib_stat = 0; 259 hd->hpib_imask = IM_IDLE | IM_ROOM; 260 if (fhpibwait(hd, IM_IDLE) < 0) 261 goto senderr; 262 hd->hpib_stat = ST_ATN; 263 hd->hpib_data = C_UNL; 264 hd->hpib_data = C_TAG + hs->sc_ba; 265 hd->hpib_data = C_LAG + slave; 266 if (sec < 0) { 267 if (sec == -2) /* selected device clear KLUDGE */ 268 hd->hpib_data = C_SDC; 269 } else 270 hd->hpib_data = C_SCG + sec; 271 if (fhpibwait(hd, IM_IDLE) < 0) 272 goto senderr; 273 if (cnt) { 274 hd->hpib_stat = ST_WRITE; 275 while (--cnt) { 276 hd->hpib_data = *addr++; 277 timo = hpibtimeout; 278 while ((hd->hpib_intr & IM_ROOM) == 0) { 279 if (--timo <= 0) 280 goto senderr; 281 DELAY(1); 282 } 283 } 284 hd->hpib_stat = ST_EOI; 285 hd->hpib_data = *addr; 286 FHPIBWAIT(hd, IM_ROOM); 287 hd->hpib_stat = ST_ATN; 288 /* XXX: HP-UX claims bug with CS80 transparent messages */ 289 if (sec == 0x12) 290 DELAY(150); 291 hd->hpib_data = C_UNL; 292 (void) fhpibwait(hd, IM_IDLE); 293 } 294 hd->hpib_imask = 0; 295 return (origcnt); 296 297 senderr: 298 hd->hpib_imask = 0; 299 fhpibifc(hd); 300 #ifdef DEBUG 301 if (fhpibdebug & FDB_FAIL) { 302 printf("%s: fhpibsend failed: slave %d, sec %x, ", 303 sc->sc_dev.dv_xname, slave, sec); 304 printf("sent %d of %d bytes\n", origcnt-cnt-1, origcnt); 305 } 306 #endif 307 return (origcnt - cnt - 1); 308 } 309 310 int 311 fhpibrecv(hs, slave, sec, ptr, origcnt) 312 struct hpibbus_softc *hs; 313 int slave, sec, origcnt; 314 void *ptr; 315 { 316 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 317 struct fhpibdevice *hd = sc->sc_regs; 318 int cnt = origcnt; 319 int timo; 320 char *addr = ptr; 321 322 /* 323 * Slave < 0 implies continuation of a previous receive 324 * that probably timed out. 325 */ 326 if (slave >= 0) { 327 hd->hpib_stat = 0; 328 hd->hpib_imask = IM_IDLE | IM_ROOM | IM_BYTE; 329 if (fhpibwait(hd, IM_IDLE) < 0) 330 goto recverror; 331 hd->hpib_stat = ST_ATN; 332 hd->hpib_data = C_UNL; 333 hd->hpib_data = C_LAG + hs->sc_ba; 334 hd->hpib_data = C_TAG + slave; 335 if (sec != -1) 336 hd->hpib_data = C_SCG + sec; 337 if (fhpibwait(hd, IM_IDLE) < 0) 338 goto recverror; 339 hd->hpib_stat = ST_READ0; 340 hd->hpib_data = 0; 341 } 342 if (cnt) { 343 while (--cnt >= 0) { 344 timo = hpibtimeout; 345 while ((hd->hpib_intr & IM_BYTE) == 0) { 346 if (--timo == 0) 347 goto recvbyteserror; 348 DELAY(1); 349 } 350 *addr++ = hd->hpib_data; 351 } 352 FHPIBWAIT(hd, IM_ROOM); 353 hd->hpib_stat = ST_ATN; 354 hd->hpib_data = (slave == 31) ? C_UNA : C_UNT; 355 (void) fhpibwait(hd, IM_IDLE); 356 } 357 hd->hpib_imask = 0; 358 return (origcnt); 359 360 recverror: 361 fhpibifc(hd); 362 recvbyteserror: 363 hd->hpib_imask = 0; 364 #ifdef DEBUG 365 if (fhpibdebug & FDB_FAIL) { 366 printf("%s: fhpibrecv failed: slave %d, sec %x, ", 367 sc->sc_dev.dv_xname, slave, sec); 368 printf("got %d of %d bytes\n", origcnt-cnt-1, origcnt); 369 } 370 #endif 371 return (origcnt - cnt - 1); 372 } 373 374 void 375 fhpibgo(hs, slave, sec, ptr, count, rw, timo) 376 struct hpibbus_softc *hs; 377 int slave, sec, count, rw, timo; 378 void *ptr; 379 { 380 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 381 struct fhpibdevice *hd = sc->sc_regs; 382 int i; 383 char *addr = ptr; 384 int flags = 0; 385 386 hs->sc_flags |= HPIBF_IO; 387 if (timo) 388 hs->sc_flags |= HPIBF_TIMO; 389 if (rw == B_READ) 390 hs->sc_flags |= HPIBF_READ; 391 #ifdef DEBUG 392 else if (hs->sc_flags & HPIBF_READ) { 393 printf("fhpibgo: HPIBF_READ still set\n"); 394 hs->sc_flags &= ~HPIBF_READ; 395 } 396 #endif 397 hs->sc_count = count; 398 hs->sc_addr = addr; 399 #ifdef DEBUG 400 /* fhpibtransfer[unit]++; XXX */ 401 #endif 402 if ((hs->sc_flags & HPIBF_DMA16) && 403 ((int)addr & 1) == 0 && count && (count & 1) == 0 404 #ifdef DEBUG 405 && doworddma 406 #endif 407 ) { 408 #ifdef DEBUG 409 /* fhpibworddma[unit]++; XXX */ 410 #endif 411 flags |= DMAGO_WORD; 412 hd->hpib_latch = 0; 413 } 414 #ifdef DEBUG 415 if (dopriodma) 416 flags |= DMAGO_PRI; 417 #endif 418 if (hs->sc_flags & HPIBF_READ) { 419 sc->sc_cmd = CT_REN | CT_8BIT; 420 hs->sc_curcnt = count; 421 dmago(hs->sc_dq->dq_chan, addr, count, flags|DMAGO_READ); 422 if (fhpibrecv(hs, slave, sec, 0, 0) < 0) { 423 #ifdef DEBUG 424 printf("fhpibgo: recv failed, retrying...\n"); 425 #endif 426 (void) fhpibrecv(hs, slave, sec, 0, 0); 427 } 428 i = hd->hpib_cmd; 429 hd->hpib_cmd = sc->sc_cmd; 430 hd->hpib_ie = IDS_DMA(hs->sc_dq->dq_chan) | 431 ((flags & DMAGO_WORD) ? IDS_WDMA : 0); 432 return; 433 } 434 sc->sc_cmd = CT_REN | CT_8BIT | CT_FIFOSEL; 435 if (count < hpibdmathresh) { 436 #ifdef DEBUG 437 /* fhpibnondma[unit]++; XXX */ 438 if (flags & DMAGO_WORD) 439 /* fhpibworddma[unit]--; XXX */ ; 440 #endif 441 hs->sc_curcnt = count; 442 (void) fhpibsend(hs, slave, sec, addr, count); 443 fhpibdone(hs); 444 return; 445 } 446 count -= (flags & DMAGO_WORD) ? 2 : 1; 447 hs->sc_curcnt = count; 448 dmago(hs->sc_dq->dq_chan, addr, count, flags); 449 if (fhpibsend(hs, slave, sec, 0, 0) < 0) { 450 #ifdef DEBUG 451 printf("fhpibgo: send failed, retrying...\n"); 452 #endif 453 (void) fhpibsend(hs, slave, sec, 0, 0); 454 } 455 i = hd->hpib_cmd; 456 hd->hpib_cmd = sc->sc_cmd; 457 hd->hpib_ie = IDS_DMA(hs->sc_dq->dq_chan) | IDS_WRITE | 458 ((flags & DMAGO_WORD) ? IDS_WDMA : 0); 459 } 460 461 /* 462 * A DMA read can finish but the device can still be waiting (MAG-tape 463 * with more data than we're waiting for). This timeout routine 464 * takes care of that. Somehow, the thing gets hosed. For now, since 465 * this should be a very rare occurence, we RESET it. 466 */ 467 void 468 fhpibdmadone(arg) 469 void *arg; 470 { 471 struct hpibbus_softc *hs = arg; 472 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 473 int s = splbio(); 474 475 if (hs->sc_flags & HPIBF_IO) { 476 struct fhpibdevice *hd = sc->sc_regs; 477 struct hpibqueue *hq; 478 479 hd->hpib_imask = 0; 480 hd->hpib_cid = 0xFF; 481 DELAY(100); 482 hd->hpib_cmd = CT_8BIT; 483 hd->hpib_ar = AR_ARONC; 484 fhpibifc(hd); 485 hd->hpib_ie = IDS_IE; 486 hs->sc_flags &= ~(HPIBF_DONE|HPIBF_IO|HPIBF_READ|HPIBF_TIMO); 487 dmafree(hs->sc_dq); 488 489 hq = hs->sc_queue.tqh_first; 490 (hq->hq_intr)(hq->hq_softc); 491 } 492 splx(s); 493 } 494 495 void 496 fhpibdone(hs) 497 struct hpibbus_softc *hs; 498 { 499 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 500 struct fhpibdevice *hd = sc->sc_regs; 501 char *addr; 502 int cnt; 503 504 cnt = hs->sc_curcnt; 505 hs->sc_addr += cnt; 506 hs->sc_count -= cnt; 507 #ifdef DEBUG 508 if ((fhpibdebug & FDB_DMA) && fhpibdebugunit == sc->sc_dev.dv_unit) 509 printf("fhpibdone: addr %p cnt %d\n", 510 hs->sc_addr, hs->sc_count); 511 #endif 512 if (hs->sc_flags & HPIBF_READ) { 513 hd->hpib_imask = IM_IDLE | IM_BYTE; 514 if (hs->sc_flags & HPIBF_TIMO) 515 callout_reset(&sc->sc_dmadone_ch, hz >> 2, 516 fhpibdmadone, hs); 517 } else { 518 cnt = hs->sc_count; 519 if (cnt) { 520 addr = hs->sc_addr; 521 hd->hpib_imask = IM_IDLE | IM_ROOM; 522 FHPIBWAIT(hd, IM_IDLE); 523 hd->hpib_stat = ST_WRITE; 524 while (--cnt) { 525 hd->hpib_data = *addr++; 526 FHPIBWAIT(hd, IM_ROOM); 527 } 528 hd->hpib_stat = ST_EOI; 529 hd->hpib_data = *addr; 530 } 531 hd->hpib_imask = IM_IDLE; 532 } 533 hs->sc_flags |= HPIBF_DONE; 534 hd->hpib_stat = ST_IENAB; 535 hd->hpib_ie = IDS_IE; 536 } 537 538 int 539 fhpibintr(arg) 540 void *arg; 541 { 542 struct fhpib_softc *sc = arg; 543 struct hpibbus_softc *hs = sc->sc_hpibbus; 544 struct fhpibdevice *hd = sc->sc_regs; 545 struct hpibqueue *hq; 546 int stat0; 547 548 stat0 = hd->hpib_ids; 549 if ((stat0 & (IDS_IE|IDS_IR)) != (IDS_IE|IDS_IR)) { 550 #ifdef DEBUG 551 if ((fhpibdebug & FDB_FAIL) && (stat0 & IDS_IR) && 552 (hs->sc_flags & (HPIBF_IO|HPIBF_DONE)) != HPIBF_IO) 553 printf("%s: fhpibintr: bad status %x\n", 554 sc->sc_dev.dv_xname, stat0); 555 /* fhpibbadint[0]++; XXX */ 556 #endif 557 return(0); 558 } 559 if ((hs->sc_flags & (HPIBF_IO|HPIBF_DONE)) == HPIBF_IO) { 560 #ifdef DEBUG 561 /* fhpibbadint[1]++; XXX */ 562 #endif 563 return(0); 564 } 565 #ifdef DEBUG 566 if ((fhpibdebug & FDB_DMA) && fhpibdebugunit == sc->sc_dev.dv_unit) 567 printf("fhpibintr: flags %x\n", hs->sc_flags); 568 #endif 569 hq = hs->sc_queue.tqh_first; 570 if (hs->sc_flags & HPIBF_IO) { 571 if (hs->sc_flags & HPIBF_TIMO) 572 callout_stop(&sc->sc_dmadone_ch); 573 stat0 = hd->hpib_cmd; 574 hd->hpib_cmd = sc->sc_cmd & ~CT_8BIT; 575 hd->hpib_stat = 0; 576 hd->hpib_cmd = CT_REN | CT_8BIT; 577 stat0 = hd->hpib_intr; 578 hd->hpib_imask = 0; 579 hs->sc_flags &= ~(HPIBF_DONE|HPIBF_IO|HPIBF_READ|HPIBF_TIMO); 580 dmafree(hs->sc_dq); 581 (hq->hq_intr)(hq->hq_softc); 582 } else if (hs->sc_flags & HPIBF_PPOLL) { 583 stat0 = hd->hpib_intr; 584 #ifdef DEBUG 585 if ((fhpibdebug & FDB_FAIL) && 586 doppollint && (stat0 & IM_PPRESP) == 0) 587 printf("%s: fhpibintr: bad intr reg %x\n", 588 sc->sc_dev.dv_xname, stat0); 589 #endif 590 hd->hpib_stat = 0; 591 hd->hpib_imask = 0; 592 #ifdef DEBUG 593 stat0 = fhpibppoll(hs); 594 if ((fhpibdebug & FDB_PPOLL) && 595 fhpibdebugunit == sc->sc_dev.dv_unit) 596 printf("fhpibintr: got PPOLL status %x\n", stat0); 597 if ((stat0 & (0x80 >> hq->hq_slave)) == 0) { 598 /* 599 * XXX give it another shot (68040) 600 */ 601 /* fhpibppollfail[unit]++; XXX */ 602 DELAY(fhpibppolldelay); 603 stat0 = fhpibppoll(hs); 604 if ((stat0 & (0x80 >> hq->hq_slave)) == 0 && 605 (fhpibdebug & FDB_PPOLL) && 606 fhpibdebugunit == sc->sc_dev.dv_unit) 607 printf("fhpibintr: PPOLL: unit %d slave %d stat %x\n", 608 sc->sc_dev.dv_unit, hq->hq_slave, stat0); 609 } 610 #endif 611 hs->sc_flags &= ~HPIBF_PPOLL; 612 (hq->hq_intr)(hq->hq_softc); 613 } 614 return(1); 615 } 616 617 int 618 fhpibppoll(hs) 619 struct hpibbus_softc *hs; 620 { 621 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 622 struct fhpibdevice *hd = sc->sc_regs; 623 int ppoll; 624 625 hd->hpib_stat = 0; 626 hd->hpib_psense = 0; 627 hd->hpib_pmask = 0xFF; 628 hd->hpib_imask = IM_PPRESP | IM_PABORT; 629 DELAY(25); 630 hd->hpib_intr = IM_PABORT; 631 ppoll = hd->hpib_data; 632 if (hd->hpib_intr & IM_PABORT) 633 ppoll = 0; 634 hd->hpib_imask = 0; 635 hd->hpib_pmask = 0; 636 hd->hpib_stat = ST_IENAB; 637 return(ppoll); 638 } 639 640 int 641 fhpibwait(hd, x) 642 struct fhpibdevice *hd; 643 int x; 644 { 645 int timo = hpibtimeout; 646 647 while ((hd->hpib_intr & x) == 0 && --timo) 648 DELAY(1); 649 if (timo == 0) { 650 #ifdef DEBUG 651 if (fhpibdebug & FDB_FAIL) 652 printf("fhpibwait(%p, %x) timeout\n", hd, x); 653 #endif 654 return(-1); 655 } 656 return(0); 657 } 658 659 /* 660 * XXX: this will have to change if we ever allow more than one 661 * pending operation per HP-IB. 662 */ 663 void 664 fhpibppwatch(arg) 665 void *arg; 666 { 667 struct hpibbus_softc *hs = arg; 668 struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent; 669 struct fhpibdevice *hd = sc->sc_regs; 670 int slave; 671 672 if ((hs->sc_flags & HPIBF_PPOLL) == 0) 673 return; 674 slave = (0x80 >> hs->sc_queue.tqh_first->hq_slave); 675 #ifdef DEBUG 676 if (!doppollint) { 677 if (fhpibppoll(hs) & slave) { 678 hd->hpib_stat = ST_IENAB; 679 hd->hpib_imask = IM_IDLE | IM_ROOM; 680 } else 681 callout_reset(&sc->sc_ppwatch_ch, 1, fhpibppwatch, sc); 682 return; 683 } 684 if ((fhpibdebug & FDB_PPOLL) && sc->sc_dev.dv_unit == fhpibdebugunit) 685 printf("fhpibppwatch: sense request on %s\n", 686 sc->sc_dev.dv_xname); 687 #endif 688 hd->hpib_psense = ~slave; 689 hd->hpib_pmask = slave; 690 hd->hpib_stat = ST_IENAB; 691 hd->hpib_imask = IM_PPRESP | IM_PABORT; 692 hd->hpib_ie = IDS_IE; 693 } 694
Indexes created Tue Sep 30 11:09:46 GMT 2025