1 1.15 thorpej /* $NetBSD: intiovar.h,v 1.15 2024/01/28 17:31:40 thorpej Exp $ */ 2 1.1 thorpej 3 1.1 thorpej /*- 4 1.5 gmcgarry * Copyright (c) 1996, 1998, 2001 The NetBSD Foundation, Inc. 5 1.1 thorpej * All rights reserved. 6 1.1 thorpej * 7 1.1 thorpej * This code is derived from software contributed to The NetBSD Foundation 8 1.1 thorpej * by Jason R. Thorpe. 9 1.1 thorpej * 10 1.1 thorpej * Redistribution and use in source and binary forms, with or without 11 1.1 thorpej * modification, are permitted provided that the following conditions 12 1.1 thorpej * are met: 13 1.1 thorpej * 1. Redistributions of source code must retain the above copyright 14 1.1 thorpej * notice, this list of conditions and the following disclaimer. 15 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 thorpej * notice, this list of conditions and the following disclaimer in the 17 1.1 thorpej * documentation and/or other materials provided with the distribution. 18 1.1 thorpej * 19 1.1 thorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 thorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.3 jtc * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.3 jtc * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 thorpej * POSSIBILITY OF SUCH DAMAGE. 30 1.1 thorpej */ 31 1.1 thorpej 32 1.1 thorpej /* 33 1.1 thorpej * Autoconfiguration definitions and prototypes for the hp300 34 1.1 thorpej * internal i/o space. 35 1.1 thorpej */ 36 1.1 thorpej 37 1.4 thorpej #include <machine/bus.h> 38 1.5 gmcgarry #include <machine/cpu.h> 39 1.5 gmcgarry 40 1.5 gmcgarry #include <arch/hp300/dev/intioreg.h> 41 1.5 gmcgarry 42 1.5 gmcgarry #define INTIO_MOD_LEN 8 43 1.4 thorpej 44 1.1 thorpej /* 45 1.1 thorpej * Arguments used to attach a device to the internal i/o space. 46 1.1 thorpej */ 47 1.1 thorpej struct intio_attach_args { 48 1.12 tsutsui char ia_modname[INTIO_MOD_LEN]; /* module name */ 49 1.5 gmcgarry bus_space_tag_t ia_bst; /* bus space tag */ 50 1.5 gmcgarry bus_addr_t ia_addr; /* physical address */ 51 1.5 gmcgarry bus_size_t ia_iobase; /* intio iobase */ 52 1.5 gmcgarry int ia_ipl; /* interrupt priority level */ 53 1.5 gmcgarry }; 54 1.5 gmcgarry 55 1.5 gmcgarry struct intio_builtins { 56 1.8 tsutsui const char *ib_modname; /* module name */ 57 1.5 gmcgarry bus_size_t ib_offset; /* intio offset */ 58 1.5 gmcgarry int ib_ipl; /* interrupt priority level */ 59 1.15 thorpej uint32_t ib_spumask; /* which machines have it */ 60 1.1 thorpej }; 61 1.5 gmcgarry 62 1.5 gmcgarry /* 63 1.5 gmcgarry * Devices such as the HIL and RTC chips are wired in a consistent 64 1.5 gmcgarry * fashion. These routines provide a uniform mechanism for accessing 65 1.5 gmcgarry * the devices that are wired to the machine. Doesn't include 66 1.5 gmcgarry * memory-mapped devices such as framebuffers. 67 1.5 gmcgarry */ 68 1.5 gmcgarry 69 1.5 gmcgarry #define WAIT(bst,bsh) \ 70 1.5 gmcgarry while (bus_space_read_1(bst,bsh,INTIO_DEV_3xx_STAT) \ 71 1.5 gmcgarry & INTIO_DEV_BUSY) 72 1.5 gmcgarry #define DATAWAIT(bst,bsh) \ 73 1.5 gmcgarry while (!(bus_space_read_1(bst, bsh, INTIO_DEV_3xx_STAT) \ 74 1.5 gmcgarry & INTIO_DEV_DATA_READY)) 75 1.5 gmcgarry 76 1.10 perry static inline int 77 1.5 gmcgarry intio_device_readcmd(bus_space_tag_t bst, bus_space_handle_t bsh, int cmd, 78 1.11 tsutsui uint8_t *datap) 79 1.5 gmcgarry { 80 1.11 tsutsui uint8_t status; 81 1.5 gmcgarry 82 1.5 gmcgarry if (cmd != 0) { 83 1.5 gmcgarry WAIT(bst, bsh); 84 1.5 gmcgarry bus_space_write_1(bst, bsh, INTIO_DEV_3xx_CMD, cmd); 85 1.5 gmcgarry } 86 1.11 tsutsui do { 87 1.5 gmcgarry DATAWAIT(bst, bsh); 88 1.5 gmcgarry status = bus_space_read_1(bst, bsh, INTIO_DEV_3xx_STAT); 89 1.5 gmcgarry *datap = bus_space_read_1(bst, bsh, INTIO_DEV_3xx_DATA); 90 1.5 gmcgarry } while (((status >> INTIO_DEV_SRSHIFT) & INTIO_DEV_SRMASK) 91 1.5 gmcgarry != INTIO_DEV_SR_DATAAVAIL); 92 1.6 tsutsui return (0); 93 1.5 gmcgarry } 94 1.5 gmcgarry 95 1.10 perry static inline int 96 1.5 gmcgarry intio_device_writecmd(bus_space_tag_t bst, bus_space_handle_t bsh, 97 1.11 tsutsui int cmd, uint8_t *datap, int len) 98 1.5 gmcgarry { 99 1.11 tsutsui 100 1.11 tsutsui WAIT(bst, bsh); 101 1.5 gmcgarry bus_space_write_1(bst, bsh, INTIO_DEV_3xx_CMD, cmd); 102 1.11 tsutsui while (len--) { 103 1.14 mrg WAIT(bst, bsh); 104 1.5 gmcgarry bus_space_write_1(bst, bsh, INTIO_DEV_3xx_DATA, *datap++); 105 1.11 tsutsui } 106 1.5 gmcgarry return (0); 107 1.5 gmcgarry } 108 1.5 gmcgarry 109 1.10 perry static inline int 110 1.5 gmcgarry intio_device_readstate(bus_space_tag_t bst, bus_space_handle_t bsh, 111 1.11 tsutsui uint8_t *statusp, uint8_t *datap) 112 1.5 gmcgarry { 113 1.5 gmcgarry *statusp = bus_space_read_1(bst, bsh, INTIO_DEV_3xx_STAT); 114 1.5 gmcgarry *datap = bus_space_read_1(bst, bsh, INTIO_DEV_3xx_DATA); 115 1.5 gmcgarry return (0); 116 1.5 gmcgarry } 117 1.5 gmcgarry #undef WAIT 118 1.5 gmcgarry #undef DATAWAIT 119 1.5 gmcgarry 120 1.5 gmcgarry #define INTIO_DEVSIZE 4096 /* large enough for all machines */ 121 1.5 gmcgarry 122 1.5 gmcgarry #define intio_intr_establish(func, arg, ipl, priority) \ 123 1.5 gmcgarry intr_establish((func),(arg),(ipl),(priority)) 124