sti_machdep.c revision 1.7
1 /* $NetBSD: sti_machdep.c,v 1.7 2025/05/31 03:05:25 tsutsui Exp $ */ 2 /* $OpenBSD: sti_sgc.c,v 1.14 2007/05/26 00:36:03 krw Exp $ */ 3 4 /* 5 * Copyright (c) 2005, Miodrag Vallat 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 25 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 * 28 */ 29 /*- 30 * Copyright (c) 2020, 2025 Izumi Tsutsui. All rights reserved. 31 * 32 * Redistribution and use in source and binary forms, with or without 33 * modification, are permitted provided that the following conditions 34 * are met: 35 * 1. Redistributions of source code must retain the above copyright 36 * notice, this list of conditions and the following disclaimer. 37 * 2. Redistributions in binary form must reproduce the above copyright 38 * notice, this list of conditions and the following disclaimer in the 39 * documentation and/or other materials provided with the distribution. 40 * 41 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 42 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 43 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 44 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 45 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 46 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 47 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 48 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 49 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 50 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51 */ 52 53 #include <sys/cdefs.h> 54 __KERNEL_RCSID(0, "$NetBSD: sti_machdep.c,v 1.7 2025/05/31 03:05:25 tsutsui Exp $"); 55 56 #include <sys/param.h> 57 #include <sys/device.h> 58 #include <sys/bus.h> 59 60 #include <dev/wscons/wsconsio.h> 61 62 #include <hp300/dev/sti_machdep.h> 63 64 /* 65 * 425e and 362/382 EVRX specific hardware 66 */ 67 /* 68 * RAMDAC (Bt458) on 425e EVRX is found at offset 0x00060000 from SGC bus PA. 69 * RAMDAC (Bt474) on 362/382 EVRX is also found at offset 0x00060000 70 * from DIO scode (132) + STI_DIO_SCODE_OFFSET PA (i.e. 0x01800000). 71 * 72 * Offset 0x040000 length 0x1c0000 is mapped in MI sti via ROM region 2 73 * on both 425e and 362/382. 74 */ 75 #define STI_EVRX_REGNO2OFFSET 0x00020000 /* 0x00060000 - 0x00040000 */ 76 77 /* bitmap memory can be accessed at offset +0x200000 */ 78 #define STI_EVRX_FBOFFSET 0x00200000 79 80 #define EVRX_BT458_ADDR (STI_EVRX_REGNO2OFFSET + 0x200 + 2) 81 #define EVRX_BT458_CMAP (STI_EVRX_REGNO2OFFSET + 0x204 + 2) 82 #define EVRX_BT458_CTRL (STI_EVRX_REGNO2OFFSET + 0x208 + 2) 83 #define EVRX_BT458_OMAP (STI_EVRX_REGNO2OFFSET + 0x20C + 2) 84 85 /* These registers are partially common between Bt474 and Bt458 */ 86 #define EVRX_BT4xx_ADDR EVRX_BT458_ADDR 87 #define EVRX_BT4xx_CMAP EVRX_BT458_CMAP 88 #define EVRX_BT4xx_CTRL EVRX_BT458_CTRL 89 90 /* from HP-UX /usr/lib/libddevrx.a */ 91 #define EVRX_MAGIC00 (STI_EVRX_REGNO2OFFSET + 0x600) 92 #define EVRX_MAGIC04 (STI_EVRX_REGNO2OFFSET + 0x604) 93 #define EVRX_MAGIC08 (STI_EVRX_REGNO2OFFSET + 0x608) 94 #define EVRX_MAGIC0C (STI_EVRX_REGNO2OFFSET + 0x60c) 95 #define EVRX_MAGIC10 (STI_EVRX_REGNO2OFFSET + 0x610) 96 #define EVRX_MAGIC10_BSY 0x00010000 97 #define EVRX_MAGIC18 (STI_EVRX_REGNO2OFFSET + 0x618) 98 #define EVRX_MAGIC1C (STI_EVRX_REGNO2OFFSET + 0x61c) 99 100 /* 101 * HP A1659A CRX specific hardware 102 */ 103 /* bitmap memory can be accessed at offset +0x1000000 */ 104 #define STI_CRX_FBOFFSET 0x01000000 105 106 /* hp300 EVRX and CRX specific access functions */ 107 static int sti_evrx_putcmap(struct sti_screen *, u_int, u_int); 108 static void sti_evrx_resetramdac(struct sti_screen *); 109 static void sti_evrx_resetcmap(struct sti_screen *); 110 static void sti_evrx_setupfb(struct sti_screen *); 111 static paddr_t sti_m68k_mmap(void *, void *, off_t, int); 112 113 static struct bus_space_tag sticn_tag; 114 static struct sti_rom sticn_rom; 115 static struct sti_screen sticn_scr; 116 static bus_addr_t sticn_bases[STI_REGION_MAX]; 117 118 static const struct wsdisplay_accessops sti_m68k_accessops = { 119 .ioctl = sti_ioctl, 120 .mmap = sti_m68k_mmap, 121 .alloc_screen = sti_alloc_screen, 122 .free_screen = sti_free_screen, 123 .show_screen = sti_show_screen, 124 .load_font = sti_load_font 125 }; 126 127 void 128 sti_machdep_attach_console(struct sti_machdep_softc *sc) 129 { 130 struct sti_softc *ssc = &sc->sc_sti; 131 132 ssc->sc_flags |= STI_CONSOLE | STI_ATTACHED; 133 ssc->sc_rom = &sticn_rom; 134 ssc->sc_rom->rom_softc = ssc; 135 ssc->sc_scr = &sticn_scr; 136 ssc->sc_scr->scr_rom = ssc->sc_rom; 137 memcpy(ssc->bases, sticn_bases, sizeof(ssc->bases)); 138 139 sti_describe(ssc); 140 } 141 142 void 143 sti_machdep_attach(struct sti_machdep_softc *sc) 144 { 145 struct sti_softc *ssc = &sc->sc_sti; 146 struct sti_screen *scr; 147 paddr_t base = sc->sc_base; 148 struct wsemuldisplaydev_attach_args waa; 149 struct sti_dd *rom_dd; 150 uint32_t grid0; 151 152 /* Identify the board model by dd_grid */ 153 rom_dd = &ssc->sc_rom->rom_dd; 154 grid0 = rom_dd->dd_grid[0]; 155 scr = ssc->sc_scr; 156 157 switch (grid0) { 158 case STI_DD_EVRX: 159 case STI_DD_382C: 160 case STI_DD_3X2V: 161 /* 162 * 425e and 362/382 on-board EVRX framebuffer. 163 */ 164 sc->sc_bitmap = base + STI_EVRX_FBOFFSET; 165 166 /* 167 * initialize Bt458/474 RAMDAC and preserve initial color map 168 */ 169 sti_evrx_resetramdac(scr); 170 sti_evrx_resetcmap(scr); 171 scr->setupfb = sti_evrx_setupfb; 172 scr->putcmap = sti_evrx_putcmap; 173 break; 174 175 case STI_DD_CRX: 176 /* 177 * HP A1659A CRX on some 425t variants. 178 */ 179 sc->sc_bitmap = base + STI_CRX_FBOFFSET; 180 break; 181 182 default: 183 /* 184 * Unsupported variants. 185 * Use default common sti(4) attachment (no bitmap support). 186 */ 187 sti_end_attach(ssc); 188 return; 189 } 190 191 aprint_normal_dev(ssc->sc_dev, "Enable mmap support\n"); 192 193 scr->scr_wsmode = WSDISPLAYIO_MODE_EMUL; 194 waa.console = ssc->sc_flags & STI_CONSOLE ? 1 : 0; 195 waa.scrdata = &scr->scr_screenlist; 196 waa.accessops = &sti_m68k_accessops; 197 waa.accesscookie = scr; 198 199 config_found(ssc->sc_dev, &waa, wsemuldisplaydevprint, 200 CFARGS_NONE); 201 } 202 203 static int 204 sti_evrx_putcmap(struct sti_screen *scr, u_int index, u_int count) 205 { 206 struct sti_rom *rom = scr->scr_rom; 207 bus_space_tag_t bst = rom->memt; 208 bus_space_handle_t bsh = rom->regh[2]; 209 int i; 210 211 /* magic setup from HP-UX */ 212 bus_space_write_4(bst, bsh, EVRX_MAGIC08, 0x00000001); 213 bus_space_write_4(bst, bsh, EVRX_MAGIC00, 0x00000001); 214 for (i = index; i < index + count; i++) { 215 /* this is what HP-UX woodDownloadCmap() does */ 216 while ((bus_space_read_4(bst, bsh, EVRX_MAGIC10) & 217 EVRX_MAGIC10_BSY) != 0) 218 continue; 219 bus_space_write_1(bst, bsh, EVRX_BT4xx_ADDR, i); 220 bus_space_write_1(bst, bsh, EVRX_BT4xx_CMAP, scr->scr_rcmap[i]); 221 bus_space_write_1(bst, bsh, EVRX_BT4xx_CMAP, scr->scr_gcmap[i]); 222 bus_space_write_4(bst, bsh, EVRX_MAGIC10, scr->scr_bcmap[i]); 223 } 224 return 0; 225 } 226 227 static void 228 sti_evrx_resetramdac(struct sti_screen *scr) 229 { 230 struct sti_rom *rom = scr->scr_rom; 231 bus_space_tag_t bst = rom->memt; 232 bus_space_handle_t bsh = rom->regh[2]; 233 #if 0 234 int i; 235 #endif 236 237 /* 238 * Initialize the Bt458. When we write to control registers, 239 * the address is not incremented automatically. So we specify 240 * it ourselves for each control register. 241 */ 242 243 /* all planes will be read */ 244 bus_space_write_1(bst, bsh, EVRX_BT4xx_ADDR, 0x04); 245 bus_space_write_1(bst, bsh, EVRX_BT4xx_CTRL, 0xff); 246 247 #if 0 248 /* 249 * HP-UX woodInitializeHardware() doesn't touch these 250 * Bt458 specific registers. Maybe initialized by STI ROM? 251 */ 252 /* all planes have non-blink */ 253 bus_space_write_1(bst, bsh, EVRX_BT458_ADDR, 0x05); 254 bus_space_write_1(bst, bsh, EVRX_BT458_CTRL, 0x00); 255 256 /* palette enabled, ovly plane disabled */ 257 bus_space_write_1(bst, bsh, EVRX_BT458_ADDR, 0x06); 258 bus_space_write_1(bst, bsh, EVRX_BT458_CTRL, 0x40); 259 260 /* no test mode */ 261 bus_space_write_1(bst, bsh, EVRX_BT458_ADDR, 0x07); 262 bus_space_write_1(bst, bsh, EVRX_BT458_CTRL, 0x00); 263 #endif 264 265 /* magic initialization from HP-UX woodInitializeHardware() */ 266 bus_space_write_4(bst, bsh, EVRX_MAGIC00, 0x00000001); 267 bus_space_write_4(bst, bsh, EVRX_MAGIC04, 0x00000001); 268 bus_space_write_4(bst, bsh, EVRX_MAGIC08, 0x00000001); 269 bus_space_write_4(bst, bsh, EVRX_MAGIC0C, 0x00000001); 270 bus_space_write_4(bst, bsh, EVRX_MAGIC18, 0xFFFFFFFF); 271 bus_space_write_4(bst, bsh, EVRX_MAGIC1C, 0x00000000); 272 273 #if 0 274 bus_space_write_1(bst, bsh, EVRX_BT458_ADDR, 0x00); 275 for (i = 0; i < 4; i++) { 276 bus_space_write_1(bst, bsh, EVRX_BT458_OMAP, 0x00); 277 bus_space_write_1(bst, bsh, EVRX_BT458_OMAP, 0x00); 278 bus_space_write_1(bst, bsh, EVRX_BT458_OMAP, 0x00); 279 } 280 #endif 281 } 282 283 static void 284 sti_evrx_resetcmap(struct sti_screen *scr) 285 { 286 struct sti_rom *rom = scr->scr_rom; 287 bus_space_tag_t bst = rom->memt; 288 bus_space_handle_t bsh = rom->regh[2]; 289 int i; 290 291 /* magic setup from HP-UX */ 292 bus_space_write_4(bst, bsh, EVRX_MAGIC08, 0x00000001); 293 bus_space_write_4(bst, bsh, EVRX_MAGIC00, 0x00000001); 294 295 /* preserve palette values initialized by STI firmware */ 296 for (i = 0; i < STI_NCMAP; i++) { 297 /* this is what HP-UX woodUploadCmap() does */ 298 while ((bus_space_read_4(bst, bsh, EVRX_MAGIC10) & 299 EVRX_MAGIC10_BSY) != 0) 300 continue; 301 bus_space_write_1(bst, bsh, EVRX_BT458_ADDR, i); 302 scr->scr_rcmap[i] = bus_space_read_1(bst, bsh, EVRX_BT4xx_CMAP); 303 scr->scr_gcmap[i] = bus_space_read_1(bst, bsh, EVRX_BT4xx_CMAP); 304 scr->scr_bcmap[i] = bus_space_read_1(bst, bsh, EVRX_BT4xx_CMAP); 305 } 306 } 307 308 static void 309 sti_evrx_setupfb(struct sti_screen *scr) 310 { 311 312 sti_init(scr, 0); 313 sti_evrx_resetramdac(scr); 314 } 315 316 static paddr_t 317 sti_m68k_mmap(void *v, void *vs, off_t offset, int prot) 318 { 319 struct sti_screen *scr = (struct sti_screen *)v; 320 struct sti_rom *rom = scr->scr_rom; 321 struct sti_softc *ssc = rom->rom_softc; 322 struct sti_machdep_softc *sc = device_private(ssc->sc_dev); 323 paddr_t cookie = -1; 324 325 if ((offset & PAGE_MASK) != 0) 326 return -1; 327 328 switch (scr->scr_wsmode) { 329 case WSDISPLAYIO_MODE_MAPPED: 330 /* not implemented yet; what should be shown? */ 331 break; 332 case WSDISPLAYIO_MODE_DUMBFB: 333 if (offset >= 0 && offset < (scr->fbwidth * scr->fbheight)) 334 cookie = m68k_btop(sc->sc_bitmap + offset); 335 break; 336 default: 337 break; 338 } 339 340 return cookie; 341 } 342 343 void 344 sti_machdep_cnattach(bus_space_tag_t bst, paddr_t base) 345 { 346 int i; 347 348 sticn_tag = *bst; 349 350 /* sticn_bases[0] will be fixed in sti_cnattach() */ 351 for (i = 0; i < STI_REGION_MAX; i++) 352 sticn_bases[i] = (bus_addr_t)base; 353 354 sti_cnattach(&sticn_rom, &sticn_scr, &sticn_tag, sticn_bases, 355 STI_CODEBASE_M68K); 356 } 357
Indexes created Wed Oct 01 13:09:50 GMT 2025